ADM202JRN-REEL ,+5V, 0.1 µF CMOS RS-232 200kBPS Transceiver with 2 Drivers & 2 ReceiversAPPLICATIONSOUTPUTSINPUTS*T2 T2T2Computers IN OUTPeripheralsR1 R1R1Modems OUT INTTL/CMOS RS-232Prin ..
ADM202JRN-REEL7 ,+5V, 0.1 µF CMOS RS-232 200kBPS Transceiver with 2 Drivers & 2 Receiversspecifications. Fast driver slew rates permit operation up toOUTPUTS INPUTS**120 kB while high-driv ..
ADM202JRNZ ,+5V, 0.1 µF CMOS RS-232 200kBPS Transceiver with 2 Drivers & 2 ReceiversSPECIFICATIONS T to T , unless otherwise noted)MIN MAXParameter Min Typ Max Unit Conditions/Comment ..
ADM202JRW ,High Speed, +5 V, 0.1 uF CMOS RS-232 Driver/Receiversspecifications. Fast driver slew rates permit operation up toDO NOT MAKE8 C1+11CONNECTIONS TO C2+12 ..
ADM202JRWZ , High-Speed, 5 V, 0.1 F CMOS RS-232 Driver/Receivers
ADM203JN ,High Speed, +5 V, 0.1 uF CMOS RS-232 Driver/ReceiversSpecifications6.3V6.3VDOUBLERC1– V+ 23Two Drivers and Two ReceiversOn-Board DC-DC ConvertersC2+4 +1 ..
AHC373 , OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
AHC573 , OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
AHC573 , OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
AHC74 , DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
AHC74 , DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
AHCT244 , OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
ADM202JRN-REEL-ADM202JRN-REEL7-ADM202JRNZ
+5V, 0.1 µF CMOS RS-232 200kBPS Transceiver with 2 Drivers & 2 Receivers
REV.A
FUNCTIONAL BLOCK DIAGRAMS
0.1�F
6.3V
0.1�F
16V
T1INT1OUT
T2INT2OUT
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
R1OUTR1IN
R2OUTR2IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
0.1�F
16V
6.3V
0.1�F
6.3V
5V INPUT
T1INT1OUT
T2INT2OUT
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
R1OUTR1IN
R2OUTR2IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
5V INPUT
DO NOT MAKE
CONNECTIONS
TO THESE PINS
INTERNAL
–10V POWER
SUPPLY
INTERNAL
+10V POWER
SUPPLY
*INTERNAL 400k� PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
**INTERNAL 5k� PULL-DOWN RESISTOR ON EACH RS-232 INPUT.
*INTERNAL 400k� PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
**INTERNAL 5k� PULL-DOWN RESISTOR ON EACH RS-232 INPUT.GENERAL DESCRIPTIONThe ADM202/ADM203 is a two-channel RS-232 line driver/
receiver pair designed to operate from a single 5 V power sup-
ply. A highly efficient on-chip charge pump design permits
RS-232 levels to be developed using charge pump capacitors as
small as 0.1 µF. The capacitors are internal to the package on
the ADM203 so no external capacitors are required. These
converters generate ±10 V RS-232 output levels.
The ADM202/ADM203 meets or exceeds the EIA-232-E and
V.28 specifications. Fast driver slew rates permit operation up to
120 kB while high-drive currents allow for extended cable lengths.
An epitaxial BiCMOS construction minimizes power consump-
tion to 10 mW and also guards against latch-up. Overvoltage
protection is provided allowing the receiver inputs to withstand
continuous voltages in excess of ±30 V. In addition, all pins
contain ESD protection to levels greater than 2 kV.
The ADM202 is available in 16-lead DIP and both narrow and
wide SOIC packages. The ADM203 is available in a 20-lead
DIP package.
FEATURES
120 kB Transmission Rate
ADM202: Small (0.1 �F) Charge Pump Capacitors
ADM203: No External Capacitors Required
Single 5 V Power Supply
Meets EIA-232-E and V.28 Specifications
Two Drivers and Two Receivers
On-Board DC-DC Converters�9 V Output Swing with 5 V Supply
Low Power BiCMOS: 2.0 mA ICC�30 V Receiver Input Levels
APPLICATIONS
Computers
Peripherals
Modems
Printers
Instruments
High-Speed, 5 V, 0.1 �F
CMOS RS-232 Driver/Receivers
ADM202/ADM203–SPECIFICATIONS
(VCC = 5 V � 10%, (ADM202 C1–C4 = 0.1 �F). All Specifications
TMIN to TMAX, unless otherwise noted)Input Logic Threshold Low, VINL
TTL/CMOS Output Voltage Low, VOL
TTL/CMOS Output Voltage High, VOH
Propagation Delay
Transition Region Slew Rate
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*(TA = 25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VCC – 0.3 V) to +14 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –14 V
Input Voltages
TIN . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . (V+, +0.3 V) to (V–, – 0.3 V)
ROUT . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous
Power Dissipation
N-16 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW
R-16N SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mW
R-16W SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW
N-20 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 890 mW
Thermal Impedance
N-16 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135°C/W
R-16N SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105°C/W
R-16W SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105°C/W
N-20 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125°C/W
Operating Temperature Range
Commercial (J Version) . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . .215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >2000 V
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
ORDERING GUIDE
PIN FUNCTION DESCRIPTIONGND
C1+
C1–
C2+
C2–
TIN
TOUT
0.1�F
6.3V
0.1�F
16V
T1INT1OUT
T2INT2OUT
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
R1OUTR1IN
R2OUTR2IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
0.1�F
16V
6.3V
0.1�F
6.3V
5V INPUT
T1INT1OUT
T2INT2OUT
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
R1OUTR1IN
R2OUTR2IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
5V INPUT
DO NOT MAKE
CONNECTIONS
TO THESE PINS
INTERNAL
–10V POWER
SUPPLY
INTERNAL
+10V POWER
SUPPLY
DIP/SOIC
DIP
PIN CONFIGURATIONS
ADM202/ADM203
–Typical Performance CharacteristicsTPC 1.Charge Pump V+, V– vs. Current
TPC 2.Transmitter Slew Rate vs. Load Capacitance
TPC 3.Transmitter Fully Loaded Slew Rate
TPC 4.Transmitter Output Voltage vs. VCC
TPC 5.Transmitter Output Voltage vs. Current
TPC 6.Transmitter Unloaded Slew Rate
GENERAL INFORMATIONThe ADM202/ADM203 is an RS-232 drivers/receivers designed
to solve interface problems by meeting the EIA-232E specifica-
tions while using a single digital 5 V supply. The EIA standard
requires transmitters that will deliver ±5 V minimum on the
transmission channel and receivers that can accept signal levels
down to ±3 V. The parts achieve this by integrating step up
voltage converters and level shifting transmitters and receivers
onto the same chip. CMOS technology is used to keep the power
dissipation to an absolute minimum.
The ADM203 uses internal capacitors and, therefore, no exter-
nal capacitors are required.
The ADM202 contains an internal voltage doubler and a voltage
inverter which generates ±10 V from the 5 V input. External
0.1 µF capacitors are required for the internal voltage converter.
The ADM202/ADM203 is a modification, enhancement and
improvement to the AD230–AD241 family and derivatives
thereof. It is essentially plug-in compatible and does not have
materially different applications.
CIRCUIT DESCRIPTIONThe internal circuitry consists of three main sections. These are:
(a) A Charge Pump Voltage Converter
(b) RS-232 to TTL/CMOS Receivers
(c) TTL/CMOS to RS-232 Transmitters
Charge Pump DC-DC Voltage ConverterThe charge pump voltage converter consists of an oscillator and
a switching matrix. The converter generates a ±10 V supply
from the input 5 V level. This is done in two stages using a
switched capacitor technique as illustrated below. First, the 5 V
input supply is doubled to 10 V using capacitor C1 as the charge
storage element. The 10 V level is then inverted to generate
–10 V using C2 as the storage element.
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors C1 and
C2 may also be reduced at the expense of higher output imped-
ance on the V+ and V– supplies. On the ADM203, all capacitors
C1 to C4 are molded into the package.
The V+ and V– supplies may also be used to power external
circuitry if the current requirements are small.
Figure 2.Charge Pump Voltage Doubler
Figure 3.Charge Pump Voltage Inverter
Transmitter (Driver) SectionThe drivers convert TTL/CMOS input levels into EIA-232-E
output levels. With VCC = +5 V and driving a typical EIA-232-E
load, the output voltage swing is ±9 V. Even under worst-case
conditions the drivers are guaranteed to meet the ±5 V EIA-232-E
minimum requirement.
The input threshold levels are both TTL and CMOS compat-
ible with the switching threshold set at VCC/4. With a nominal
VCC = 5 V the switching threshold is 1.25 V typical. Unused
inputs may be left unconnected, as an internal 400 kΩ pull-up
resistor pulls them high forcing the outputs into a low state.
As required by the EIA-232-E standard the slew rate is limited
to less than 30 V/µs without the need for an external slew limiting
capacitor and the output impedance in the power-off state is
greater than 300 Ω.
Receiver SectionThe receivers are inverting level shifters that accept EIA-232-E
input levels (±5 V to ±15 V) and translate them into 5 V TTL/
CMOS levels. The inputs have internal 5 kΩ pull-down resistors
to ground and are also protected against overvoltages of up to
±30 V. The guaranteed switching thresholds are 0.8 V minimum
and 2.4 V maximum which are well within the ±3 V EIA-232
requirement. The low level threshold is deliberately positive
as it ensures that an unconnected input will be interpreted as
a low level.
The receivers have Schmitt trigger input with a hysteresis level
of 0.5 V. This ensures error free reception both for noisy inputs
and for inputs with slow transition times.
ADM202/ADM203
OUTLINE DIMENSIONSDimensions shown in inches and (mm).
16-Lead Plastic DIP
(N-16)
PIN 1
0.840 (21.34)
0.745 (18.92)
0.280 (7.11)
0.240 (6.10)
0.060 (1.52)
0.015 (0.38)
0.022 (0.558)
0.014 (0.356)
0.200 (5.05)
0.125 (3.18)
(2.54)
BSC
0.070 (1.77)
0.045 (1.15)
(3.81)
MIN
SEATING
PLANE
0.195 (4.95)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.325 (8.25)
0.300 (7.62)
16-Lead Narrow SOIC
(R-16N)
16-Lead Wide SOIC
(R-16W)
SEATING
PLANE
0.010 (0.25)
0.004 (0.10)
0.018 (0.46)
0.014 (0.36)
0.107 (2.72)
0.089 (2.26)0.419 (10.65)
0.404 (10.26)
0.2992 (7.60)
0.2914 (7.40)
PIN 1
0.050 (1.27)
BSC
0.015 (0.38)
0.007 (1.18)
0.0291 (0.74)
0.0098 (0.25)� 45�
0.045 (1.15)
0.020 (0.50)
20-Lead Plastic DIP
(N-20)
PIN 1
1.060 (26.90)
0.925 (23.50)
0.280 (7.11)
0.240 (6.10)
0.195 (4.95)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.325 (8.25)
0.300 (7.62)
SEATING
PLANE
0.060 (1.52)
0.015 (0.38)
0.022 (0.558)
0.014 (0.356)
0.200 (5.05)
0.125 (3.18)
(2.54)
BSC
0.070 (1.77)
0.045 (1.15)
(3.81)
MINC00065–0–1/01 (rev. A)
PRINTED IN U.S.A.
