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ADG725
16-/32-Channel, Serially Controlled 3.5 Ohm 1.8 V to 5.5 V, ?.5 V, Analog Multiplexer
REV.0
16-/32-Channel, Serially Controlled 4 �
1.8 V to 5.5 V, �2.5 V, Analog MultiplexersSPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corporation.
FEATURES
3-Wire SPI Compatible Serial Interface
1.8 V to 5.5 V Single Supply�2.5 V Dual-Supply Operation
4 � On Resistance
0.5 � On Resistance Flatness
7 mm x 7 mm 48-Lead Chip Scale Package (CSP)
or 48-Lead TQFP Package
Rail-to-Rail Operation
Power-On Reset
42 ns Switching Times
Single 32-to-1 Channel Multiplexer
Dual/Differential 16-to-1 Channel Multiplexer
TTL/CMOS Compatible Inputs
For Functionally Equivalent Devices with Parallel
Interface, See ADG726/ADG732
APPLICATIONS
Optical Applications
Data Acquisition Systems
Communication Systems
Relay Replacement
Audio and Video Switching
Battery-Powered Systems
Medical Instrumentation
Automatic Test Equipment
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTIONThe ADG731/ADG725 are monolithic, CMOS, 32-channel/
dual 16-channel analog multiplexers with a serially controlled
3-wire interface. The ADG731 switches one of 32 inputs
(S1–S32) to a common output, D. The ADG725 can be config-
ured as a dual mux switching one of 16 inputs to one output, or a
differential mux switching one of 16 inputs to a differential output.
These mulitplexers utilize a 3-wire serial interface that is com-
patible with SPI™, QSPI™, MICROWIRE™, and some DSP
interface standards. On power-up, the Internal Shift Register
contains all zeros and all switches are in the OFF state.
These multiplexers are designed on an enhanced submicron
process that provides low power dissipation yet gives high switch-
ing speed with very low on resistance and leakage currents.
They operate from a single supply of 1.8 V to 5.5 V or a
±2.5 V dual supply, making them ideally suited to a variety of
applications. On resistance is in the region of a few ohms, is
closely matched between switches, and is very flat over the full
signal range.
These parts can operate equally well as either multiplexers or
demultiplexers and have an input signal range that extends to
the supplies. In the OFF condition, signal levels up to the sup-
plies are blocked. All channels exhibit break-before-make
switching action, preventing momentary shorting when switch-
ing channels.
The ADG731 and ADG725 are serially controlled 32-channel,
and dual/differential 16-channel multiplexers, respectively. They
are available in either a 48-lead CSP or TQFP package.
PRODUCT HIGHLIGHTS3-Wire Serial Interface1.8 V to 5.5 V Single-Supply or ±2.5 V Dual-Supply
Operation. These parts are specified and guaranteed
with 5 V ±10%, 3 V ±10% single-supply, and
±2.5 V ±10% dual-supply rails.On Resistance of 4 ΩGuaranteed Break-Before-Make Switching Action7 mm × 7 mm 48-Lead Chip Scale Package (CSP)
or 48-Lead TQFP Package
ADG725/ADG731–SPECIFICATIONS1(VDD = 5 V ±10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)NOTESTemperature range is as follows: B Version: –40°C to +85°C.Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
ADG725/ADG731
SPECIFICATIONS1
(VDD = 3 V �10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)NOTESTemperature range is as follows: B Version: –40°C to +85°C.Guaranteed by design, not subject to production test.
ADG725/ADG731
DUAL-SUPPLY SPECIFICATIONS1(VDD = +2.5 V �10%, VSS = –2.5 V �10%, GND = 0 V, unless
otherwise noted.)
ADG725/ADG731
TIMING CHARACTERISTICS1,2fSCLK
NOTESSee Figure 1.All input signals are specified with tr = tf = 5 ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2.
Specifications subject to change without notice.
Figure 1.3-Wire Serial Interface Timing Diagram
Figure 2.ADG725 Input Shift Register Contents
DB7 (MSB)Figure 3.ADG731 Input Shift Register Contents
ADG725/ADG731
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADG725/ADG731 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS1(TA = 25°C, unless otherwise noted.)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +7 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . .+0.3 V to –7 V
Analog Inputs2 . . . . . . . . . . . . . .VSS – 0.3 V to VDD + 0.3 V or
30 mA, Whichever Occurs First
Digital Inputs2 . . . . . . . . . . . . . . . . . .–0.3 V to VDD + 0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . .60 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . .30 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature Range . . . . . . . . . . . .–65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .150°C
Thermal Impedance (Four-Layer Board)
48-lead CSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25°C/W
48-lead TQFP . . . . . . . . . . . . . . . . . . . . . . . . . . .54.6°C/W
Lead Temperature, Soldering (10 seconds) . . . . . . . . . .300°C
IR Reflow, Peak Temperature (<20 seconds) . . . . . . . .235°C
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.Overvoltages at SCLK, SYNC, DIN, S, or D will be clamped by internal diodes.
Current should be limited to the maximum ratings given.
ORDERING GUIDEADG725BSU
ADG731BCP
PIN CONFIGURATIONS
PIN FUNCTION DESCRIPTIONS
48-Lead CSP and TQFP
ADG725/ADG731
Table I. ADG725 Truth Table
X = Don’t Care
Table II. ADG731 Truth TableA3A2A1A0ENENENENENCSCSCSCSCS
Switch Condition
