ADG466BR-ADG466BRM-ADG467BR-ADG467BRS Fast Delivery |IC PHOENIX CO.,LIMITED

ADG467BR ,Triple and Octal Channel ProtectorsSpecifications subject to change without notice.–2–REV. AADG466/ADG4671PIN CONFIGURATIONSABSOLUTE M ..
ADG467BRS ,Triple and Octal Channel ProtectorsFEATURES FUNCTIONAL BLOCK DIAGRAMSFault and Overvoltage Protection up to 640 VSignal Paths Open Cir ..
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ADG506AKN ,CMOS 8-/16-Channel Analog MultiplexersSPECIFICATIONSDual Supply (V = +10.8 V to +16.5 V, V = –10.8 V to –16.5 V unless otherwise noted)DD ..
ADG506AKN .. ,CMOS 8-/16-Channel Analog MultiplexersFEATURES44 V Supply Maximum RatingV to V Analog Signal RangeSS DDSingle/Dual Supply
AF4A1950S60DCC , Array BPF (AF Type)
AF82801IBM , Mobile Intel® GM45, GS45, and GL40 Express Chipsets for Embedded Computing
AF82801IEM , Mobile Intel® GM45, GS45, and GL40 Express Chipsets for Embedded Computing
AF9410N , N-Channel 30-V (D-S) MOSFET
AF9435P , P-Channel 30-V (D-S) MOSFET
AF9435P , P-Channel 30-V (D-S) MOSFET

ADG466BR-ADG466BRM-ADG467BR-ADG467BRS
Triple and Octal Channel Protectors
REV.Ariple and Octal
Channel Protectors
FUNCTIONAL BLOCK DIAGRAMS
GENERAL DESCRIPTION
The ADG466 and ADG467 are triple and octal channel pro-
tectors, respectively. The channel protector is placed in series
with the signal path. The channel protector will protect sensitive
components from voltage transience in the signal path whether
the power supplies are present or not. Because the channel
protection works whether the supplies are present or not, the
channel protectors are ideal for use in applications where
correct power sequencing can’t always be guaranteed (e.g., hot-
insertion rack systems) to protect analog inputs. This is dis-
cussed further, and some example circuits are given in the
Applications section of this data sheet.
Each channel protector has an independent operation and con-
sists of an n-channel MOSFET, a p-channel MOSFET and an
n-channel MOSFET, connected in series. The channel protec-
tor behaves just like a series resistor during normal operation,
i.e., (VSS + 2V) < VIN < (VDD – 1.5V). When a channel’s ana-
log input exceeds the power supplies (including VDD and VSS =V), one of the MOSFETs will switch off, clamping the output
to either VSS + 2V or VDD – 1.5V. Circuitry and signal source
protection is provided in the event of an overvoltage or power
loss. The channel protectors can withstand overvoltage inputs
from –40V to +40V. See the Circuit Information section of
this data sheet.
The ADG466 and ADG467 can operate off both bipolar and
unipolar supplies. The channels are normally on when power is
connected and open circuit when power is disconnected. With
power supplies of ±15V, the on-resistance of the ADG466 and
FEATURES
Fault and Overvoltage Protection up to 640V
Signal Paths Open Circuit with Power Off
Signal Path Resistance of RON with Power On
44 V Supply Maximum Ratings
Low On Resistance
ADG466/ADG467 60V typ
1 nA Max Path Current Leakage @ +258C
Low RON Match (5 V max)
Low Power Dissipation 0.8mW typ
Latch-Up Proof Construction
APPLICATIONS
ATE Equipment
Sensitive Measurement Equipment
Hot-Insertion Rack Systems
ADG467 is 60Ω typ with a leakage current of ±1nA max.
When power is disconnected, the input leakage current is ap-
proximately ±5nA typ.
The ADG466 is available in 8-lead DIP, SOIC and μSOIC
packages. The ADG467 is available in an 18-lead SOIC package
and a 20-lead SSOP package.
PRODUCT HIGHLIGHTSFault Protection.
The ADG466 and ADG467 can withstand continuous volt-
age inputs from –40V to +40V. When a fault occurs due to
the power supplies being turned off or due to an overvoltage
being applied to the ADG466 and ADG467, the output is
clamped. When power is turned off, current is limited to the
microampere level.Low Power Dissipation.Low RON.
ADG466/ADG467 60Ω typ.Trench Isolation Latch-Up Proof Construction.
A dielectric trench separates the p- and n-channel MOSFETs
thereby preventing latch-up.
ADG466/ADG467–SPECIFICATIONS
Dual Supply1
LEAKAGE CURRENTS
NOTESTemperature range is as follows: B Version: –40°C to +85°C.Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(VDD = +15V, VSS = –15V, GND = 0V, unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS1
(TA = +25°C unless otherwise noted)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+44V
VS, VD, Analog Input Overvoltage with Power ON2
. . . . . . . . . . . . . . . . . . . . . . . . . . . .VSS – 20V to VDD + 20V
VS, VD, Analog Input Overvoltage with Power OFF2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–35V to +35V
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . .20mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . .40mA
(Pulsed at 1ms, 10% Duty Cycle Max)
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +125°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Plastic DIP Package
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . .125°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . .+260°C
SOIC Package
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . .160°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C
μSOIC Package
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . .160°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C
SSOP Package
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . .130°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability. Only one absolute maxi-
mum rating may be applied at any one time.Overvoltages at S or D will be clamped by the channel protector, see Circuit
Information section of the data sheet.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG466/ADG467 features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
PIN CONFIGURATIONS
8-Lead
DIP, SOIC18-Lead
and mSOICSOIC
20-Lead
SSOP
ORDERING GUIDE
ADG466/ADG467–Typical Performance Characteristics
VD – Volts
ON –1010–505
Figure 1.On Resistance as a Function of VDD and VD
(Input Voltage)–1010–505
VD – Volts
ON
Figure 2.On Resistance as a Function of Temperature
and VD (Input Voltage)
ADG467
VD – Volts
ON
Figure 3.On Resistance as a Function of VDD and VD
(Input Voltage)
10V
500mV5.00VCh25.00VM50.0nsCh1
–5V
15V
Figure 4.Positive Overvoltage Transience Response

Figure 5.Negative Overvoltage Transience Response
Figure 6.Overvoltage Ramp
Figure 7.Frequency Response (Magnitude) of the ADG467,
VDD/VSS = ±15 V and Input Signal Level of ±100 mV

10010M1k10k100k1M
FREQUENCY – Hz
PHASE – Degrees
Figure 8.Frequency Response (Phase) of the ADG467,
VDD/VSS = ±15 V and Input Signal Level of ±100 mV
100k10k
FREQUENCY – Hz10M40M
CROSSTALK – dB
Figure 9.Crosstalk Between Adjacent Channels of the
ADG467, VDD/VSS = ±15 V and Input Signal Level of ±100 mV

10k40M100k1M10M
FREQUENCY – Hz
OFF ISOLATION – dB
Figure 10.Off Isolation of the ADG467, VDD/VSS = 0 V and
Input Signal Level of ±100 mV
Figure 11.Propagation Delay Through ADG467, VDD/VSS =
±15 V, Channel 1 Input and Channel 2 Output

100k40M1M10M
FREQUENCY – Hz
GAIN – dB
Figure 12.Frequency Response (Magnitude) of the ADG466,
VDD/VSS = ±15 V and Input Signal Level of ±100 mV
ADG466/ADG467
10010M1k10k100k1M
FREQUENCY – Hz
40M
PHASE – Degrees
Figure 13.Frequency Response (Phase) of the ADG466, VDD/
VSS = ±15 V and Input Signal Level of ±100 mV
10k40M100k1M10M
FREQUENCY – Hz
CROSSTALK – dB
Figure 14.Crosstalk Between Adjacent Channels of the
ADG466, VDD/VSS = ±15 V and Input Signal Level of ±100 mV
10k40M100k1M10M
FREQUENCY – Hz
OFF ISOLATION – dB
Figure 15.Off Isolation of the ADG466, VDD/VSS = 0 V and
Input Signal Level of ±100 mV
Figure 16.Propagation Delay Through ADG466, VDD/VSS =
±15 V, Channel 1 Input and Channel 2 Output

Partno	Mfg	Dc	Qty	Available	Descript
ADG466BR	AD	N/a	52	avai	Triple and Octal Channel Protectors
ADG466BRM	AD	N/a	1	avai	Triple and Octal Channel Protectors
ADG467BR	AD	N/a	185	avai	Triple and Octal Channel Protectors
ADG467BRS	AD	N/a	31	avai	Triple and Octal Channel Protectors