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ADG3246BRU
2.5 V/3.3 V, 10 Bit, 2 Port Level Translator, Bus Switch
REV.0
2.5 V/3.3 V, 10-Bit, 2-Port
Level Translating, Bus Switch
FEATURES
225 ps Propagation Delay through the Switch
4.5 � Switch Connection between Ports
Data Rate 1.244 Gbps
2.5 V/3.3 V Supply Operation
Selectable Level Shifting/Translation
Small Signal Bandwidth 610 MHz
Level Translation
3.3 V to 2.5 V
3.3 V to 1.8 V
2.5 V to 1.8 V
24-Lead TSSOP and LFCSP Packages
APPLICATIONS
3.3 V to 1.8 V Voltage Translation
3.3 V to 2.5 V Voltage Translation
2.5 V to 1.8 V Voltage Translation
Bus Switching
Bus Isolation
Hot Swap
Hot Plug
Analog Signal Switching
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTIONThe ADG3246 is a 2.5 V or 3.3 V, 10-bit, 2-port digital switch.
It is designed on Analog Devices’ low voltage CMOS process,
which provides low power dissipation yet gives high switching
speed and very low on resistance, allowing inputs to be connected
to outputs without additional propagation delay or generating
additional ground bounce noise.
The switches are enabled by means of the bus enable (BE)
input signal. These digital switches allow bidirectional signals to
be switched when ON. In the OFF condition, signal levels up to
the supplies are blocked.
This device is ideal for applications requiring level translation.
When operated from a 3.3 V supply, level translation from 3.3V
inputs to 2.5 V outputs occurs. Similarly, if the device is oper-
ated from a 2.5 V supply and 2.5 V inputs are applied, the device
will translate the outputs to 1.8 V. In addition to this, the ADG3246
has a level translating select pin (SEL). When SEL is low, VCC is
reduced internally, allowing for level translation between 3.3V
inputs and 1.8 V outputs. This makes the device suited to appli-
cations requiring level translation between different supplies,
such as converter to DSP/microcontroller interfacing.
PRODUCT HIGHLIGHTS3.3 V or 2.5 V supply operationExtremely low propagation delay through switch4.5 W switches connect inputs to outputsLevel/voltage translation24-lead 4 mm ¥ 4 mm LFCSP and 24-lead TSSOP packages
ADG3246–SPECIFICATIONS1(VCC = 2.3 V to 3.6 V, GND = 0 V, all specifications TMIN to TMAX, unless
otherwise noted.)DIGITAL SWITCH
NOTESTemperature range is as follows: B Version: –40∞C to +85∞C.Typical values are at 25∞C, unless otherwise stated.Guaranteed by design, not subject to production test.The digital switch contributes no propagation delay other than the RC delay of the typical RON of the switch and the load capacitance when driven by an ideal voltage
source. Since the time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay
of the digital switch when used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.Propagation delay matching between channels is calculated from the on resistance matching and load capacitance of 50 pF.See Timing Measurement Information section.This current applies to the control pin (BE) only. The A and B ports contribute no significant ac or dc currents as they transition.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*(TA = 25°C, unless otherwise noted.)
VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to +4.6 V
Digital Inputs to GND . . . . . . . . . . . . . . . . . –0.5 V to +4.6 V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . –0.5 V to +4.6 V
DC Output Current . . . . . . . . . . . . . . . . . . 25 mA per channel
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
LFCSP Package
�JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . 35°C/W
TSSOP Package
�JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 128°C/W
Lead Temperature, Soldering (10 seconds) . . . . . . . . . . 300°C
IR Reflow, Peak Temperature (<20 seconds) . . . . . . . . 235°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
Table I.Pin Description
PIN CONFIGURATION
24-Lead LFCSP and TSSOP
PIN 1
INDICATOR
TOP VIEW
18 BE
17 B0
16 B1
15 B2
SEL 1
A5 2
A6 3
24 A4
14 B3
13 B4
GND 7
B9 8B8 9
B7 10B6 11B5 1
A7 4
A8 5
A9 6
23 A322 A221 A120 A019 V
ADG3246
Table II.Truth Table*SEL = 0 only when VDD = 3.3 V ± 10%
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADG3246 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
ORDERING GUIDE
ADG3246
TERMINOLOGYGND
VINH
VINL
IOZ
IOL
RON
�RON
CIN
�ICC
tPLH, tPHL
tPZH, tPZL
Max Data Rate
Channel Jitter
TPC 1.On Resistance vs.
Input Voltage
TPC 4.On Resistance vs. Input
Voltage for Different Temperatures
TPC 7.Pass Voltage vs. VCC
TPC 2.On Resistance vs.
Input Voltage
TPC 5.On Resistance vs. Input
Voltage for Different Temperatures
TPC 8.Pass Voltage vs. VCC
TPC 3.On Resistance vs.
Input Voltage
TPC 6.Pass Voltage vs. VCC
TPC 9.ICC vs. Enable Frequency
ADG3246TPC 10.Output Low Characteristic
TPC 13.Bandwidth vs. Frequency
TPC 16.Enable/Disable Time
vs. Temperature
TPC 11.Output High Characteristic
TPC 14.Crosstalk vs. Frequency
TPC 17.Enable/Disable Time
vs. Temperature
TPC 12.Charge Injection vs.
Source Voltage
TPC 15.Off Isolation vs.
Frequency
TPC 18.Jitter vs. Data Rate;
PRBS 31