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ADE7763ARS-ADE7763ARSZ
Single Phase Active and Apparent Energy Metering IC with di/dt Input (Serial-Port Interface)
Single-Phase Active and Apparent
Energy Metering IC
Rev. A
FEATURES
High accuracy; supports IEC 61036/60687, IEC62053-21, and
IEC62053-22
On-chip digital integrator enables direct interface-to-current
sensors with di/dt output
A PGA in the current channel allows direct interface to
shunts and current transformers
Active and apparent energy, sampled waveform, and current
and voltage rms
Less than 0.1% error in active energy measurement over a
dynamic range of 1000 to 1 at 25°C
Positive-only energy accumulation mode available
On-chip user programmable threshold for line voltage surge
and SAG and PSU supervisory
Digital calibration for power, phase, and input offset
On-chip temperature sensor (±3°C typical)
SPI®-compatible serial interface
Pulse output with programmable frequency
Interrupt request pin (IRQ) and status register
Reference 2.4 V with external overdrive capability
Single 5 V supply, low power (25 mW typical)
GENERAL DESCRIPTION The ADE77631 features proprietary ADCs and fixed function
DSP for high accuracy over large variations in environmental
conditions and time. The ADE7763 incorporates two second-
order, 16-bit Σ-∆ ADCs, a digital integrator (on Ch1), reference
circuitry, a temperature sensor, and all the signal processing
required to perform active and apparent energy measurements,
line-voltage period measurements, and rms calculation on the
voltage and current channels. The selectable on-chip digital
integrator provides direct interface to di/dt current sensors such
as Rogowski coils, eliminating the need for an external analog
integrator and resulting in excellent long-term stability and
precise phase matching between the current and the voltage
channels.
The ADE7763 provides a serial interface to read data and a
pulse output frequency (CF) that is proportional to the active
power. Various system calibration features such as channel
offset correction, phase calibration, and power calibration
ensure high accuracy. The part also detects short duration, low
or high voltage variations.
The positive-only accumulation mode gives the option to
accumulate energy only when positive power is detected. An
internal no-load threshold ensures that the part does not exhibit
any creep when there is no load. The zero-crossing output (ZX)
produces a pulse that is synchronized to the zero-crossing point
of the line voltage. This signal is used internally in the line cycle
active and apparent energy accumulation modes, which enables
faster calibration.
The interrupt status register indicates the nature of the interrupt,
and the interrupt enable register controls which event produces
an output on the IRQ pin, an open-drain, active low logic output.
The ADE7763 is available in a 20-lead SSOP package.
FUNCTIONAL BLOCK DIAGRAM
AVDDDVDDDGND
CLKINCLKOUTDINDOUTSCLKREFIN/OUTCSIRQAGNDA-001
V1P
V1N
V2N
V2PFigure 1. U.S. Patents 5,745,323; 5,760,617; 5,862,069; 5,872,469; others pending.
TABLE OF CONTENTS Specifications.....................................................................................3
Timing Characteristics.....................................................................5
Absolute Maximum Ratings............................................................6
ESD Caution..................................................................................6
Terminology......................................................................................7
Pin Configuration and Function Descriptions.............................8
Typical Performance Characteristics...........................................10
Theory of Operation......................................................................13
Analog Inputs..............................................................................13
di/dt Current Sensor and Digital Integrator...........................14
Zero-Crossing Detection...........................................................15
Period Measurement..................................................................16
Power Supply Monitor...............................................................16
Line Voltage Sag Detection.......................................................17
Peak Detection............................................................................17
Interrupts.....................................................................................18
Temperature Measurement.......................................................19
Analog-to-Digital Conversion..................................................19
Channel 1 ADC..........................................................................20
Channel 2 ADC..........................................................................22
Phase Compensation..................................................................24
Active Power Calculation..........................................................25
Energy Calculation.....................................................................26
Power Offset Calibration...........................................................28
Energy-to-Frequency Conversion............................................28
Line Cycle Energy Accumulation Mode.................................30
Positive-Only Accumulation Mode.........................................30
No-Load Threshold....................................................................30
Apparent Power Calculation.....................................................31
Apparent Energy Calculation...................................................32
Line Apparent Energy Accumulation......................................33
Energies Scaling..........................................................................34
Calibrating an Energy Meter....................................................34
CLKIN Frequency......................................................................43
Suspending Functionality..........................................................44
Checksum Register.....................................................................44
Serial Interface............................................................................44
Registers...........................................................................................47
Register Descriptions.....................................................................50
Communication Register..........................................................50
Mode Register (0x09).................................................................50
Interrupt Status Register (0x0B), Reset Interrupt Status
Register (0x0C), Interrupt Enable Register (0x0A)...............52
CH1OS Register (0x0D)............................................................53
Outline Dimensions.......................................................................54
Ordering Guide..........................................................................54
REVISION HISTORY
10/04—Data Sheet Changed from Rev. 0 to Rev. A Changes to Period Measurement Section..................................16
Changes to Temperature Measurement Section........................19
Change to Energy-to-Frequency Conversion Section..............28
Update to Figure 61.......................................................................29
Change to Apparent Energy Calculation Section.....................32
Change to Description of AEHF and VAEHF Bits...................52
4/04—Revision 0: Initial Version SPECIFICATIONSAVDD = DVDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, CLKIN = 3.579545 MHz XTAL, TMIN to TMAX = –40°C to +85°C.
Table 1. Specifications1, 2
__________________ See the Terminology section for explanation of specifications.
2 See the plots in the Typical Performance Characteristics section. See the Analog Inputs section.
+2.1V200µA
50pFPIN
TIMING CHARACTERISTICSAVDD = DVDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, CLKIN = 3.579545 MHz XTAL, TMIN to TMAX = −40°C to +85°C.
Table 2. Timing Characteristics1, 2________ Sample tested during initial release and after any redesign or process change that could affect this parameter. All input signals are specified with tr = tf = 5 ns (10% to
90%) and timed from a voltage level of 1.6 V. See Figure 3, Figure 4, and the Serial Interface section.
3 Minimum time between read command and data read for all registers except waveform register, which is t9 = 500 ns min. Measured with the load circuit in Figure 2 and defined as the time required for the output to cross 0.8 V or 2.4 V.
5 Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit in Figure 2. The measured number is then extrapolated back
to remove the effects of charging or discharging the 50 pF capacitor. This means that the time quoted in the timing characteristics is the true bus relinquish time of
the part and is independent of the bus loading.
DIN
SCLK
COMMAND BYTEMOST SIGNIFICANT BYTELEAST SIGNIFICANT BYTE04481-A
Figure 3. Serial Write Timing
SCLK
DIN
DOUT
COMMAND BYTEMOST SIGNIFICANT BYTELEAST SIGNIFICANT BYTE04481-A
-004
