ADE7757ARN Fast Delivery |IC PHOENIX CO.,LIMITED

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ADE7757ARN
Energy Metering IC with Integrated Oscillator
REV.PrC.
PRELIMINARY TECHNICAL DATA
Energy Metering IC
with Integrated Oscillator
FEATURES
On Chip Oscillator as clock source
High Accuracy, Supports 50 Hz/60 Hz IEC 521/1036
Less than 0.1% Error Over a Dynamic Range of
500 to 1
The ADE7757 Supplies Average Real Power on the
Frequency Outputs F1 and F2
The High Frequency Output CF Is Intended for
Calibration and Supplies Instantaneous Real Power
Direct Drive for Electromechanical Counters and
Two Phase Stepper Motors (F1 and F2)
Proprietary ADCs and DSP Provide High Accuracy over
Large Variations in Environmental Conditions and
Time
On-Chip Power Supply Monitoring
On-Chip Creep Protection (No Load Threshold)
On-Chip Reference 2.5 V � 8% (30 ppm/�C Typical)
with External Overdrive Capability
Single 5 V Supply, Low Power (15 mW Typical)
Low Cost CMOS Process
AC Input only
GENERAL DESCRIPTION
The ADE7757 is a high accuracy electrical energy mea-
surement IC. It is a pin reduction version of AD7755
with an enhancement of a precise oscillator circuit that
serves as a clock source to the chip. The ADE7757
eliminates the cost of an external crystal or resonator,
thus reducing the overall cost of a meter built with this
IC. The chip directly interfaces with shunt resistor and
only operates with AC input.
*U.S. Patents 5,745,323, 5,760,617, 5,862,069, 5,872,469; other pending.
FUNCTIONAL BLOCK DIAGRAM
The ADE7757 specifications surpass the accuracy require-
ments as quoted in the IEC1036 standard. Due to the
similarity between the ADE7757 and AD7755, the Appli-
cation Note AN-559 can be used as a basis for a descrip-
tion of an IEC1036 low cost watt-hour meter reference
design.
The only analog circuitry used in the ADE7757 is in the
sigma-delta ADCs and reference circuit. All other signal
processing (e.g., multiplication and filtering) is carried
out in the digital domain. This approach provides superior
stability and accuracy over time and extreme environmen-
tal conditions.
The ADE7757 supplies average real power information on
the low frequency outputs F1 and F2. These outputs may
be used to directly drive an electromechanical counter or
interface with an MCU. The high frequency CF logic
output, ideal for calibration purposes, provides instanta-
neous real power information.
The ADE7757 includes a power supply monitoring circuit
on the VDD supply pin. The ADE7757 will remain in reset
mode until the supply voltage on VDD reaches approxi-
mately 4V. If the supply falls below 4V, the ADE7757
will also reset and the F1, F2 and CF outputs will be in
their non-active modes.
Internal phase matching circuitry ensures that the voltage
and current channels are phase matched while the HPF in
the current channel eliminates dc offsets. An internal no-
load threshold ensures that the ADE7757 does not exhibit
creep when no load is present.
The ADE7757 is available in 16-lead SOIC narrow-body
package.
RESERVED
V2P
V2N
V1P
RCLKINREFIN/OUTF1F2CFSCFS0S1
4kV
V1N
ADE7757
VDDAGNDDGND
PRELIMINARY TECHNICAL DATA
ADE7757–SPECIFICATIONS
(VDD = 5 V � 5%, AGND = DGND = 0 V, On-Chip Reference, rCKLIN = 5 kΩ 0.1% 5ppm/°C,
TMIN to TMAX = –40�C to +85�C)
ACCURACY
REFERENCE INPUT
LOGIC OUTPUTS
PRELIMINARY TECHNICAL DATA
ADE7757
TIMING CHARACTERISTICS1, 2
NOTESSample tested during initial release and after any redesign or process change that may affect this parameter.See Figure 1.The pulsewidths of F1, F2 and CF are not fixed for higher output frequencies. See Frequency Outputs Section.The CF pulse is always 18 µs in the high frequency mode. See Frequency Outputs section and Table III.
Specifications subject to change without notice.
ORDERING GUIDE
Figure 1.Timing Diagram for Frequency Outputs
(VDD = 5 V � 5%, AGND = DGND = 0 V, On-Chip Reference, rCKLIN = 5 kΩ 0.1% 5ppm/°C,
TMIN to TMAX = –40�C to +85�C)
PRELIMINARY TECHNICAL DATA
ADE7757
ABSOLUTE MAXIMUM RATINGS*
(TA = +25°C unless otherwise noted)
VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Analog Input Voltage to AGND
V1P, V1N, V2P and V2N . . . . . . . . . . . . . . . –6 V to +6 V
Reference Input Voltage to AGND . . . –0.3 V to VDD + 0.3 V
Digital Input Voltage to DGND . . . . . –0.3 V to VDD + 0.3 V
Digital Output Voltage to DGND . . . . –0.3 V to VDD + 0.3 V
Operating Temperature Range
Industrial (A, B Versions) . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADE7757 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
16-Lead Plastic SOIC, Power Dissipation . . . . . . . . .350mW
θJA Thermal Impedance** . . . . . . . . . . . . . . . . .124.9°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . +220°C
*Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
**JEDEC 1S Standard (2 layer) Board Data
TERMINOLOGY
MEASUREMENT ERROR
The error associated with the energy measurement made by the
ADE7757 is defined by the following formula:%1007757×−=EnergyTrue
EnergyTrueADEbyregisteredEnergyError
PHASE ERROR BETWEEN CHANNELS
The HPF (High Pass Filter) in the current channel (Channel
V1) has a phase lead response. To offset this phase response
and equalize the phase response between channels, a phase
correction network is also placed in Channel V1. The phase
correction network matches the phase to within ±0.1° over a
range of 45 Hz to 65 Hz and ±0.2° over a range 40 Hz to 1
kHz. See Figures 19 and 20.
POWER SUPPLY REJECTION
This quantifies the ADE7757 measurement error as a percent-
age of reading when the power supplies are varied.
For the ac PSR measurement a reading at nominal supplies
(5 V) is taken. A 200 mV rms/100 Hz signal is then introduced
onto the supplies and a second reading obtained under the
same input signal levels. Any error introduced is expressed as a
percentage of reading—see Measurement Error definition.
For the dc PSR measurement a reading at nominal supplies
(5 V) is taken. The supplies are then varied ±5% and a second
reading is obtained with the same input signal levels. Any error
introduced is again expressed as a percentage of reading.
ADC OFFSET ERROR
This refers to the small dc signal (offset) associated with the
analog inputs to the ADCs. However, the HPF in Channel V1
eliminates the offset in the circuitry. Therefore, the power cal-
culation is not affected by this offset.
FREQUENCY OUTPUT ERROR
The frequency output error of the ADE7757 is defined as
the difference between the measured output frequency (mi-
nus the offset) and the ideal output frequency. The differ-
ence is expressed as a percentage of the ideal frequency.
The ideal frequency is obtained from the ADE7757 trans-
fer function—see Transfer Function section.
GAIN ERROR
The gain error of the ADE7757 is defined as the differ-
ence between the measured output frequency (minus the
offset) and the ideal output frequency. It is measured with
a gain of 1 in channel V1. The difference is expressed as a
percentage of the ideal frequency. The ideal frequency is
obtained from the ADE7757 transfer function—see Trans-
fer Function section.
PRELIMINARY TECHNICAL DATA
ADE7757
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATION
SOIC-16nb Package
PRELIMINARY TECHNICAL DATA
ADE7757
–Typical Performance Characteristics
Figure 2.Error as a % Reading over Temperature on-chip
reference (PF=1)
Figure 3.Error as a % of Reading over Temperature with
on-chip reference (PF=0.5)
Figure 5. Error as a % of Reading over Temperature with
External Reference (PF=0.5)
Figure 6. Error as a %of Reading over Input Frequency
PRELIMINARY TECHNICAL DATA
Figure 8. Channel V1 Offset Distribution
Figure 9. PSR with Internal Reference
Figure 10. PSR with External Reference

Partno	Mfg	Dc	Qty	Available	Descript
ADE7757ARN	AD	N/a	6	avai	Energy Metering IC with Integrated Oscillator