ADCMP565BP ,Dual Ultrafast Voltage Comparator (Formerly the AD53519)features 300 ps propagation delay with less than 50 ps overdrive High speed instrumentation dispers ..
ADCMP567BCPZ ,Dual Ultrafast Voltage Comparatorfeatures 250 ps propagation delay with less than 35 ps overdrive High speed instrumentation dispers ..
ADCMP582BCPZ-RL7 , Ultrafast SiGe Voltage Comparators
ADCMP600BKSZ-REEL7 , Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators
ADCMP600BRJZ-REEL7 , Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators
ADCMP600BRJZ-REEL7 , Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators
ADV7170KSUZ ,Digital PAL/NTSC Video Encoder with 10-Bit SAFF™ and Advanced Power Management & Macrovision 7.01SPECIFICATIONSAA REF SET MIN MAX1Parameter Conditions Min Typ Max Unit3STATIC PERFORMANCEResolution ..
ADV7171KS ,Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Managementspecifications are guaranteed over this range. The max/min values are typical over 3.0 V to 3.6 V.1 ..
ADV7171KSU ,Digital PAL/NTSC Video Encoder with 10-Bit SAFF tm and Advanced Power ManagementFeatures Programmable LUMA DelayCGMS (Copy Generation Management System) Individual ON/OFF Control ..
ADV7171KSU-REEL ,Digital PAL/NTSC Video Encoder with 10-Bit SAFF tm and Advanced Power Managementspecifications are guaranteed over this range. The max/min values are typical over 3.0 V to 3.6 V.1 ..
ADV7171KSUZ ,Digital PAL/NTSC Video Encoder with 10-Bit SAFF tm and Advanced Power ManagementSPECIFICATIONSAA REF SET MIN MAX1Parameter Conditions Min Typ Max Unit3STATIC PERFORMANCEResolution ..
ADV7171KSUZ-REEL , Digital PAL/NTSC Video Encoder
ADCMP565BP
Dual Ultrafast Voltage Comparator (Formerly the AD53519)
Dual Ultrafast
Voltage Comparator
Rev. 0
FEATURES
300 ps propagation delay input to output
50 ps propagation delay dispersion
Differential ECL compatible outputs
Differential latch control
Robust input protection
Input common-mode range −2.0 V to +3.0 V
Input differential range ±5 V
Power supply sensitivity greater than 65 dB
200 ps minimum pulsewidth
5 GHz equivalent input rise time bandwidth
Typical output rise/fall of 160 ps
SPT 9689 replacement
APPLICATIONS
High speed instrumentation
Scope and logic analyzer front ends
Window comparators
High speed line receivers and signal restoration
Threshold detection
Peak detection
High speed triggers
Patient diagnostics
Disk drive read channel detection
Hand-held test instruments
Zero-crossing detectors
Clock drivers
Automatic test equipment
FUNCTIONAL BLOCK DIAGRAM
NONINVERTING
INPUT
INVERTING
INPUT
LATCH ENABLE
INPUT
INPUT02820-0-001Figure 1.
GENERAL DESCRIPTION The ADCMP565 is an ultrafast voltage comparator fabricated
on Analog Devices’ proprietary XFCB process. The device
features 300 ps propagation delay with less than 50 ps overdrive
dispersion. Overdrive dispersion, a particularly important
characteristic of high speed comparators, is a measure of the
difference in propagation delay under differing overdrive
conditions.
A fast, high precision differential input stage permits consis-
tent propagation delay with a wide variety of signals in the
common-mode range from −2.0 V to +3.0 V. Outputs are
complementary digital signals fully compatible with ECL 10 K
and 10 KH logic families. The outputs provide sufficient drive
current to directly drive transmission lines terminated in 50 Ω
to −2 V. A latch input is included, which permits tracking,
track-and-hold, or sample-and-hold modes of operation.
The ADCMP565 is available in a 20-lead PLCC package.
TABLE OF CONTENTS Specifications.....................................................................................3
Absolute Maximum Ratings............................................................5
Thermal Considerations..............................................................5
ESD Caution..................................................................................5
Pin Configuration and Function Descriptions.............................6
Timing Information.........................................................................8
Application Information..................................................................9
Clock Timing Recovery...............................................................9
Optimizing High Speed Performance........................................9
Comparator Propagation Delay Dispersion..............................9
Comparator Hysteresis..............................................................10
Minimum Input Slew Rate Requirement................................10
Typical Application Circuits.....................................................11
Typical Performance Characteristics...........................................12
Outline Dimensions.......................................................................14
Ordering Guide..........................................................................14
REVISION HISTORY Revision 0: Initial Version
SPECIFICATIONS
Table 1. ADCMP565 ELECTRICAL CHARACTERISTICS (VCC = +5.0 V, VEE = −5.2 V, TA = 25°C, unless otherwise noted.)
NOTE: Under no circumstances should the input voltages exceed the supply voltages. ABSOLUTE MAXIMUM RATINGS
Table 2. ADCMP565 Absolute Maximum Ratings Stress above those listed under Absolute Maximum Ratings may
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
THERMAL CONSIDERATIONS The ADCMP565 20-lead PLCC package option has a θJA
(junction-to-ambient thermal resistance) of 89.4°C/W in
still air.
ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC = NO CONNECT
GND
LEB
VCCNCQB
–INNC
–INLEB02820-0-002 Figure 2. ADCMP565 Pin Configuration
Table 3. ADCMP565 Pin Descriptions
TIMING INFORMATION
50%
VREF± VOS
50%
DIFFERENTIAL
INPUT VOLTAGE
LATCH ENABLE
Q OUTPUT
Q OUTPUT
LATCH ENABLE02820-0-003 Figure 3. System Timing Diagram
The timing diagram in Figure 3 shows the ADCMP565 compare
and latch features. Table 4 describes the terms in the diagram.
Table 4. Timing Descriptions
