ADC12DL066CIVS ,Dual 12-Bit, 66 MSPS, 450 MHz Input Bandwidth A/D Converter w/Internal ReferenceFeaturesn Single +3.3V supply operationThe ADC12DL066 is a dual, low power monolithic CMOSanalog-to ..
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ADC12DL066CIVS
Dual 12-Bit, 66 MSPS, 450 MHz Input Bandwidth A/D Converter w/Internal Reference
ADC12DL066
Dual 12-Bit, 66 MSPS, 450 MHz Input Bandwidth A/D
Converter w/Internal Reference
General DescriptionThe ADC12DL066isa dual, low power monolithic CMOS
analog-to-digital converter capableof converting analogin-
put signals into 12-bit digital wordsat66 Megasamples per
second (MSPS), minimum. This converter usesa differential,
pipeline architecture with digital error correction andan on-
chip sample-and-hold circuitto minimizedie size and power
consumption while providing excellent dynamic performance
anda 450 MHz Full Power Bandwidth. Operatingona single
3.3V power supply, the ADC12DL066 achieves 10.7 effec-
tive bits and consumes just 686 mWat66 MSPS, including
the reference current. The Power Down feature reduces
power consumptionto75 mW.
The differential inputs provideafull scale differential input
swing equalto2 times VREF with the possibilityofa single-
ended input. Full useof the differential inputis recom-
mendedfor optimum performance. The digital outputs from
the two ADCs are availableon separate 12-bit buses withan
output data format choiceof offset binaryor two’s comple-
ment. ease interfacingto lower voltage systems, the digital
output driver power pinsof the ADC12DL066 canbe con-
nectedtoa separate supply voltagein the rangeof 2.4Vto
the digital supply voltage.
This deviceis availablein the 64-lead TQFP package and
willoperate overthe industrial temperature rangeof −40˚Cto
+85˚C.An evaluation boardis availableto easethe evalua-
tion process.
Features Single +3.3V supply operation Internal sample-and-hold Outputs 2.4Vto 3.3V compatible Pin compatible with ADC12D040 Power down mode On-chip reference
Key Specifications Resolution 12 Bits DNL ±0.5 LSB (typ) SNR(fIN=10 MHz) 66dB (typ) SFDR (fIN=10 MHz) 81dB (typ) Data Latency 6 Clock Cycles Power Consumption Operating 686 mW (typ) Power Down Mode 75 mW (typ)
Applications Ultrasound and Imaging Instrumentation Communications Receivers Sonar/Radar xDSL Cable Modems DSP Front Ends
Connection DiagramMarch 2004
ADC12DL066
Dual
12-Bit,
MSPS,
MHz
Input
Bandwidth
A/D
Converter
w/Internal
Reference
