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ADC12D040CIVSNSN/a3800avaiDual 12-Bit, 40 MSPS, 600 mW A/D Converter with Internal/External Reference


ADC12D040CIVS ,Dual 12-Bit, 40 MSPS, 600 mW A/D Converter with Internal/External ReferenceFeaturesn Binary/2’s complement output formatThe ADC12D040 is a dual, low power monolithic CMOSanal ..
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ADC12D040CIVS
Dual 12-Bit, 40 MSPS, 600 mW A/D Converter with Internal/External Reference
ADC12D040
Dual 12-Bit, 40 MSPS, 600 mW A/D Converter with
Internal/External Reference
General Description

The ADC12D040isa dual, low power monolithic CMOS
analog-to-digital converter capableof converting analogin-
put signals into 12-bit digital wordsat40 Megasamples per
second (MSPS), minimum. This converter usesa differential,
pipeline architecture with digital error correction andan on-
chip sample-and-hold circuitto minimizedie size and power
consumption while providing excellent dynamic perfor-
mance. Operating ona single 5V power supply, the
ADC12D040 achieves 10.9 effective bitsat10 MHz input
and consumes just 600 mWat40 MSPS, including the
reference current. The Power Down feature reduces power
consumptionto75 mW.
The differential inputs provideafull scale differential input
swing equalto 2VREF withthe possibilityofa single-ended
input. Full useof the differential inputis recommendedfor
optimum performance. The digital outputsfor the two ADCs
are availableon separate 12-bit buses withan output data
format choiceof offset binaryor2’s complement.
For easeof interface, the digital output driver power pinsof
the ADC12D040 canbe connectedtoa separate supply
voltagein the rangeof 2.4Vto the digital supply voltage,
making the outputs compatible with low voltage systems.
The ADC12D040’s speed, resolution and single supply op-
eration makeit well suitedfora varietyof applications.
This deviceis availablein the 64-lead TQFP package and
willoperate overthe industrial temperature rangeof −40˚Cto
+85˚C.
Features
Binary/2’s complement output format Single supply operation Internal sample-and-hold Outputs 2.4Vto5V compatible TTL/CMOS compatible inputs/outputs Power down mode On-chip reference buffer Internal/External Reference
Key Specifications
Resolution 12 Bits Conversion Rate 40 MSPS (min) SNR(fIN=10 MHz) 68dB (typ) ENOB(fIN=10 MHz) 10.9 bits (typ) SFDR (fIN=10 MHz) 80dB (typ) Crosstalk 80dB (typ) Data Latency 6 Clock Cycles Supply Voltage +5V ±5% Power Consumption, Operating 600 mW (typ)
Applications
Ultrasound and Imaging Instrumentation Communications Receivers Sonar/Radar xDSL Cable Modems DSP Front Ends
November 2003
ADC12D040
Dual
12-Bit,
MSPS,
A/D
Converter
with
Internal/External
Reference
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