ADC12D040CIVS/NOPB ,Dual 12-Bit, 40 MSPS, 600 mW A/D Converter with Internal/External Reference 64-TQFP -40 to 85FEATURES DESCRIPTIONThe ADC12D040 is a dual, low power monolithic2• Binary or 2’s Complement Output ..
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ADC12D040CIVS/NOPB
Dual 12-Bit, 40 MSPS, 600 mW A/D Converter with Internal/External Reference 64-TQFP -40 to 85
ADC12D040
www.ti.com SNAS171E –JUNE 2002–REVISED MARCH 2013
ADC12D040 Dual 12-Bit, 40 MSPS, 600 mW A/D Converter with Internal/External Reference
Checkfor Samples: ADC12D040
1FEATURES DESCRIPTIONThe ADC12D040isa dual, low power monolithic
Binaryor 2’s Complement Output Format CMOS analog-to-digital converter capable of
• Single Supply Operation converting analog input signals into 12-bit digital
Internal Sample-and-Hold words at 40 Megasamples per second (Msps),
minimum. This converter usesa differential, pipeline
• Outputs 2.4Vto 5V Compatible architecture with digital error correction and an on-
• Power Down Mode chip sample-and-hold circuitto minimize die size and
• Pin-Compatible with ADC12DL066 power consumption while providing excellent dynamic
performance. Operatingona single 5V power supply,
• Internal/External Reference the ADC12D040 achieves 10.9 effective bitsat 10
MHz input and consumes just 600 mWat 40 Msps,
APPLICATIONS including the reference current. The Power Down
• Ultrasound and Imaging feature reduces power consumptionto 75 mW.
Instrumentation The differential inputs providea full scale differential
Communications Receivers input swing equalto 2VREF with the possibilityofa
single-ended input. Full useof the differential inputis
• Sonar/Radar recommended for optimum performance. The digital
• xDSL outputs for the two ADCs are available on separate
• Cable Modems 12-bit buses with an output data format choiceof
offset binaryor 2’s complement.
KEY SPECIFICATIONS For easeof interface, the digital output driver power
SNR (fIN=10 MHz):68 dB (typ) pins of the ADC12D040 can be connected toa
separate supply voltagein the rangeof 2.4Vto the
• ENOB (fIN=10 MHz): 10.9 bits (typ) digital supply voltage, making the outputs compatible
• SFDR (fIN=10 MHz): 80 dB (typ) with low voltage systems. The ADC12D040’s speed,
• Data Latency:6 Clock Cycles resolution and single supply operation makeit well
suited fora varietyof applications.
• Supply Voltage: +5V ±5% Power Consumption, Operating This deviceis availablein the 64-lead TQFP package
and will operate over the industrial temperature range
– (Operating): 600 mW (typ) of −40°Cto +85°C. An evaluation boardis available
75 mW (typ) to facilitate the product evaluation process
