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ADC12451CIJNSN/a25avaiDynamically-Tested Self-Calibrating 12-Bit Plus Sign A/D Converter with Sample and Hold [Life-time buy]


ADC12451CIJ ,Dynamically-Tested Self-Calibrating 12-Bit Plus Sign A/D Converter with Sample and Hold [Life-time buy]FeaturesOn request, the ADC12451 goes through a self-calibrationYSelf-calibration provides excellen ..
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ADC12451CIJ
Dynamically-Tested Self-Calibrating 12-Bit Plus Sign A/D Converter with Sample and Hold [Life-time buy]
TL/H/11025
ADC12451
Dynamically-Tested
Self-Calibrating
12-Bit
Plus
Sign
A/D
Converter
with
Sample-and-Hold
December 1994
ADC12451 Dynamically-Tested Self-Calibrating
12-Bit Plus Sign A/D Converter with Sample-and-Hold
General Description
The ADC12451isa CMOS 12-bit plus sign successiveap-
proximation analog-to-digital converter whose dynamic
specifications (S/N, THD, etc.)are testedand guaranteed. request,the ADC12451 goes througha self-calibration
cycle that adjusts linearity, zeroand full-scale errors. The
ADC12451 alsohasthe abilitytogo throughan Auto-Zero
cyclethat correctsthe zero error during every conversion.
The analog inputtothe ADC12451is trackedand heldby
the internal circuitry,soan external sample-and-holdisnot
required. The ADC12451hasa S/H control input whichdi-
rectly controlsthe track-and-hold stateofthe A/D.A unipo-
lar analog input voltage range(0Vto a5V)ora bipolar
range (b5Vto a5V)canbe accommodatedwith g5V sup-
plies.
The 13-bitdata resultis availableonthe eight outputsofthe
ADC12451intwo bytes, high-bytefirst and sign extended.
The digital inputsand outputsare compatible with TTLor
CMOS logic levels.
Applications Digital Signal Processing Audio Telecommunications High Resolution Process Control Instrumentation
Features Self-calibration provides excellent temperature stability Internal sample-and-hold 8-bit mP/DSP interface Bipolar input range witha single a5V reference
Key Specifications Resolution 12bits plus sign Conversion Time 7.7ms (max) Sampling Rate 83 kHz (max) Bipolar Signal/Noise 73.5dB (min) Total Harmonic Distortion b78.0dB (max) Aperture Time 100ns Aperture Jitter 100 psrms Zero Error g2 LSB (max) Positive Full-Scale Error g1.5 LSB (max) Power Consumption @g5V 113 mW (max)
Simplified Block Diagram
TL/H/11025–1
Connection Diagram
Dual-In-Line Package
TL/H/11025–2
TopView
Ordering Information
Industrial Package(b40§CsTAs 85§C)
ADC12451CIJ J24A
Military Package(b55§CsTAs 125§C)
ADC12451CMJ, J24AADC12451CMJ/883
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M115/PrintedinU.S.A.
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