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ADC12040CIVY
12-Bit, 40 MSPS, 340mW A/D Converter with Internal Sample-and-Hold
ADC12040
12-Bit, 40 MSPS, 340 mW A/D Converter with Internal
Sample-and-Hold
General DescriptionThe ADC12040isa monolithic CMOS analog-to-digital con-
verter capableof converting analog input signals into 12-bit
digital wordsat40 Megasamples per second (MSPS), mini-
mum. This converter usesa differential, pipeline architecture
with digital error correction andan on-chip sample-and-hold
circuitto minimize die size and power consumption while
providing excellent dynamic performance. Operatingona
single5V power supply, this device consumes just 340 mW40 MSPS, including the reference current. The Power
Down feature reduces power consumptionto40 mW.
The differential inputs provideafull scale input swing equal VREF withthe possibilityofa single-ended input. Full usethe differential inputis recommendedfor optimum perfor-
mance. For easeof use, the buffered, high impedance,
single-ended reference inputis converted on-chiptoa differ-
ential referencefor useby the processing circuitry. Output
data formatis 12-bit offset binary.
This deviceis availablein the 32-lead LQFP package and
willoperate overthe industrial temperature rangeof −40˚Cto
+85˚C.
Features Single supply operation Internal sample-and-hold Outputs 2.5Vto5V compatible TTL/CMOS compatible input/outputs Low power consumption Power down mode On-chip reference buffer
Key Specifications Resolution 12 Bits Conversion Rate 40 MSPS (min) DNL ±0.4 LSB (typ) INL ±0.7 LSB (typ) SNR(fIN= 10MHz) 69dB (typ) ENOB(fIN= 10MHz) 11.2 bits (typ) Data Latency 6 Clock Cycles Supply Voltage +5V ±5% Power Consumption,40 MHz 340 mW (typ)
Applications Ultrasound and Imaging Instrumentation Cellular Base Stations/Communications Receivers Sonar/Radar xDSL Wireless Local Loops/Cable Modems HDTV/DTV DSP Front Ends
Connection DiagramJune 2003
ADC12040
12-Bit,
MSPS,
A/D
Converter
with
Internal
Sample-and-Hold
