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ADC11L066CIVY
11-Bit, 66 MSPS, 450 MHz Bandwidth A/D Converter with Internal Sample-and-Hold
ADC11L066
11-Bit, 66 MSPS, 450 MHz Bandwidth A/D Converter with
Internal Sample-and-Hold
General DescriptionThe ADC11L066isa monolithic CMOS analog-to-digital con-
verter capableof converting analog input signals into 11-bit
digital wordsat66 Megasamples per second (MSPS), mini-
mum, with typical operation possibleupto80 MSPS. This
converter usesa differential, pipeline architecture with digital
error correction andan on-chip sample-and-hold circuitto
minimize die size and power consumption while providing
excellent dynamic performance.A unique sample-and-hold
stage yieldsa full-power bandwidthof 450 MHz. Operatinga single 3.3V power supply, this device consumes just
357 mWat66 MSPS, including the reference current. The
Power Down feature reduces power consumptionto just mW.
The differential inputs provideafull scale input swing equal ±VREF withthe possibilityofa single-ended input. Full usethe differential inputis recommendedfor optimum perfor-
mance. For easeof use, the buffered, high impedance,
single-ended reference inputis converted on-chiptoa differ-
ential referencefor useby the processing circuitry. Output
data formatis 11-bit offset binary.
This deviceis availablein the 32-lead LQFP package and
willoperate overthe industrial temperature rangeof −40˚Cto
+85˚C.
Features Single supply operation Low power consumption Power down mode On-chip reference buffer
Key Specifications Resolution 11 Bits Conversion Rate 66 MSPS Full Power Bandwidth 450 MHz DNL ±0.2 LSB (typ) INL ±0.5 LSB (typ) SNR(fIN=10 MHz) 65dB (typ) SFDR (fIN=10 MHz) 78dB (typ) Data Latency 6 Clock Cycles Supply Voltage +3.3V ±300 mV Power Consumption,66 MHz 357 mW (typ)
Applications Ultrasound and Imaging Instrumentation Cellular Base Stations/Communications Receivers Sonar/Radar Wireless Local Loops Data Acquisition Systems DSP Front Ends
Connection DiagramDecember 2003
ADC1
1L066
1-Bit,
MSPS,
MHz
Bandwidth
A/D
Converter
with
Internal
