ADC0882CCN ,8-Bit 20 MSPS Flash A/D ConverterBlock Diagram
NMINV
NLINV
CONV
VIN
RT
TL/H/11083-1
©1990 National Semiconductor Go ..
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ADC0882CCN
8-Bit 20 MSPS Flash A/D Converter
National
giiil, Semiconductor
ADC0882
General Description
The ADCOBSZ is a monolithic flash Analog to Digital con-
verter capable of converting a video signal into a stream of
8-bit digital words at 20 MegaSamples Per Second (MSPS).
The device is pin tor pin compatible with TDC1048 but uses
half the power. Since ADC0882 is a flash converter, a sam-
ple-and-hold circuit is not required.
The AD00882 consists of 255 clocked latching compara-
tors, precision resistive divider, encoding logic, and an out-
put register. A single convert clock controls the conversion
operation. The unit can be configured to give either true or
inverted outputs, in binary or offset two's complement cod-
ing. All digital I/O is TTL compatible.
Applications
" Video Digitizing
I: Medical Imaging
I! High Energy Physics
a Digital Television
II Radar
I: High Speed Data Links
8-Bit 20 MSPS Flash A/ D Converter
December 1990
Key Specifications
a Resolution 8 bits
I: Conversion rate DC to 20 MSPS (min)
tt Full power bandwidth 7 MHz (min)
" Small signal bandwidth (-3 dB) 30 MHz (min)
" Linearity error iv; LSB (max)
I: Analog input range 0V to -2V
II Differential gain 0.7%
II Differential phase 0.3°
l: Power dissipation 700 mW
I: Power supply iSV or +5V/ --5.2V
Features
a Drop-in replacement for TDC1038 and TDC1048
a Pin for pin compatible with ADC304, CXA1096P and
CXA1296P
II No Sample-and-Hold circuit required
I: Selectable data format
II Available in plastic DIP, CERDIP and PLCC
Block Diagram
’__av\,
255to8
0 E I a
u l " s +
E ' " T
n I 01-03
\E/W/Q
COMPLRATO RS
TL/HM1083-1
@1990 National SernitxyrttNctar Corporation TL/H/1 1083
I RRD-B20M120/Phnte0 in U S. A.
JGIJQAUOO 0/ V “99H SdSIN OZ 1!8'8 388OOGV
Connection Diagrams
tyt (USB) 1 - -28 NMINV
02 2 - - 27 RM
[)3 3 - - 26 RB
D4 4 - - 25 AGRD
DGND 5 - - 24 NC
Va: 7 - - 22 NC
Ya 9 - - 20 NC
DGND 1 1 - - 18 RT
NLINV 12 - - 17 CONV
D5 13- ~16 DB (LSB)
Mi 14 - - 1 5 D7
TL/H/11083-2
28-Lead CERDIP
J Package
28-Lead Plastic DIP
N Package
Ordering Information
3 u E o E o g
< z ' = > = -
25 24 23 22 21 20 19
RB 26 -18 RT
RM 27 .-17 CONV
NNINV 28 "-16 D8 (LSB)
D1(MSB) 1 -15 D7
02 2 L14 D6
03 3 -13 05
M 4 '-12 12 NLINV
irihitlslth'
DGND 0‘
DGND II
TLfH/11083-3
28-Lead Plastic Chip Carrier
V Package
Commercial
(ty'C I TA s 70°C)
Package
ADC0882CCN/TDC1038N6C
N283, 28-Pin Plastic
ADC0882CCJ/TDC1038B6C
J28A, 28-Pin CERDIP
ADC0882GCV/TDC1038R3C
V28A, 28-Lead Plastic
Chip Carrier
Absolute Maximum Ratings (Notes1&2)
If Military/Aerospace specified devices are required,
please contact the National
Semiconductor Sales
OffieefDitttrittutttrtt for availability and specifications.
Supply Voltage (V00)
Negative Supply Voltage (VEE)
Voltage at Logic Control Input and Outputs
-0.5V to (Vcc f 0.5V)
(Note 3)
Voltage at Analog Inputs
(VIN. VRT, VRB) (Note 3)
VnT-VRB
Input Current at Logic Control Inputs
(Note 4)
Applied Current at Digital Outputs
(Note 4)
Input Current at Analog Inputs
(Note 4)
Power Dissipation at TA = 25°C
- 0.5V to + 7.0V
+ 0.5V to - 7.0V
VEE to + 0.5V
uf- 2.2V
:50 mA
$20 mA
t 100 mA
See Note 5
Converter Electrical Characteristics
The following specifications apply for Vcc = + 5.25V, VEE =
tPWL = 19 ns and tPWH = 27 ns unless otherwise specified. Boldface limits apply for " = Tum to Tesax; all other limits
_ 65°C to + 150''C
Storage Temperature Range
ESD Rating
Soldering Temperature All Packages (10 sec)
Operating Ratings (Notes1 a. 2)
Temperature Range Tum: S TA S TMAX
ADC0882CC0/TDC1038B6C 0°C g TA g +70°C
ADC0882CC?0TDC1038N6C 0°C S TA S +70°C
ADC0882CCV/TDC1038R3C 0°C S TA C +70°C
Vcc Voltage 4.75V to 5st
VEE Voltage -4.75V to -5.5V
Vm Most Positive Reference Voltage
(Note 6) -thIVto 0.1V
VRB Most Negative Reference Voltage
(Note 6) --1.9V to -2.IV
VRT - VRB 1.8V to 2.2V
Analog Input Voltage (VIN) VRT to VRB
tPWL 2 19 ns, tPWH 2 27 ns
-5.5V, VRB = -2.OV, VAGND = VDGND = VRT = GND,
TA = 25''C.
. Typical . . Units
Symbol Parameter Conditions (Note 7) Limit (Limit)
STATIC CHARACTERISTICS
Resolution tl Bits (Min)
Integral Linearity Error 0.2 % FS(Max)
Differential Linearity Error 0.2 %FS(Max)
Code Clze (Digital Output 1 00 %LSB
Step Size)
(Note B) " % LSB(Min)
ITS %LSB(Max)
Offset Error, Top VIN = VRT + " mV(Max)
Offset Error, Bottom VIN == VRB - " mV(Max)
Offset Error
i tt NP M
Temperature Coefficient 2 P’ C( ax)
IREF Reference Current 30 mA(Max)
RREF Total Reference Resistance " n(Min)
VIN Analog Input Vna V(Min)
Voltage Range Frrr V(Max)
IIN Analog Input Constant
Bias Current 2so pA(Max)
Rm Ana!og Input Equivalent VIN = VnB so kn(Min)
Resistance
Cm Analog Input VIN = VHS so pF (Max)
Capacitance
Converter Electrical Characteristics (Continued)
The following specifications apply for Vcc = +5.25V, VEE = -5.5V, VRB =
tPWL = 19 ns and tPWH = 27 ns unless otherwise specified. Boldface limits apply for Ta = Tum to Ttsax; all other limits
-2.OV, VAGND = VDGND = VRT = GND,
TA = 25°C.
Symbol Parameter Conditions 2,tt Limit tlt,;
DYNAMIC CHARACTERISTICS
S/(N+ D) Signal-to-Noise VIN = 2.0 Vp-p, le = 1.248 MHz .
+ Distortion Ratio 10 MHz BW " dam")
Peak-Peak Signal/RMS --
Noise W 2.438 MHz sa dB(Min)
S/(N+D) Signal-to-Noise VIN = 2.0 Vp-p, le = 1.248 MHz .
+ Distortion Ratio 10 MHz BW as dB(Min)
RMS Signal/RMS _
Noise “N 2 438 Hz 44 dB(Min)
Full Power Bandwidth VIN = 2.0 Vp-p, No Spurious .
or Missing Codes T MHz(Min)
- 3 dB Small Signal VIN = - 20 dB, FS = 0.2 Vp-p .
Bandwidth ao MHz(Mln)
Full Scale Transient .
Response ao ns(Min)
tsro Sampling Time Offset - It ns(Min)
1 o ns(Max)
Aperture Jitter 60 psrmslMax)
Differential Phase Error fs = 4xNTSC 0.3 1.0 Degree(Max)
Differential Gain Error ts = 4xNTSC 0.7 2.0 %(Max)
DC Electrical Characteristics
The following specifications apply for Vcc = +5.25V, VEE = -5.5V, VRB = -2.OV, VAGND = VDGND = l/RT == GND,
tPWL = 19 ns and tPWH = 27 ns unless otherwise specified. Bnldface limits apply for TA = Tu... to Tmai, all other limits
TA = 25°C.
Symbol Parameter Conditions 2,t,t Limit (3:13;)
VIN“) Logical "I " Input Voltage 2.0 V(Min)
VIN(O) Logical "ty' Input Voltage 0.8 V(Max)
'IN(1) Logical "I" Input Current VIN = 2.4V so wA(Max)
- 200 pA(Min)
VIN = Vcc = +5.25V 1.0 mA(Max)
'IN(0) Logical "o'' Input Current VIN = 0.4V -O.6 mA(Max)
VOUT“) Logical "I'' OutputVoltage Vcc = 4.75V, Iour == -400 plA 2.4 V(Min)
VOUT(0) Logical "o" Output Voltage Vcc = 4_75V, 'OUT = 4.0 mA o.s V(Max)
'tlS,,fi"uit Output tteel/gl/tl,'',?, t[guration Max. - AO mA(Max)
ch Digital Input Capacitance f = 1 MHz 15 pF(Max)
ICC Vcc Supply Current (Note 9) " mA(Max)
IEE VEE Supply Current (Note 9) - , 65 mA(Max)
AC Electrical Characteristics
The following specifications apply for Vcc = +5.25V, VEE = -5.5V, l/sus = -2.OV, VAGND = VDGND = VRT = GND,
tPWL = 19 ns and tPWH = 27 ns unless otherwise specified. Boldface limits apply for " -_- Tm" to Teaaxt all other limits
TA = 25°C.
Symbol Parameter Conditions 2,''l,t Limit (331:?)
fs Maximum Conversion Rate 20 MSPS(Min)
tPWL Convert (CONV) Ptuse Width, Low 1 9 ns(Min)
tPWH Convert (CONV) Pulse Width, High " ns(Min)
tD Output Delay Vcc + 4.75V, Load 1, Figure 4 ao ns(Max)
tray Output Hold Time Load 1 , Figure 4 s ns(Min)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Nate 2: All voltages are measured with respect to AGND and DGND, unless otherwise specified.
Note 3: Applied voltage must be current limited to the specified range.
Note 4: Forcing voltage must be limited to specified range.
Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum iunction temperature), i?UA (package
junction to ambient thermal resistance), 8uc (package junction to case thermal resistance), and TA (ambient temperature). The maximum allowable power
dissipation at any temperature is POM = (T Jmax - TAM?“ or the number given in the Absolute Maximum Ratings, whichever is lower. For this device, T Jmax =
175°C. and the typical thermal resistances ' and 9JC) ot the ADCOBBZ follow:
Package OJA tlac
Sutthtee Number 'WW 'C/W
CCJ J28A so 12
CCN NZBA 45 17
ccv V28A 65 14
Note 6: VRT must be more positive than VRB, and the voltage reference differential must be within the specified range.
Note 7: Typicals are at TA = 25‘C and represent most likely parametric norm.
Note 8: Code size is the size of the individual codes, trom code transition to code transition. It is often expressed as a percentage of the ideal code size, The ideal
code size is given by: Input Voltage Range/ttN. Where N is the number of bits of resolution of the A/D converter.
Note 9: Worst case. all digital inputs and outputs LOW.
Typical Performance Characteristics
(TA = 25''C, Vcc = +5V, VEE = --5V)
ANALOG INPUT
DIGITAL OUTPUT
Signal to Noise and Distortion
Ratio " Input Frequency
CONV SAMPLE
-li()()()(tP,
'"'"ss
g CLOCK RATE = 20 MSPS
5 INPUT SIGNAL = -0.1dB COLL SCALE
1 2 3 4 5 6 7 8
1NPUT FREQUENCY - MHz
TL/H/11083-4
l I t .
fs PWH tne
SAMPLE
)000( Il'"
FIGURE 1. Tlmlng Diagram
TABLE I. Output Coding Table
SAM PLE
TL/H/11083-5
Binary Offset Two’s Complement
Input True Inverted True Inverted
Voltage NMINV = High NMINV = Low NMINV = Low NMINV = High
NLINV = High NLINV = Low NLINV = High NLINV = Low
0.0000V 0000 0000 1111 1111 1000 0000 0111 1111
-0.0078V 0000 0001 1111 1110 10000001 0111 1110
I q . . O
. O q C .
-0.9922V 0111 1111 1000 0000 1111 1111 0000 0000
-1_0000V 10000000 01111111 00000000 11111111
-1.0078V 10000001 01111110 00000001 11111110
. . . q .
. q . q O
-1.9844V 11111110 00000001 01111110 10000001
-1.9922V 11111111 00000000 01111111 10000000
Note t: NMINV and NLINV are to be considered DC controls, they may be tied to Vcc for a Logic "1" or to ground for a logic "O".
Note 2: Voltages are code midpoints.
Simplified Input and Output Circuits
'cs Rm
VRa Yrs
TL/FUI 1083-6
Cm is nonlinear junction capacitance
Vng is a voltage equal to the voltage on pin RB
vccc -
FIGURE 2. Simplified Analog Input Circuits
TL/Hf11083-8
FIGURE 3. Simplified Digital Convert Input
Circuit
Pin Descriptions
Vcc(6,10)
VEE(7, 8, 9)
AGND(19, 25)
DGND(5, 11)
RM(27)
These are the positive digital power sup-
ply pins. Normally, +5 VDC should be
applied and bypassed to digital ground
with a 0.1 pF ceramic capacitor in paral-
lel with a 10 pF tantalum capacitor.
These are the negative analog power
supply pins. Normally, -5 VDC should
be applied and bypassed to analog
ground with a 0.1 pF capacitor in paral-
lel with a 10 pF tantalum capacitor.
These are the Analog ground pins.
These are the Digital ground pins.
This pin connects to the top of the refer-
ence resistor. Normally this pin is con-
nected to AGND.
This pin is connected to the middle of
the reference resistor. A voltage may be
applied to this pin to trim the converter's
integral linearity (see Text).
OUTPUT EQUIVALENT CIRCUIT
I -t::r-
REFERENCE
RESISTOR
TL/F011063-7
IN3062
LOAD 1 =
TtST LOAD
ran 11qu
MEASUREMENTS
TL/H/11083-9
FIGURE 4. Simplified Digital Output Circuit
HB(26)
VIN(21.23)
CONV(17)
NMINV(28)
NLINV(12)
D1 -D8
(1, 2, 3, 4,
13, 14, 15,
NC(20, 22, 24)
This pin is connected to the bottom of
the reference resistor. Normally --2N is
applied to this pin and should be by-
passed to analog ground with a 0.1 HF
ceramic capacitor in parallel with a
10 " tantalum capacitor.
These are the analog signal input pins.
The input signal range is from 0V to
A TTL convert signal is applied to this
pin. A conversion is initiated at the rising
edge of the signal.
This is the Not Most Significant Bit ln-
vert pin. A TTL signal at this pin controls
the format of the output data (see Table
This is the Not Least Significant Bit in-
vert pin. A TTL signal at this pin controls
the format of the output data (see Table
These are the output data pins. D1 out-
puts the MSB data while DB outputs the
LSB Data.
No connection.
Application Hints
OPERATION
The ADC0882 has three functional sections: a resistor/
comparator array, encoding logic, and output registers. The
comparator array compares the input signal with 255 refer-
ence voltages to produce an N-of-255 code (or thermome-
ter code, since all the comparators whose reference is more
negative than the input signal will be at logic "1" and all
those whose reference is more positive will be at logic "0").
The encoding logic converts the N-of-255 code into the us-
er's choice of coding. The output register holds the output
constant between updates.
REFERENCE
The ADC0882 converts analog signals in the range VRB s
VIN s VRT into digital form. The specifications of the
ADC0882 are guaranteed with VRT (the voltage applied to
the top of the reference resistor chain) at 0.0V i 0.1V and
VHS (the voltage applied to the bottom of the reference re-
sistor chain) at -2.0V 1 0.1V.
Linearity is guaranteed with no adjustment; however, a mid-
point tap, RM, allows trimming of converter integral linearity
as well as the creation of a nonlinear transfer function. Note
that ADC0882's integral nonlinearity is i 1/2 LSB maximum.
It the maximum nonlinearity occurs at midscale then the
circuit of Figure 5 will allow the user to null out the linearity
error at midscale. This adjustment may improve the overall
integral linearity of the converter to less than i 'h LSB. The
characteristic impedance seen at this node is approximately
2200 and should be driven from a low-impedance source.
Note that any load applied to this node will affect linearity,
and any noise introduced at this point will degrade the over-
all quantization Signal-to-Noise Ratio (SNR). Due to the
slight variation in the reference current with clock and input
signals, RT and RB should be low-impedance-to-ground
points. For circuits in which the reference is not varied, a
bypass capacitor (0.01 p.F to 0.1 pF) to ground is recom-
mended. It the reference inputs are exercised dynamically
(as in an automatic gain control circuit) a low impedance
reference source is required. The reference voltages may
be varied dynamically at up to 5 MHz; however, device per-
formance is specified with fixed reference voltages as de-
fined in the "Electrical Characteristics" tables.
/, 10k
2k flu AD00882
10 TURN ‘
-2V RB
TL/H/11083-10
FIGURE 5. Optional Midscale Linearity Adjust
ANALOG INPUT AND SOURCE
IMPEDANCE CONSIDERATIONS
For precise quantization, the ADC0882 uses latching com-
parators. For optimum overall system periormance the
source impedance of the driving circuit must be less than
25.0. If the input signal is between the VRT and I/ms refer-
ences, the output will be a binary number from 0 to 255.
When a signal outside the recommended input voltage
range (0V to -2V) is applied, the output will remain at either
full-scale value. The input signal will not damage the
ADC0882 if it remains within the range specified in the "Ab-
solute Maximum Ratings" table. Both analog input pins
(VIN) are connected together internally and therefore either
one or both may be used.
CONVERT
The ADC0882 requires an external convert (CONV) signal.
Because the ADC0882 is a flash converter it does not re-
quire a track-and-hold circuit. A sample is taken (the outputs
of the comparators are latched) within tSTO (Sampling Time
Offset) after a rising edge on the CONV pin. The result is
encoded and then transferred to the output registers on the
next rising edge. The digital output for sample N becomes
valid to after the rising edge of clock N + 1 and remains
valid until tHO after the rising edge of clock N + 2.
OUTPUT FORMAT CONTROL
Two output format control pins, NMlNV and NLINV, are pro-
vided. These controls are for DC (Le., steady state) use.
They permit the output coding to be either straight binary or
offset two's complement, in either true or inverted sense,
according to the "Output Coding Table". These active low
pins may be tied to VCC (through a 4.7k resistor) tor a logic
1 or DGND for a logic 0.
OUTPUTS
The outputs of the ADC0882 are TTL compatible, capable
of driving four Iow-power Schottky TTL (54/74 LS) loads or
the equivalent. The outputs hold the previous data for a
minimum of tHO after the rising edge of the convert signal.
POWER SUPPLIES
The ADC0882 operates from two supply voltages: +5.0V
and -5.OV. A -5.2V negative power supply may be used
with a slight increase in power dissipation. The return path
for ICC, the current from the + 5.0V supply, is DGND. The
return path for IEE, the current from the --5,0V supply, is
AGND. All power and ground pins must be connected. By-
pass Vcc with a 0.1 pF ceramic capacitor in parallel with a
10 'd' tantalum capacitor to the digital ground. Also bypass
VEE with a 0.1 pF ceramic capacitor in parallel with a 10 "
tantalum capacitor to analog ground.
TYPICAL INTERFACE CIRCUIT
A typical interface circuit (Figure 6) shows a wideband oper-
ational amplifier driving the A/ D converter directly. Bipolar
inputs to the op amp can be accommodated by adjusting
Application Hints (Continued)
the offset control. A Zener diode provides a stable refer-
ence for the offset and gain controls. All VIN pins are con-
nected close to the device package and the input amplifier's
feedback loop should be closed at that point. The buffer has
an inverting gain of two, increasing a 1 Vp-p video input
signal to the recommended 2 Vp.p input for the ADC0882.
Proper decoupling is recommended for all systems.
A variable capacitor permits amplifier optimization for either
step response or frequency response. This may be replaced
with a fixed value capacitor as determined by evaluation of
the final PC board layout.
The bottom reference voltage (VRB) is supplied by an invert-
ing amplifier, buffered with a PNP transistor. The transistor
provides a Iow-impedance source and is necessary to sink
the current flowing through the reference resistor chain.
65v) - -
10 pr dt
“6 pr g
F, yd--
1 kn 2m
ANALOG .
INPUT C MA NY
30.711 I 0.1 pr
11 0.1111" V J;
1 kn 4 2, cc
-NN--- - VIN
27tt 23
k 2540 F-NP, vIN ADC0882
. mm b 2 n . It) 19,25
101m AGND 1
T 4 5 1 18 m (use) -
0.1 pf RI
"GAIN" "OFFSET" T V 02 _
2m 2m 0.111!
10 TURN 10 TURN 27 R 03 3
r. L2 Mr 7
0.1 pr 10m T 04 _
T 3°“ - 26 5
v v RB D5 _
"-l 1011: 0.1 pf 05 s
7 0.1pr T T 17 _
- oouv
D7 --+
W741 5, It 8
. 00110 08 (LS8) _
FL, 2N2907 I
0.1 pf il, V1
CLOCK > 7.8.9
-5.2v r "
Note 1: LI, Ul-Ferrite Bead, Fair-Rite #2743001112 or equivalent.
FIGURE 6. Typical Interface Circuit
g 0.1 ur
TL/H/11083-11
Physical Dimensions inches (millimeters)
1.490 MAX I 0.500
(17145) 715.200)
fralfFt1rrslrt71fz7LrthfE1fTt1@irt1ltmTr1fmirs1, M"OMS
(ms: "U-MN
RMI\\) (11'64116)
tl,'-.)'',-),-'.',',','-" m mmwm mmmww mug] ME
RAD Trr
Ihmr-tlA2t MAX GLASS 0.055 50.005 IS] “I
(10100-15140) SEALANT_\ - *(1397 =0.121) MAX
l' , "tlr-trom
' a fitrsta--rrrti
00014“! -CCf,
" '5 arar-autrst" , if -
T" 0.125
“‘5 1'f/, 0050-0100 --l 0100 0010 "l-c, Mt iiVsr
-_ . . , . . . "m
(17” +1515) (1.52.72.5401 (2.543 4.154) (915715“) m- un e,
' -152:
28-Pin CERDIP
ADC0882CGl or TDC1038B6C
NS Package Number J28A
fr4iiFrlFilftRF1lRf1lfllRfilFllrifrsl
Atrfrt
(1.515)
151t!-'tiint
(1235:0127)
w,/"0"l-'le-ll-'i-ll-!i-]l-'-jl'-'ll-t]l1-i[1-1ll1-'ll1-'i"
m Mt. 1 100111
1393-1420 _
- (35.38-36.0) '
0.030 trlitn-0.tiN '.u5-0.t1it 0.050
ja-r)''" I tt5_75l (3583-5334) uTmT'Pj l“ Jil/ii-it
t - - . 0.020
_- ni-- I I trrp'
95°”, 1htltN-015 " .
J 0500 4 40120-0301) as " 11p Jf
--" IltN----V 0050:0015 0100:0010 001010.000 -
(10.131 oar-tmir' l-- t-h1-di1",-l',j1ll--1 P. --G-ldl,-',1llf-,1 'll-fl-d-le
0.025+°'°25 (3.1 4.50:)
-tl.0M
fssa :32: manzv a
28-Pin Plastic
ADC0882CCN or TDC1038NBC
NS Package Number N28A
ADC0882 8-Bit 20 MSPS Flash A/ D Converter
Physical Dimensions inches (millimeters)
Lit #101015
' smEs AT
(1.270)
0_.130
ir.irp
15 5055110
s smcss AT MN
0.050 a t2 (0.2001 .
(1.270) mm saunas wzw A '
11.103) 0.005
x45' (1.103)
o.M0-0.430
(10.41-10.92)
(CONTACT DIMENSION)
0._0m_ 0013-0010
"31-0.IMIl (015081 (0330-0151) 0105-0100
18.8t3-tm6) MIN Tyt' (dA91--8.572)
15'' _—_—*+_
1 0005-0015 f
W.t2t-0,381) -ilr,
i,,,,,)', ici-Lil.?.?., f ihtM-ih118
I0ENT "ir-tit. T; _"iF,jriiii Mtl ezuz - 2.091)
0__. 450
‘_.(11 431
REF Stl
“05-0495
' t1t.3t-1t.5T) V26A (REVGY
28-Lead Plastic Chip Carrier
ADC0882CCV or TDC1038R3C
NS Package Number V28A
LIFE SUPPORT POLICY
NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
to the user. .. w ..
Ntuonal Sonucmduaar National Semtconductor National Satttlqottttutttttr Ntuoml Settmonttuetttr National Somlcondutoru Nation! Settgettottuetttr
Corponuon Grub" Japan Ltd. Mono Kong Ltd. Do Bras“ udn. (Austrlla) PTY, Ltd.
2900 Semiconductor Drive Industrtertrttsse ll) Sanseido 3169. SF Su‘ta 513. 5th Floor Av. Brig. Fana Luna. 1383 Ist Floor. 441 St. Kilda Rd.
PO. Box 58090 D6080 Fursttmfeldtxutok 4-15 Nishi Shim'uku Chinachem Gdden Plaza. 6.0 Andorooni, 62 Melbourne. 3004
Santa Clara. CA 950523090 West Germany Shmiuku-Ku, 77 Moor Road, Tsimshmsuv East 01051 Sao Paulo, SP. Brasil Victory, Australia
Tel: 1(800} 272-9959 Tai: (0-81-41) 10341 Tokyo 160. Japan Kowloon. Hong Kong Tel: (55/11) 212-5066 Tel: (03) 267-5000
TWX: (910) 339-9240 Telex: 527-649 Tel: 3299-7001 Tel: 3-7231290 Fax: (55/11) 211-1181 NSBR BR Fax: 610-2677458
Fax: (08141) 103554 FAX: 3299-7000 Telex: 52996 NSSEA HX
Fax: 36112536
National does not assume any responsiblity tty use of any avcuilry dasaibed. no arcu't patent lies!“ 2' ex 'mp1ied and National reserves the right &tany lime wt1hout notice 10 change said tMashy and spk6satkms.
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
TDC1038B6C - product/tdc1038b60?HQS=T|-null-null-dscatalog-df-pf-nu||-wwe
ADC0882CCN - product/achBSchn?HQS=T|-nu|I-nulI-dscataIog-df-pf-null-wwe
ADCO882CCJ - product/ad00882ccj?HQS=T|-nu|I-nulI-dscatalog-df—pf—null-wwe
ADC0882CCC - product/adc0882ccc?HQS=T|—null-nuIl-dscatalog-df—pf—nuII-wwe
TDC1038N6C - product/tdc1038n6c?HQS=T|-null-nuII-dscataIog-df-pf-null-wwe
ADC0882 - product/ad00882?HQS=T|-nu||-nu|I-dscatalog-df-pf-null-wwe
TDC1038R3C - product/tdc1038r30?HQS=T|—null-nuIl-dscataIog-df-pf-null-wwe
