AD9775BSV ,14-Bit, 160 MSPS 2X/4X/8X Interpolating Dual TxDAC+ D/A Converterfeatures the ability to perform f /2, f /4, and f /8S S S2. Direct IF transmission capability for 7 ..
AD9776ABSVZ , Dual, 12-/14-/16-Bit,1 GSPS
AD9777BSV ,16-Bit, 160 MSPS 2X/4X/8X Interpolating Dual TxDAC+ D/A Converterfeatures the ability to perform f /2, f /4, and f /8S S S2. Direct IF transmission is possible for ..
AD9777BSVRL , 16-Bit, 160 MSPS 2x/4x/8x Interpolating Dual TxDAC D/A Converter
AD9777BSVZ , 16-Bit, 160 MSPS 2x/4x/8x Interpolating Dual TxDAC D/A Converter
AD9777BSVZ , 16-Bit, 160 MSPS 2x/4x/8x Interpolating Dual TxDAC D/A Converter
ADS8413IBRGZT ,16-bit, Unipolar Diff Input, 2MSPS Sampling rate, 4.75V to 5.25V ADC with LVDS Serial Interface 48-VQFN -40 to 85FEATURES APPLICATIONS• Medical Instrumentation• 2-MHz Sample Rate• HIgh-Speed Data Acquisiton Syste ..
ADS8413IRGZRG4 ,16-bit, Unipolar Diff Input, 2MSPS Sampling rate, 4.75V to 5.25V ADC with LVDS Serial Interface 48-VQFN -40 to 85SLAS490–OCTOBER 2005+ VA AGND + VBD BDGNDCore Supply I/O SupplySARCSTARTSYNC_O, CLK_O, SDOLVDS I/OS ..
ADS8413IRGZT ,16-bit, Unipolar Diff Input, 2MSPS Sampling rate, 4.75V to 5.25V ADC with LVDS Serial Interface 48-VQFN -40 to 85SLAS490–OCTOBER 2005SPECIFICATIONST = –40°C to 85°C, +VA = 5 V,+VBD = 5 V or 3.3 V, V = 4.096 V, f ..
ADS8422IPFBT ,16 Bit 4MSPS Parallel ADC W/Ref, Pseudo Bipolar, Fully Differential Input 48-TQFP -40 to 85FEATURES APPLICATIONS• DWDM• Fully Differential Input with Pseudo-BipolarInput Range -4 V to +4 V • ..
ADS8481IRGZRG4 ,Brown Corporation - 18-BIT, 1-MSPS, PSEUDO-DIFFERENTIAL UNIPOLAR INPUT, MICROPOWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH PARALLEL INTERFACE AND REFERENCE
ADS8482IRGZRG4 ,Brown Corporation - 18-BIT, 1-MSPS, PSEUDO-BIPOLAR, FULLY DIFFERENTIAL INPUT, MICROPOWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH PARALLEL INTERFACE, REFERENCE
AD9775BSV
14-Bit, 160 MSPS 2X/4X/8X Interpolating Dual TxDAC+ D/A Converter
REV.0
14-Bit, 160 MSPS 2�/4�/8�
Interpolating Dual TxDAC+ D/A Converter
FUNCTIONAL BLOCK DIAGRAM
FEATURES
14-Bit Resolution, 160/400 MSPS Input/Output Data Rate
Selectable 2�/4�/8� Interpolating Filter
Programmable Channel Gain and Offset Adjustment
fS/4, fS/8 Digital Quadrature Modulation
Capability
Direct IF Transmission Mode for 70 MHz + IFs
Enables Image Rejection Architecture
Fully Compatible SPI Port
Excellent AC Performance
SFDR –71 dBc @ 2 MHz–35 MHz
WCDMA ACPR –71 dB @ IF = 71 MHz
Internal PLL Clock Multiplier
Selectable Internal Clock Divider
Versatile Clock Input
Differential/Single-Ended Sine Wave or
TTL/CMOS/LVPECL Compatible
Versatile Input Data Interface
Two’s Complement/Straight Binary Data Coding
Dual-Port or Single-Port Interleaved Input Data
Single 3.3 V Supply Operation
Power Dissipation: Typical 1.2 W @ 3.3 V
On-Chip 1.2 V Reference
80-Lead Thermally Enhanced TQFP Package
GENERAL DESCRIPTIONThe AD9775 is the 14-bit member of the AD977x pin-compatible,
high performance, programmable 2×/4×/8× interpolating TxDAC+
family. The AD977x family features a serial port interface (SPI)
providing a high level of programmability, thus allowing for
enhanced system-level options. These options include: select-
able 2×/4×/8× interpolation filters; fS/2, fS/4, or fS/8 digital
quadrature modulation with image rejection; a direct IF mode;
programmable channel gain and offset control; programmable
internal clock divider; straight binary or two’s complement data
interface; and a single-port or dual-port data interface.
The selectable 2×/4×/8× interpolation filters simplify the require-
ments of the reconstruction filters while simultaneously enhancing
the TxDAC+ family’s pass-band noise/distortion performance.
The independent channel gain and offset adjust registers allow
the user to calibrate LO feedthrough and sideband suppression
(continued on page 2)
APPLICATIONS
Communications
Analog Quadrature Modulation Architectures
3G, Multicarrier GSM, TDMA, CDMA Systems
Broadband Wireless, Point-to-Point Microwave Radios
Instrumentation/ATETxDAC+ is a registered trademark of Analog Devices, Inc.
*Protected bu U.S. Patent Numbers 5568145, 5689257, and 5703519. Other Patents pending.
AD9775(continued from page 1)
errors associated with analog quadrature modulators. The 6 dB
of gain adjustment range can also be used to control the output
power level of each DAC.
The AD9775 features the ability to perform fS/2, fS/4, and fS/8
digital modulation and image rejection when combined with an
analog quadrature modulator. In this mode, the AD9775 ac-
cepts I and Q complex data (representing a single or multicarrier
waveform), generates a quadrature modulated IF signal along with
its orthogonal representation via its dual DACs, and presents
these two reconstructed orthogonal IF carriers to an analog
quadrature modulator to complete the image rejection
upconversion process. Another digital modulation mode (i.e.,
the Direct IF Mode) allows the original baseband signal repre-
sentation to be frequency translated such that pairs of images fall
at multiples of one-half the DAC update rate.
The AD977x family includes a flexible clock interface accepting
differential or single-ended sine wave or digital logic inputs. An
internal PLL clock multiplier is included and generates the
necessary on-chip high frequency clocks. It can also be disabled
to allow the use of a higher performance external clock source.
An internal programmable divider simplifies clock generation in
the converter when using an external clock source. A flexible data
input interface allows for straight binary or two’s complement
formats and supports single-port interleaved or dual-port data.
Dual high performance DAC outputs provide a differential
current output programmable over a 2 mA to 20 mA range. The
AD9775 is manufactured on an advanced 0.35 micron CMOS
process, operates from a single supply of 3.1 V to 3.5 V, and
consumes 1.2 W of power.
Targeted at wide dynamic range, multicarrier and multistandard
systems, the superb baseband performance of the AD9775 is ideal
for wideband CDMA, multicarrier CDMA, multicarrier TDMA,
multicarrier GSM, and high performance systems employing
high order QAM modulation schemes. The image rejection
feature simplifies and can help to reduce the number of signal
band filters needed in a transmit signal chain. The direct IF
mode helps to eliminate a costly mixer stage for a variety of
communications systems.
PRODUCT HIGHLIGHTSThe AD9775 is the 14-bit member of the AD977x pin-
compatible, high performance, programmable 2×/4×/8×
interpolating TxDAC+ family.Direct IF transmission capability for 70 MHz + IFs through
a novel digital mixing process.fS/2, fS/4, and fS/8 digital quadrature modulation and user-
selectable image rejection to simplify/remove cascaded
SAW filter stages.A 2×/4×/8× user-selectable interpolating filter eases data
rate and output signal reconstruction filter requirements.User-selectable two’s complement/straight binary data
coding.User-programmable channel gain control over 1 dB
range in 0.01 dB increments.User-programmable channel offset control ±10% over
the FSR.Ultra high speed 400 MSPS DAC conversion rate.Internal clock divider provides data rate clock for easy
interfacing.
10.Flexible clock input with single-ended or differential input,
CMOS, or 1 V p-p LO sine wave input capability.
11.Low power: Complete CMOS DAC operates on 1.2 W
from a 3.1 V to 3.5 V single supply. The 20 mA full-scale
current can be reduced for lower power operation and
several sleep functions are provided to reduce power dur-
ing idle periods.
12.On-chip voltage reference: The AD9775 includes a 1.20 V
temperature compensated band gap voltage reference.
13.80-lead thermally enhanced TQFP.
AD9775
DC SPECIFICATIONSANALOG OUTPUT (for IR and 2R Gain Setting Modes)
REFERENCE OUTPUT
REFERENCE INPUT
POWER SUPPLY
NOTESMeasured at IOUTA driving a virtual ground.Nominal full-scale current, IOUTFS, is 32× the IREF current.Use an external amplifier to drive any external load.100 MSPS fDAC with fOUT = 1 MHz, all supplies = 3.3 V, no interpolation, no modulation.400 MSPS fDAC = 50 MSPS, fS/2 modulation, PLL enabled.
Specifications subject to change without notice.
(TMIN to TMAX, AVDD = 3.3 V, CLKVDD = 3.3 V, DVDD = 3.3 V, PLLVDD = 3.3 V, IOUTFS = 20 mA, unless
otherwise noted.)
AD9775–SPECIFICATIONS
AD9775
DYNAMIC SPECIFICATIONS
(TMIN to TMAX, AVDD = 3.3 V, CLKVDD = 3.3 V, DVDD = 3.3 V, PLLVDD = 0 V, IOUTFS = 20 mA,
Interpolation = 2�, Differential Transformer Coupled Output, 50 � Doubly Terminated,
unless otherwise noted.)*Measured single-ended into 50 Ω load.
Specifications subject to change without notice.
AD9775
DIGITAL SPECIFICATIONS
(TMIN to TMAX, AVDD = 3.3 V, CLKVDD = 3.3 V, PLLVDD = 0 V, DVDD = 3.3V, IOUTFS = 20 mA, unless
otherwise noted.) Specifications subject to change without notice.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD9775 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS*P1B13–P1B0, P2B13–P2B0
DATACLK, PLL_LOCK
CLK+, CLK–, RESET
LPF
SPI_CSB, SPI_CLK,
SPI_SDIO, SPI_SDO
Junction Temperature
Storage Temperature
*Stresses above those listed under the ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum ratings for extended periods may affect device reliability.
ORDERING GUIDEAD9775BSV
*SV = Thin Plastic Quad Flatpack
THERMAL CHARACTERISTICS
Thermal Resistance80-Lead Thermally Enhanced
TQFP Package �JA = 23.5 °C/W*
*With thermal pad soldered to PCB.
