AD9755AST ,12-Bit, 300 MSPS High-Speed TxDAC+?? D/A ConverterSPECIFICATIONSDifferential Transformer Coupled Output, 50 Doubly Terminated, unless otherwise not ..
AD9760AR ,10-Bit, 125 MSPS TxDAC D/A ConverterSPECIFICATIONSMIN MAX OUTFS Parameter Min Typ Max UnitsRESOLUTION 10 Bits1DC ACCURACYIntegral Linea ..
AD9760AR50 ,10-Bit, 125 MSPS TxDAC D/A Converterapplications. Matching between the twoInstrumentationcurrent outputs ensures enhanced dynamic perfo ..
AD9760AR50 ,10-Bit, 125 MSPS TxDAC D/A ConverterFEATURES Member of Pin-Compatible TxDAC Product Family+5V125 MSPS Update Rate 0.1F10-Bit Resolutio ..
AD9760ARU ,10-Bit, 125 MSPS TxDAC D/A Converterapplications. Its power dissipation can be furtherPRODUCT HIGHLIGHTS reduced to a mere 45 mW withou ..
AD9761ARS ,Dual 10-Bit TxDAC+⑩ with 2x Interpolation FiltersSPECIFICATIONS MIN MAX OUTFSParameter Min Typ Max UnitsRESOLUTION 10 Bits1DC ACCURACYIntegral Linea ..
ADS8344EB ,16-Bit/ 8-Channel Serial Output Sampling ANALOG-TO-DIGITAL CONVERTERFEATURES* PIN FOR PIN WITH ADS7844The ADS8344 is an 8-channel, 16-bit, samplingAnalog-to-Digital (A ..
ADS8344EBG4 ,16-Bit, 8-Channel Serial Output Sampling Analog-to-Digital Converter 20-SSOP -40 to 85FEATURES* PIN FOR PIN WITH ADS7844The ADS8344 is an 8-channel, 16-bit, samplingAnalog-to-Digital (A ..
ADS8344EG4 ,16-Bit, 8-Channel Serial Output Sampling Analog-to-Digital Converter 20-SSOP -40 to 85Maximum Ratings maycause permanent damage to the device. Exposure to absolute maximum cause the dev ..
ADS8344EG4 ,16-Bit, 8-Channel Serial Output Sampling Analog-to-Digital Converter 20-SSOP -40 to 85MAXIMUM RATINGSELECTROSTATIC+V to GND –0.3V to +6VCC Analog Inputs to GND ........ –0.3V to +V + 0 ..
ADS8344N ,16-Bit/ 8-Channel Serial Output Sampling ANALOG-TO-DIGITAL CONVERTER.PIN CONFIGURATION PIN DESCRIPTIONSTop View SSOPPIN NAME DESCRIPTION1 CH0 Analog Input Channel 02 C ..
ADS8344N/1KG4 ,16-Bit, 8-Channel Serial Output Sampling Analog-to-Digital Converter 20-SSOP -40 to 85Maximum Ratings maycause permanent damage to the device. Exposure to absolute maximum cause the dev ..
AD9755AST
12-Bit, 300 MSPS High-Speed TxDAC+?? D/A Converter
REV.0
12-Bit, 300MSPS
High-Speed TxDAC+® D/A Converter
FUNCTIONAL BLOCK DIAGRAM
PRODUCT DESCRIPTIONThe AD9753 is a dual, muxed port, ultrahigh-speed, single-
channel, 12-bit CMOS DAC. It integrates a high-quality 12-bit
TxDAC+ core, a voltage reference, and digital interface circuitry
into a small 48-lead LQFP package. The AD9753 offers excep-
tional ac and dc performance while supporting update rates up
to 300MSPS.
The AD9753 has been optimized for ultrahigh-speed applica-
tions up to 300 MSPS where data rates exceed those possible on
a single data interface port DAC. The digital interface consists
of two buffered latches as well as control logic. These latches
can be time multiplexed to the high-speed DAC in several ways.
This PLL drives the DAC latch at twice the speed of the exter-
nally applied clock and is able to interleave the data from the
two input channels. The resulting output data rate is twice that
of the two input channels. With the PLL disabled, an external
2× clock may be supplied and divided by two internally.
The CLK inputs (CLK+/CLK–) can be driven either differen-
tially or single-endedly, with a signal swing as low as 1 V p-p.
FEATURES
12-Bit Dual Muxed Port DAC
300 MSPS Output Update Rate
Excellent SFDR and IMD Performance
SFDR to Nyquist @ 25 MHz Output: 69 dB
Internal Clock Doubling PLL
Differential or Single-Ended Clock Input
On-Chip 1.2 V Reference
Single 3.3 V Supply Operation
Power Dissipation: 155mW @ 3.3 V
48-Lead LQFP
APPLICATIONS
Communications: LMDS, LMCS, MMDS
Base Stations
Digital Synthesis
QAM and OFDMThe DAC utilizes a segmented current source architecture com-
bined with a proprietary switching technique to reduce glitch
energy and to maximize dynamic accuracy. Differential current
outputs support single-ended or differential applications. The
differential outputs each provide a nominal full-scale current
from 2mA to 20 mA.
The AD9753 is manufactured on an advanced low cost 0.35µm
CMOS process. It operates from a single supply of 3.1 V to 3.5V
and consumes 155 mW of power.
PRODUCT HIGHLIGHTSThe AD9753 is a member of a pin-compatible family of high-
speed TxDAC+s providing 10-, 12-, and 14-bit resolution.Ultrahigh-Speed 300 MSPS Conversion Rate.Dual 12-Bit Latched, Multiplexed Input Ports. The AD9753
features a flexible digital interface allowing high-speed data
conversion through either a single or dual port input.Low Power. Complete CMOS DAC function operates on
155 mW from a 3.1 V to 3.5 V single supply. The DAC full-
scale current can be reduced for lower power operation.On-Chip Voltage Reference. The AD9753 includes a 1.20V
temperature-compensated bandgap voltage reference.
TxDAC+ is a registered trademark of Analog Devices, Inc.
*. Patent numbers 5450084, 5568145, 5689257 and 5703519.
Other patents pending.
AD9753–SPECIFICATIONSTEMPERATURE COEFFICIENTS
NOTES
1Measured at IOUTA, driving a virtual ground.
2Nominal full-scale current, IOUTFS, is 32× the IREF current.
3An external buffer amplifier is recommended to drive any external load.
4100 MSPS fDAC with PLL on, fOUT = 1 MHz, all supplies = 3.0 V.
5300 MSPS fDAC.
6±5% power supply variation.
Specifications subject to change without notice.
(TMIN to TMAX, AVDD = 3.3 V, DVDD = 3.3 V, PLLVDD = 3.3 V, CLKVDD = 3.3 V, IOUTFS = 20 mA, unless otherwise
noted.)DC SPECIFICATIONS
AD9753
(TMIN to TMAX, AVDD = 3.3 V, DVDD = 3.3 V, PLLVDD = 0 V, CLKVDD = 3.3 V, IOUTFS = 20 mA,
Differential Transformer Coupled Output, 50 � Doubly Terminated, unless otherwise noted.)DYNAMIC SPECIFICATIONSAC LINEARITY
NOTESMeasured single-ended into 50 Ω load.Single-Port Mode (PLL disabled, DIV0 = 1, DIV1 = 0, data on Port 1).
Specifications subject to change without notice.
AD9753–SPECIFICATIONS
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD9753 features proprietary ESD protection circuitry, permanent damage may occur on
(TMIN to TMAX, AVDD = 3.3 V, DVDD = 3.3 V, PLLVDD = 3.3 V, CLKVDD = 3.3 V, IOUTFS = 20 mA, unless
otherwise noted.)DIGITAL SPECIFICATIONSNOTES
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*Digital Data Inputs (DB13 to DB0)
CLK+/CLK–, PLLLOCK
DIV0, DIV1, RESET
LPF
Junction Temperature
Storage Temperature
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum ratings for
extended periods may affect device reliability.
ORDERING GUIDENOTE
Min CLK freq only applies when using internal PLL. When PLL is disabled,
there is no minimum CLK frequency.
THERMAL CHARACTERISTIC
Thermal Resistance48-Lead LQFP
θJA = 91°C/W
Figure 1.I/O Timing
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATION
