AD9713JP ,12-BIT, 100MSPS D/A CONVERTERSapplications, both devices featureclow glitch impulse of 100 pV-s; and fast settling times of 30 ns ..
AD9726BSV , 16-Bit, 600 MSPS D/A Converter
AD9726BSVZ ,16-Bit, 600 MSPS TxDAC+® D/A ConverterAPPLICATIONS CLK+Instrumentation and test CLK–Wideband communications systems Point-to-point wirel ..
AD9726BSVZ ,16-Bit, 600 MSPS TxDAC+® D/A ConverterFEATURES FUNCTIONAL BLOCK DIAGRAM600+ MSPS DAC update rate FSADJ16/14/12/10-bit resolution family C ..
AD9731BR ,10-Bit, 170 MSPS D/A ConverterSPECIFICATIONSREFParameter Temp Test Level Min Typ Max UnitsRESOLUTION 10 BitsTHROUGHPUT RATE +25
AD9713JN-AD9713JP
12-BIT, 100MSPS D/A CONVERTERS
ANALOGDEVICESfAX-ON-DEHANDHOTLINE-Page23
ANALOGWDEVICESFEATURES
100MSPSUpdateRate
ECL/TTLCompatibility
LowGlitchImpulse:100pV-s
FastSettling:30nsto%1LSBLowPower:700mW
APPUCATlONS
ATE
SignalReconstruction
ArbitraryWaveformGenerators
DigitalSynthesizers
SignalGenerators
GENERALDESCRIPTION
TheAD9712andAD9713areI2-bit,highspeeddigital-to-analogconvertersconstructedinanadvancedoxideisolated
bipolarprocess.TheAD9712isanECL-compatibledevice
featUringupdateratesof100MSPSminimum;theTTL-
compatibleAD9713willupdateat80MSPSminimum.
Designedfordirectdigitalsynthesis,waveformreconstruction,
andhighresolutionimagingapplications,bothdevicesfeature
lowglitchimpulseof100pV-s;andfastsettlingtimesof30ns:!:1LSB.Bothunitsarecharacterizedfordynamicperfor-
mance,andhaveexcellentharmonicsuppression.LATCHENABLEDIGITAL+V.rnREFERENCEGROUND
:2JREFERENCEOUT
;1"CONTROLAMPIN
.!!.ICONTROLAMPOUTREFERENCEIN
ANALOGRETURN113ANALOG-V.
PlasticDIPPinoutDesignations(TopView)
REV.A
InformationfurnishedbyAnalogDevicesisbelievedtobeaccurateandreliable.However.noresponsibilityisassumedbyAnalogDevicesforitsuse.norforanyinfringementsofpatentsorotherrightsofthirdpartieswhichmayresultfromitsuse.NolicenseisgrantedbyimplicationorotherwiseunderanypatentorpatentrightsofAnalogDevices.
12-Bit,100MSPS
UtAConvertersAD97121AD9713I
FUNCTIONALBLOCKDIAGRAM
AD9712/AD9713
~2o)ooo(191
REFERENCEYYcONTROL
OUTLIAMPIN
TheAD9712andAD9713areavailablein28-pinplasticDIPs
andPLCCs,withanoperatingtemperaturerangeof0to+70°C.
Contactthefactoryforavailabilityofmilitary-gradedevices.~w0m:a:..C)%
iii;i~~5~Q'aQ'QC<>~
221REFERENCEGROUNDREFERENCEOUT
191CONTROLAMPIN,.,5,:',Bwo-0a.'"%::E9~..:!~c:II!~00
PLCCPinoutDesignations
OneTechnologyWay.P.O.Box9106.Norwood.MA02062-9106Tel:617/329-4700Fax:617/326-8703Twx:710/394-6577
We5tCQutCentralAtlantic:714/641-9391214/231-5094215/643.7790
OBSOLETE
RNRLOGDEVICESfRX-ON-DEnRNDHOTLINE-Page2~
AD9712/AD9713-SPECIFICATIONSABSOLUTEMAXIMUMRATINGS!
PositiveSupplyVoltage(+Vs)(AD9713Only)........+6V
NegativeSupplyVoltage(-Vs)
(AD9712andAD9713)7V
DACOutputstoANALOGRETURN......+0.5Vto-2V
DigitalInputVoltages(D1-D12'LATCHENABLE)
AD97120Vto-Vs
AD97130Vto+Vs
InternalReferenceOutputCurrent.....-20JLAto+500fLA
ControlAmplifierInputVoltageRange........0Vto-4V
ControlAmplifierOutputCurrent.:!:2.5mA
REFERENCEINVoltageRange..........-3.7Vto-Vs
AnalogOutputCurrent(lOUTorlOUT).30mA
OperatingTemperatUreRange
AD9712]NIJPOto+70DC
AD9713]N/]POto+70DC
MaximumJunctionTemperature2...............+IS0.C
LeadTemperatUre(Soldering,10seconds).........+300DC
StorageTemperatUreRange.-65°Cto+IS0DC
ELECTRICALCHARACTERISTICS(-Vs=-5.2V;+vs=+5V(AD9713Only);CONTROLAMPIN=-1.2V
(external);R$ET=1.5kG,unlessotherwisenoted)
TestAD9112JN/JPAD9713JNIJP
Parameter(Conditions)TempLevelMiDTypMaxMiDTypMaxUnits
RESOLUTION1212BitsACCURACY
DifferentialNonlinearityQ)+25"CI1.22.01.22.0LSB
FullVI4.04.0LSB
IntegralNonlinearityQ)+25"CI3.03.0LSB
«
INITIALOFFSETERROR
Zero-SC4UeOffsetError+25°CI0.51.50.51.5IJoAFullVI5.05.0IJoAFull-ScaleGainError3+2sDCI4.08.54.08.5%
FullVI11.011.0%
OffsetDriftCoefficient+25OCV0.030.03p.ArC
REFERENCE/CONTROLAMP
InternalReferenceVoltage+25OCI-1.13-1.26-1.39-1.13-1.26-1.39V
FullI-1.11-1.41-1.11-1.41V
InternalReferenceVoltageDriftFullV300300IJoV/oc
AmplifierInputImpedance+25°CV5050kO
AmplifierBandwidth+2SoCV300300kHz
REFERENCEINPtYf4
ReferenceInputImpedance+25°CV33kf!
ReferenceMultiplyingBandwidths+2SoCV4040MHz
OtITPUTPERFORMANCE
Full-ScaleOutputCurrenr6+25°CV20.4820.48mA
OutputComplianceRange+25OCIV-1.2+3-1.2+3V
OutputResistance+25°CIV2.02.53.02.02.53.0kf!
OutputCapacitance+2sDCV3030pF
OutputUpdateRate7+25DCIV1001108090M,SPS
OutputSettlingTime(tST)S
CurrentSettling+2SoCV3030ns
VoltageSettling(RL=50fi)+2SoCV3030ns
OutputPropagationDelay(tpD)9+2SoCV811ns
GlitchImpulse1O+2SoCV100100pV-s
OutputSlewRatell+2SoCV400400V/s
OutputRiseTimeu+2SOCV33ns
OutputFallTimell+25OCV22ns
OBSOLETE
RNRLOGDEVICESfRK-ON-DEHRNDHOTLINE-Page25
AD9712/AD9713
NOTES
'AbsolUtemaximumratingsarelimitingvaluestobeappliedindividually,andbeyondwhichtheserviceabilityofthecircuitmaybeimpaired.
FunctioualoperabilityisDOtnco:ssarilyimplied.Exposuretoabsolutemaximumratingconditionsforanextendedperiodoftimemayaffectdevicereliability.
2"fypicaIthcrmalimpedances:28-pinplasticDIP8J/\=4row;8JC=7"CIW;28-pinPLCC9,/\=48°C/Wj8Jc=IOOCJW.3Measuredaserrorofmeratiooffull-scalecurrenttocurrentthroushRSET(160IJ.Anominal);ratioisnominally128.
4Pu11-scalevariattous&moordevicesaremoreseverewhendrivingREFERENCEINdirectly.
'Frequ~atwhicha3dBreductioninoutputofDACisobserved;RL=50OJ50%modulationatmidscale.
6BasedonIps=128(V~)whenusinginternalamplifier.
70utpUtsettJin&to0.1%.
'Measuredatmidscaletransition,(0:to.O24%.
'MeasuredfromfallingedgeofLATCHENABLEsignalto50%pointoffull.scaletransition.
"'GlitchimpuJliecombinesmeabsolutevalueofpositiveandnegarivetransitionsoperatinginlatchedmode.
uMcasurcdwimRL=SO0andDACoperatinginlatchedmode.
"Datamustremainstableprior(0fallingedgeofLATCHENABLEsignalforspecifiedtime.
13DatamustremainstableafterrisingedgeofLATCHENABLEsignalforspecifiedtime.
14Updaterates50MSPS;outputfrequency=5MHz.
"Supplyvoltagesshouldremainstablewithin:t5%fornormaloperation.
16McasuredIt:t5%of+Vs(AD9713only)and-Vs(AD9712orAD9713)usingexternalreference.
SpecificationssubjecttochancewithoUtponce.
EXPLANATIONOFTESTLEVELSORDERINGGUIDE
Level-100%productiontested.-100%productiontestedat+25°C.andsampletestedatspecifiedtemperatures.
III-Sampletestedonly.IV-Parameterisguaranteedbydesignand
characterizationtesting.-Parameterisatypicalvalueonly.-Alldevicesarc100%productiontestedat+25°C.100%
productiontestedattemperatUreextremesforextended
temperaturedevices;sampletestedattemperatureexttcmesforcommercial/industrialdevices.
Model
AD9712JN
AD9712JP
AD97I3JN
AD9713JP
Description
ECL-CompatiblePlasticDIP
ECL-CompatiblePLCC
ITL-CompatiblePlasticDIP
ITL-Compatib1ePLCC
Package
Option.
N-28
P-28A
N-28
P-28A=PlasticDIP;P=PlasticLeadedChipCarrier.
TestAD97UJNIjPAD9713JNIjPParameter(Conditious)TempLevelMiDTypMaxMiDTypMu.Units
DIGITALINPUTS
Logic"I"VoltageFullVI-1.0-0.82.0V
Logic"0"VoltageFullVI-1.7-1.50.8V
Logic"1"CurrentFullVI2020
Logic"0"CurrentFullVI10600f.LA
InputCapacitallce+25°CV33pF
InputSetUpTime(t8)12+25°CV33fiS
InputHoldTime(tiVU+25"CV33fiS
LatchPulseWidth(tLPW)(Transparent)+25"CV2.54nsLINEARITY1.
Spurious-FreeDynamicRange+25°CV-60-55dBc
POWERSUPPLylS
PositiveSupplyCurrent(+5.0V)+2S"CI1020mA
FullVI23mA
NegativeSupplyCurrent(-5.2V)+25"CI130160135165mA
FullVI170175mA
NominalPowerDissipation+25"CV676726mW
PowerSupplyRejectionRatio(PSRR)16+25°CI5035050350IJ.ANOBSOLETE
ANALOGDEVICESfAX-ON-DEMANDHOTLINE
AD9713/AD9713
AD911Z1AD9713PINDESCRIPTIONS
Pia
No.NamePage26
Fanctioll
Tenoftwelvedigitalinputbits.
LeastSignificantBit(LSB)ofdigitalinputword.
Oneoftwonegativedigitalsupplypins;nominally-5.2V.
AnaloggroundretUrn.Thispointandthereferencesideofthe
DACloadresistorsshouldbeconnectedtothesamepotential
(nominallyground).
Analogcurrentoutput;full-scaleoutputoccurswithdigital
inputsatall"I."
Oneoftwonegativeanalogsupplypins;nominally-5.2V.
Complementaryanalogcurrentoutput;zeroscaleoutputoccurs
withdigitalinputsatall"1."
NormallyconnectedtoCONTROLAMPOUT(Pin18).Direct
linetoDACcurrentswitchnetwork.Voltagechangesatthis
pointhaveadirecteffectonthefull-scaleoutput.Full-scale
currentoutput""128(ReferencevoltageIRsET)whenusing
internalamplifier.
NormallyoonnectedtoREFERENCEIN(pin17).Outputof
internalcontrolamplifier,whichprovidesatemperature
oompensateddriveleveltothecurrentswitchnetwork.
NormallyconnectedtoREFERENCEOUT(pin20)ifnot
connectedtoexternalreference.Full-scalecurrentout=128
(ReferencevoltageIRsET)whenusinginternalamplifier.
NormallyconnectedtoCONTROLAMPIN(pin19).Internal
voltagereference,nominally-1.26V.
Oneoftwonegativedigitalsupplypins;nominally-5.2V.
Groundreturnfortheinternalvoltagereferenceandamplifier.
Positivedigitalsupplypin;usedonlyontheAD9713;nominally+5V.
Connectionforexternalresistancereference.Full-scalecurrent
out=128(ReferencevoltagelRsET)whenusinginternal
amplifier.
Oneoftwonegativeanalogsupplypins;nominally-5.2V.
TransparentlatchcoDtrolline.
DigitalgroundretUrn.
MostSignificantBit(MSB)ofdigitalinputword.
LATCHENABLE
DATAHOUrS
OUTPUT
LATCHENABLE
OUTPUTERROR
AD97121AD9713TimingDiagram
t..--LATCHPULSEWIOTIft.-INPUTSETUPTIIE..-INPUTHOLDTIMEST-OUT'POTSETTUHOTIMEI'D-OUT'POTPROPAGA11ONDELAY
1-10D2-D11D12(LSB)DIGITAL-VsANALOGRETURNloUTANALOG-VsloUTREFERENCEINCONTROLAMPOUTCONTROLAMPINREFERENCEOUTDIGITAL-VsREFERENCEGROUNDDIGITAL+VsRsETANALOG-VsLATCHENABLEDIGITALGROUNDD1(MSB)
OBSOLETE
RNRLOGDEVICESfRX-ON-DEHRNDHOTLINE-Page27
AD9712/AD9713
THEORYANDAPPUCATIONS
TheAD9712andAD9713highspeeddigital-to-analogconven-
ersutilizeMostSignificantBit(MSB)decodingandsegmenta-
tiontechniquestoreduceglitchimpulseandmaintainlinearity
withouttrimming.showninthefunctionalblockdiagram,thedesignisbasedfourmainsubsections:theDecoderlDrivercircuits,the
TransparentLatches,theSwitchNetworkandtheControl
Amplifier.Aninternalband-gapreferenceisalsoincludedto
allowoperationwithaminimumofexternalcomponents.
DigitalInputs
TheAD9712employssingle-cndedECL-compatibleinputsfor
datainpUtSDI-D12andLATCHENABLE.TheinternalECL
midpointreferenceisdesignedtomatch10KECLdevice
thresholds.OntheAD9713,aTTLtranslatorisaddedat
eachinput;withthisexception,theAD9712andAD9713areidentical.theDecoderlDriversection,thefourMSBs(DcDJare
decodedto15"thermometercode"lines.Anequalizingdelayis
includedfortheeightLeastSignificantBits(LSBs)and
LATCHENABLE.Thisdelayminimizesdataskew,anddata
setupandholdtimesatthelatchinputs;thisisimportantwhen
operatingthelatchesinthetransparentmode.Withoutthe
delay,skewcausedbythedecodingcircuitswoulddegrade
glitchimpulse.
ThelatchesoperateintheirtransparentmodewhenLATCH
ENABLE(Pin26)isatlogiclevel"0."Thelatchescanbeusedsynchronizedatatothecurrentswitchesbyapplyinganarrow
LATCHENABLEpulsewithproperdatasetupandholdtimesshowninthetimingdiagram.Withanexternaltransparent
latchateachdatainputclockedoutofphasewiththeDAC,the
AD97121AD9713operatesinamasterslave(edge-triggered)mode.
AlthoughtheAD97121AD9713chipisdesignedtoprovideisola-
tionfromdigitalinputstotheoutputs,somecouplingofdigital
transitionsisinevitable,especiallywithTTLorCMOSinputs
appliedtotheAD9713.Digitalfeedthroughcanbereducedby
formingalow-passfilterusingaresistorinserieswiththe
capacitanceofeachdigitalinput.
Referencesshowninthefunctionalblockdiagram,theinternalband-gap
reference,controlamplifierandreferenceinputarepinnedout
formaximumuserflexibilitywhensettingthereference.
Whenusingtheinternalreference,REFERENCEOUT(Pin20)
shouldbeconnectedtoCONTROLAMPIN(pin19).CON-
TROLAMPOUT(pin18)shouldbeconnectedtoREFER-
ENCEIN(Pin17)throughan18nresistor.A0.1J.LFceramic
capacitorfromPin17to-Vs(pin15)improvessettlingby
decoupllngswitchingnoisefromthecurrentsinkbaseline.A
referencecurrentcellprovidesfeedbacktothecontrolampby
sinkingcurrentthroughRsn(Pin24).
Full-scaleoutputcurrentisdeterminedbythevoltageatCON-
TROLAMPIN(VREF)andRsnaccordingtotheequation:
lOUTIPS)=VREFIRsETx128.
Theinternalreferenceisnominally-1.26Vwithatoleranceof10%andtypicaldriftovertemperatureof300J.Lvrc.If
greateraccuracyorbettertemperaturestabilityisrequired,anexternalreferencecanbeutilized.TheAD589referenceshownFigureIfeatures:t10ppmCdriftovertemperatUresfrom0to+70°C.
A09712A09713
:II1)CON'TROl4MPIN::11kl)
-VI
Figure1.UseofA05898SExternalReference
Twomodesofmultiplyingoperationarepossibl~withthe
AD97121AD9713.Signalswithbandwidthsupto400kHzand
inputswingsfrom-0.1Vto-1.2Vcanbeappliedtothe
CONTROLAMPinputasshowninFigure2.Becausethecon-
trolamplifierisinternallycompensated,the0.1J.LFcapacitorat
Pin17canbeeliminatedtomaximizethemultiplyingband-
width.However,itshouldbenotedthatsettlingtimefor
changestothedigitalinputswillbedegraded.
.IJ.6Vlo.l.2V
181l
Figure2.LowFrequencyMultiplyingCircuit
TheREFERENCEINpincanalsobedrivendirectlyforwider
bandwidthmultiplyingoperation.Theanalogsignalforthis
modeofoperationmusthaveasignalswingintherangeofVto-5.2V.Thiscanbeimplementedbycapacitivelycou-
plingintoREFERENCEINanacsignalandestablishingade
biasof-4.0Vto-5.2V,asshowninFigure3;orbydriving
REFERENCEINwithalowimpedanceopampwhosesignal
swingislimitedtothestatedrange.
AD9712AD9713
ANAl~>
4k1l
O.I~FI
1.2k11
-V.-vo
Figure3.WidebandMultiplyingCircuit
OBSOLETE
