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AD9661AKRADN/a888avaiLaser Diode Driver with Light Power Control


AD9661AKR ,Laser Diode Driver with Light Power ControlSPECIFICATIONSSTest AD9661AKRParameter Level Temp Min Typ Max Units ConditionsANALOG INPUTInput Vol ..
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AD9661AKR
Laser Diode Driver with Light Power Control
REV.0Laser Diode Driver
with Light Power Control
FEATURES
< 2 ns Rise/Fall Times
Output Current:120 mA
Single +5 V Power Supply
Switching Rate:200 MHz typ
Onboard Light Power Control Loop
APPLICATIONS
Laser Printers and Copiers

and fall times are 2 ns to complement printer applications that
use image enhancing techniques such as pulse width modula-
tion to achieve gray scale and resolution enhancement. Control
signals are TTL/CMOS compatible.
The driver output provides up to 120 mA of current into an
infrared N type laser, and the onboard disable circuit turns off
the output driver and returns the light power control loop to a
safe state.
The AD9661A can also be used in closed-loop applications in
which the output power level follows an analog POWER LEVEL
voltage input. By optimizing the external hold capacitor and
the photo detector, the loop can achieve bandwidths as high as
25 MHz.
The AD9661A is offered in a 28-pin plastic SOIC for
operation over the commercial temperature range (0°C to
+70°C).
GENERAL DESCRIPTION

The AD9661A is a highly integrated driver for laser diode appli-
cations such as printers and copiers. The AD9661A gets feed-
back from an external photo detector and includes an analog
feedback loop to allow users to set the power level of the laser,
and switch the laser on and off at up to 100 MHz. Output rise
FUNCTIONAL BLOCK DIAGRAM
DISABLE
PULSE
CGAINPOWER
LEVEL
SHIFT OUT
PHOTO
DETECTOR
MONITOR
CAL
AD9661A–SPECIFICATIONS
NOTESBased on rise time of closed-loop pulse response. See Performance Curves.Based on rise time of pulse response.Propagation delay measured from the 50% of the rising/falling transition of WRITE PULSE to the 50% point of the rising/falling edge of the output modulation
current.Rise time measured between the 10% and 90% points of the rising transition of the modulation current.Fall time measured between the 10% and 90% points of the falling transition of the modulation current.Aperture Delay is measured from the 50% point of the rising edge of WRITE PULSE to the time when the output modulation begins to recalibrate, WRITE CAL is
held during this test.Disable Time is measured from the 50% point of the rising edge of DISABLE to the 50% point of the falling transition of the output current.Fall time during disable
is similar to fall time during normal operation.PULSE, PULSE2, DISABLE, and CAL are TTL/CMOS compatible inputs.
Specifications subject to change without notice.
(+VS = +5 V, Temperature = +258C unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS*
+VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6 V
POWER LEVEL, LEVEL SHIFT IN . . . . . . . . . . .0 V to +VS
TTL/CMOS INPUTS . . . . . . . . . . . . . . . . . . . . –0.5 V to +VS
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA
Operating Temperature
AD9661AKR . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . +150°C
Lead Soldering Temp (10 sec) . . . . . . . . . . . . . . . . . . . +300°C
*Absolute maximum ratings are limiting values, to be applied individually, and
beyond which the serviceability of the circuit may be impaired.Functional
operability under any of these conditions is not necessarily implied.Exposure of
absolute maximum rating conditions for extended periods of time may affect
device reliability.
ORDERING GUIDE
1250Ω
VBANDGAP
VREF
+VS
1mA
+VS
50Ω50Ω
SENSE
1mA
HOLD
OUTPUT
TTL
INPUT
+VS

Equivalent Circuits
WARNING!
ESD SENSITIVE DEVICE
CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9661A features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
EXPLANATION OF TEST LEVELS
Test Level
–100% production tested.–100% production tested at +25°C, and sample tested at
specified temperatures.
III–Sample tested only.–Parameter is guaranteed by design and characterization
testing.–Parameter is a typical value only.–All devices are 100% production tested at +25°C; 100%
production tested at temperature extremes for military
devices; sample tested at temperature extremes for
commercial/industrial devices.
AD9661A
PIN DESCRIPTIONS

POWER LEVEL
HOLD
PIN ASSIGNMENTS
PULSE2
DNC
VREF
LEVEL SHIFT IN
GAIN
SENSE INPUT
GROUND
+VS
GROUND
+VS
GROUND
OUTPUT
GROUND
OUTPUT
GROUND
OUTPUT
GROUND
OUTPUT
GROUND
POWER MONITOR
THEORY OF OPERATION
The AD9661A combines a very fast output current switch with
an onboard analog light power control loop to provide the user
with a complete laser diode driver solution. The block diagram
illustrates the key internal functions. The control loop of the
AD9661A adjusts the output current level, IOUT, so that the
photo diode feedback current, IMONITOR, into SENSE IN is pro-
portional to the analog input voltage at POWER LEVEL. Since
the monitor current is proportional to the laser diode light
power, the loop effectively controls laser power to a level pro-
portional to the analog input. The control loop should be peri-
odically calibrated (see Choosing CHOLD).
The disable circuit turns off IOUT and returns the hold capacitor
voltages to their minimum levels (minimum output current)
when DISABLE = logic HIGH. It is used during initial power
up of the AD9661A or during time periods where the laser is
inactive. When the AD9661A is re-enabled the control loop
must be recalibrated.
Normal operation of the AD9661A involves the following (in
order, see Figure 1):The AD9661A is enabled (DISABLE = logic LOW).The input voltage (POWER LEVEL) is driven to the
appropriate level to set the calibrated laser diode output
power level.The feedback loop is closed for calibration (CAL = logic
LOW, and PULSE = logic HIGH), and then opened (CAL
= logic HIGH).While the feedback loop is open, the laser is pulsed on and
off by PULSE.The feedback loop is periodically recalibrated as needed.The AD9661A is disabled when the laser will not be pulsed
for an indefinite period of time.
Control Loop Transfer Function

The relationship between IMONITOR and VPOWER LEVEL is
IMONITOR=VPOWERLEVEL±VREF
(RGAIN+50Ω)
once the loop is calibrated. When the loop is open (CAL = logic
HIGH), the output current, IOUT, is proportional to the held
voltage at HOLD; the external hold capacitor on this pin
determines the droop error in the output current between
calibrations.
The sections below discuss choosing the external components in
the feedback loop for a particular application.
Choosing RGAIN

The gain resistor, RGAIN, allows the user to match the feedback
loop’s transfer function to the laser diode/photo diode
combination.
The user should define the maximum laser diode output power
for the intended application, PLD MAX, and the corresponding
photo diode monitor current, IMONITOR MAX. A typical laser
diode transfer function is illustrated below. RGAIN should be
chosen as:
RGAIN=1.6V
IMONITORMAX±50Ω120
Figure 2.Laser Diode Current-to-Optical Power Curve
POWER-UP
OR LASER
NOT IN USE
CAL
TIMERECALIBRATE
LASER POWER
MODULATED
DISABLE
CAL
PULSE
LASER
OUTPUT POWER
CALIBRATED LEVEL
AD9661A
To choose a value, the user will need to determine the amount
of time the loop will be in hold mode, t HOLD, the maximum
change in laser output power the application can tolerate, and
the laser efficiency (defined as the change in laser output power
to the change in laser diode current). As an example, if an ap-
plication requires 5 mW of laser power ±5%, and the laser diode
efficiency is 0.25 mW/mA, then
ΔIMAX=5mW×(5%)/0.25mW=1.0mA
If the same application had a hold time requirement of 250 μs,
then the minimum value of the hold capacitor would be:
CHOLD=18×10±9×250μs
1.0mA=4.5nF
When determining the calibration time, the T/H and the exter-
nal hold capacitor can be modeled using the simple RC circuit
illustrated below.
CHOLD
POWER LEVEL
POWER MONITOR
EXTERNAL HOLD
CAPACITOR

Figure 3.Circuitry Model for Determining Calibration Times
Using this model, the voltage at the hold capacitor is
VCHOLD=Vt=0+(Vt=∞±Vt=0)1±e
where t = 0 is when the calibration begins (CAL goes logic
LOW), Vt = 0 is the voltage on the hold cap at t = 0, Vt = ∞ is the
steady state voltage at the hold cap with the loop closed, and
τ = RCHOLD is the time constant. With this model the error in
VCHOLD for a finite calibration time, as compared to Vt = ∞, can
be estimated from the following table and chart:
Table II.

The laser diode’s output power will then vary from 0 to PLD MAX
for an input range of VREF to VREF +1.6 V @ the POWER
LEVEL input.
Minimum specifications for IMONITOR MAX should be used when
choosing RGAIN. Users are cautioned that laser diode/photo
diode combinations that produce monitor currents that are less
than IMONITOR MAX in the equation above will produce higher la-
ser output power than predicted, which may damage the laser
diode. Such a condition is possible if RGAIN is calculated using
typical instead of minimum monitor current specifications. In
that case the input range to the AD9661A POWER LEVEL
input should be limited to avoid damaging laser diodes.
Another approach would be to use a potentiometer for RGAIN.
This allows users to optimize the value of RGAIN for each laser
diode/photo diode combination’s monitor current. The draw-
back to this approach is that potentiometers’ stray inductance
and capacitance may cause the transimpedance amplifier to
overshoot and degrade its settling, and the value of CGAIN may
not be optimized for the entire potentiometer’s range.
CGAIN optimizes the response of the transimpedance amplifier
and should be chosen as from the table below. Choosing CGAIN
larger than the recommended value will slow the response of the
amplifier. Lower values improve TZA bandwidth but may cause
the amplifier to oscillate.
Table I.
Choosing CHOLD

Choosing values for the hold capacitor, CHOLD, is a tradeoff
between output current droop when the control loop is open,
and the time it takes to calibrate and recalibrate the laser power
when the loop is closed.
The amount of output current droop is determined by the value
of the hold capacitor and the leakage current at that node.
When the control loop is open (CAL logic HIGH), the pin con-
nection for the hold capacitor (HOLD) is a high impedance in-
put. Leakage current will range from ±200; this low current
minimizes the droop in the output power level. Assuming the
worst case current of ±200 nA, the output current will change
as follows:
±ΔIOUT=18×10±9HOLD
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