AD9430BSV-170 ,12-Bit, 170 MSPS 3.3V A/D ConverterSPECIFICATIONS (AV = 3.3 V, DrV = 3.3V; ENCODE = Maximum Conversion Rate ; T = -40°C, T DD DD MIN M ..
AD9432BST-105 ,12-Bit, 80 MSPS/105 MSPS A/D ConverterSpecifications subject to change without notice.*Stresses above those listed under Absolute Maximum ..
AD9432BST-105 ,12-Bit, 80 MSPS/105 MSPS A/D ConverterSPECIFICATIONSTest AD9432BST-80 AD9432BST-105Parameter Temp Level Min Typ Max Min Typ Max UnitRESOL ..
AD9433BSQ-105 ,12-Bit, 105 MSPS/125 MSPS IF Sampling A/D ConverterSPECIFICATIONS (V = 3.3 V, V = 5 V; internal reference; differential encode input, unless otherwise ..
AD9433BSQ-125 ,12-Bit, 105 MSPS/125 MSPS IF Sampling A/D ConverterSPECIFICATIONS (V = 3.3 V, V = 5 V; differential encode input, unless otherwise noted.)DD CCTest AD ..
AD9433BSQ-125 ,12-Bit, 105 MSPS/125 MSPS IF Sampling A/D ConverterAPPLICATIONSCellular Infrastructure Communication Systems3G Single and Multicarrier ReceiversIF Sam ..
ADS7843E/2K5G4 ,4-wire Touch Screen Controller 16-SSOP -40 to 85FEATURES* 4-WIRE TOUCH SCREEN INTERFACEThe ADS7843 is a 12-bit sampling Analog-to-Digital Con-verte ..
ADS7843EG4 ,4-wire Touch Screen Controller 16-SSOP -40 to 85ELECTRICAL CHARACTERISTICSAt T = –40°C to +85°C, +V = +2.7V, V = +2.5V, f = 125kHz, f = 16 • f = 2M ..
ADS7844 ,12-Bit, 8-Channel Serial Output Sampling ANALOG-TO-DIGITAL CONVERTERMaximum Ratings”may cause permanent damage to the device. Exposure to absolute maximumconditions fo ..
ADS7844E ,12-Bit/ 8-Channel Serial Output Sampling ANALOG-TO-DIGITAL CONVERTERSPECIFICATION: +5VAt T = –40°C to +85°C, +V = +5V, V = +5V, f = 200kHz, and f = 16 • f = 3.2MHz, u ..
ADS7844EB ,12-Bit/ 8-Channel Serial Output Sampling ANALOG-TO-DIGITAL CONVERTERSPECIFICATION: +2.7VAt T = –40°C to +85°C, +V = +2.7V, V = +2.5V, f = 125kHz, and f = 16 • f = 2MH ..
ADS7844EBG4 ,12-Bit, 8-Channel Serial Output Sampling Analog-To-Digital Converter 20-SSOP Maximum Ratings”may cause permanent damage to the device. Exposure to absolute maximumconditions fo ..
AD9430BSV-170
12-Bit, 170 MSPS 3.3V A/D Converter
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12-Bit, 170 MSPS
3.3V AID Converter
Preliminary Technical Data
AD9430
FEATURES
SNR = 65dB (ii) Fin up to 65MHz at 170Msps
ENOB of 10.3 @ Fin up to 65MHz at 170 Msps (-1dBFs)
SFDR = -80dBc @ Fin up to 65MHz at 170Msps (-ldBFs)
Excellent Linearity:
- DNL = +/- 1 lsb (typ)
- INL = +/- 1.5 lsb (typ)
Two Output Data options
- Demultiplexed 3.3V CMOS outputs each at 85 Msps
- LVDS at 170Msps
700 MHz Full Power Analog Bandwidth
On-chip reference and track/hold
Power dissipation = 1.25W typical at 170Msps
1.5V Input voltage range
+3.3V Supply Operation
Output data format option
Data Sync input and Data Clock output provided
Interleaved or parallel data output option (CMOS)
Clock Duty Cycle Stabilizer.
APPLICATIONS
Wireless and Wired Broadband Communications
Wideband carrier frequency systems
Cable Reverse Path
Communications Test Equipment
Radar and Satellite sub-systems
Power Amplifier Linearization
PRODUCT DESCRIPTION
The AD9430 is a 12-bit monolithic sampling analog-to-
digital converter with an or1-chip track-and-hold circuit and
is optimized for low cost, low power, small size and ease of
use. The product operates up to 170 Msps conversion rate
and is optimized for outstanding dynamic performance in
wideband carrier systems.
The ADC requires a +3.3V power supply and a differential
encode clock for full performance operation. No external
reference or driver components are required for many
applications. The digital outputs are TTL/CMOS or LVDS
compatible. Separate output power supply pins support
interfacing with 3.3V CMOS logic.
An output data format select option of two's complement or
offset binary is supported. In CMOS mode two output buses
support demultiplexed data up to 85 Msps rates. A data sync
input is supported for proper output data port alignment and
a data clock output is available for proper output data timing.
Fabricated on an advanced BiCMOS process, the AD9430 is
available in a 100 pin surface mount plastic package (100
TQF P ePAD) specified over the industrial temperature range
(-4(y'C to +85°C).
SEELSE ir AEND BEND BMW
Scaleable
AD9430 Reference
LVDS Data(24), OR(2)
AIN+ Outputs ,
Track & ADC.
H ol d 12-bit 12,
AIN- Pipeline / A port Data(12),OR(1)
Core 3
Outputs
DSr B port 3 Data(12), OR(1)
ENC+ Clock
Management
ENC- Select CMOS or LVDS
i I DCO-
SI S2 s4 S5
AD9430 FUNCTIONAL BLOCK DIAGRAM
AD9430
DC SPECIFICATIONS (AVDD= DrvDD = 3.3V; TMIN = -40°C, TMAX = +85°C, Fin = -0.5dBFS, 1.235V External
reference, LVDS Output Mode)
Test AD9430BSV-170
Parameter Temp Level Min Typ Max Units
RESOLUTION 12 Bits
ACCURACY
No Missing Codes Full I Guaranteed
Offset Error 25°C I tbd mV
Gain Error 25°C I tbd % FS
Differential Nonlinearity (DNL) 25°C I +/- .3 LSB
Integral Nonlinearity (INL) 25°C I +/- .5 LSB
TEMPERATURE DRIFT
Offset Error Full V tbd ppm/°C
Gain Error Full V tbd ppm/°C
POWER SUPPLY REJECTION Full V i tbd mV/ V
REFERENCE OUT (VREF) Full V 1.235 V
ANALOG INPUTS (AIN, AIN )
Input Voltage Range (AIN- AIN )
Input Common Mode Voltage Fuil V i .768 V
Input Resistance Fu l V 2.8 V
Input Capacitance Full V 3 kf2
Full V 5 pF
POWER SUPPLY
Supply Voltages
Ava, Full V 3.0 3.3 3.6 V
Supply Current
IANALOG Mu,-- 3.3V)2 Full V 335 mA
I DIGITAL (DrVDD = 3.3V) 2 Full V 5 5 mA
POWER CONSUMPTION" Full V 1.29 W
l Nominal Differential Full Scale = .766 V * 2 = 1.53 V“, rJrtTerenual for S5 = J, Nominal Differential Full Scale = _766 Vp-pvi,irerenuai for SS = l (see Fig. X)
2 IAVDD and IDrVDD are measured with an analog input of 10.3MHZ, -0.5dBFs, sine wave, rated Encode rate and in LVDS output mode. See Typical Performance
Characteristics and Applications section for IDrVDD- 3 Power Consumption is measured with a DC input at rated Encode rate in LVDS output mode
DIGITAL SPECIFICATIONS (AVDD= 3.3V, DrvDD = 3.3V; TMIN = -40°c, TMAX = +85°C)
Test AD9430BSV-170
Parameter (Conditions) Temp Level Min Typ Max Units
ENCODE AN D DATA SYNC
INPUTS (ENC, ENC , DS, DS/ )
Differential Input VoltageI Full IV 0.2 V
Encode Common Mode Voltage Full IV l.5 V
Input Resistance Full IV 5.5 k9
Input Capacitance Full IV 4 PF
LOGIC INPUTS ( S1,S2,S4,S5 )
Logic 'l' Voltage Full IV 2.0 V
Logic 'O' Voltage Full IV -8 V
Input Resistance Full IV 30 k9
Input Capacitance Full IV 4 PF
LOGIC OUTPUTS (Demux Mode)
Logic "l" Voltage F ull IV DrVDD-0.05 V
Logic "O" Voltage2 Full IV 0.05 V
LOGIC OUTPUTS (LVDS Mode)V
VOD Differential Output Voltage Full IV 247 454 mV
Vos Output Offset Voltage Full IV 1.125 1.375 V
Output Coding F ull IV Two's Comp or Binary
NOTES 1All AC specifications tested by driving ENCODE and ENCODE differentially l ENCODE - ENCODE I > 200mV
2Digital Output Logic Levels: DrVDD= 3.3V,CLOAD= 5pF. 3 LVDS Rl=lOO ohms, LVDS Output Swing Set Resistor = 3.7K
-2- 4/01/2002 REV. PrG
AD9430
AC SPECIFICATIONS1 (AVDD= 3.3 V, DrVDD = 3.3V; ENCODE = Maximum Conversion Rate , TM,N = -40°C, TMAX
= +85°C, Internal voltage reference, LVDS Output Mode )
Test AD9430BSV- 170
Parameter (Conditions) Temp Level Min Typ Max Units
Analog Input 10 MHz 25°C I 65 dB
© -0.5dBFS 65 MHz 25°C I 65 dB
100 MHz 25°C V 65 dB
240 MHz 25°C V 64 dB
Analog Input 10 MHz 25°C I 65 dB
@ -0.5dBFS 65 MHz 25°C I 65 dB
100 MHz 25°C V 64.5 dB
240 MHz 25°C V 60 dB
Worst Harmonic (2"d or YI
Analog Input 10 MHz 25°C I -85 dBc
@ -0.5dBFS 65 MHz 25°C I -80 dBc
100 MHz 25°C V -77 dBc
240 MHz 25°C V -63 dBc
Worst Harmonic (4th or higher)
Analog Input 10 MHz 25°C I -87 dBc
© -0.5dBFS 65 MHz 25°C I -87 dBc
100 MHz 25°C V -77 dBc
240 MHz 250C V -63 dBc
Two-tone IMD2
Fl, F2 @ -7 dBFS Full V -75 dBc
Analog Input Bandwidth 25°C V 700 MHz
I All AC specifications tested by driving ENCO DE and ENCODE differentially.
2 Fl 231.5 MHz, F2=32.5 MHz
SWITCHING SPECIFICATIONS (AVDD= 3.3 V, DrVDD = 3.3V; ENCODE = Maximum Conversion Rate ,
TMIN = -40°C, TMAX = +850C)
Test AD9430BSV-170
Parameter (Conditions) Temp Level Min Typ Max Units
Maximum Conversion Rate' Full I 170 MSPS
Minimum Conversion Rate1 F ull V 40 MSPS
Encode Pulse Width High (U)l Full V 2 nS
Encode Pulse Width Low (tEL)1 Full V 2 nS
DS Input Setup Time (tws) 2 Full IV 5 nS
DS Input Hold Time (trms) 2 Full IV 1.5 nS
l All AC specifications tested by driving ENCODE and ENCODE differentially, LVDS Mode.
2 DS inputs used in CMOS Mode only.
REV. PrG 4/01/2002
AD9430
SWITCHING SPECIFICATIONS (cont'd)
Test AD9430BSV-170
Parameter Temp Level Min Typ Max Units
OUTPUT Parameters in Demux Mode
Valid Time (tv) Full IV tbd ns
Propagation Delay (tpD) F ull IV 3.8 ns
Rise Time (te) (20% to 80%) 25°C V l ns
Fall Time (ts) (20% to 80%) 25°C V l ns
DCO Propagation Delay (thD) Full V1 3.8 ns
Data to DCO Skew (teo - tceo) Full IV 0 ns
Interleaved Mode (A, B Latency) Full VI 14/ 14 Cycles
Parallel Mode (A, B Latency) Full VI 14/15 Cycles
OUTPUT Parameters in LVDS Mode
Valid Time (tv) Full IV 2.0 ns
Propagation Delay (tpo) Full I 3.2 4.3 ns
Rise Time (te) (20% to 80%) 25°C V .5 ns
Fall Time (tr) (20% to 80%) 25°C V f ns
DCO Propagation Delay (th0) Full VI 1.8 2.7 3.8 ns
Data to DCO Skew (teo - tch) Full IV .5 ns
Pipeline Latency Full VI 14 Cycles
Aperture Delay (tA) 25°C V 1.2 ps
Aperture Uncertainty (J itter, h) 25°C V 0.25 ps rms
Measured Preliminary Performance J F F T 65MHz Ain at I 70MSPS
Encode 170.0000 I
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