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AD9288BST-100-AD9288BST-40-AD9288BST-80
8-Bit, 40/80/100 MSPS Dual A/D Converter
REV.0
8-Bit, 40/80/100 MSPS
Dual A/D Converter
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Dual 8-Bit, 40 MSPS, 80 MSPS, and 100 MSPS ADC
Low Power: 90 mW at 100 MSPS per Channel
On-Chip Reference and Track/Holds
475 MHz Analog Bandwidth Each Channel
SNR = 47 dB @ 41 MHz
1 V p-p Analog Input Range Each Channel
Single +3.0 V Supply Operation (2.7 V–3.6 V)
Standby Mode for Single Channel Operation
Twos Complement or Offset Binary Output Mode
Output Data Alignment Mode
APPLICATIONS
Battery Powered Instruments
Hand-Held Scopemeters
Low Cost Digital Oscilloscopes
I and Q Communications
GENERAL DESCRIPTIONThe AD9288 is a dual 8-bit monolithic sampling analog-to-
digital converter with on-chip track-and-hold circuits and is
optimized for low cost, low power, small size and ease of use.
The product operates at a 100 MSPS conversion rate with out-
standing dynamic performance over its full operating range.
Each channel can be operated independently.
The ADC requires only a single 3.0 V (2.7 V to 3.6 V) power
supply and an encode clock for full-performance operation. No
external reference or driver components are required for many
applications. The digital outputs are TTL/CMOS compatible
and a separate output power supply pin supports interfacing
with 3.3 V or 2.5 V logic.
The encode input is TTL/CMOS compatible and the 8-bit
digital outputs can be operated from +3.0 V (2.5 V to 3.6 V)
supplies. User-selectable options are available to offer a combi-
nation of standby modes, digital data formats and digital data
timing schemes. In standby mode, the digital outputs are driven
to a high impedance state.
Fabricated on an advanced CMOS process, the AD9288 is avail-
able in a 48-lead surface mount plastic package (7 · 7 mm,
1.4 mm LQFP) specified over the industrial temperature range
(–40°C to +85°C).
AD9288–SPECIFICATIONS
(VDD = 3.0 V; VD = 3.0 V, Differential Input; External reference unless otherwise noted.)
AD9288NOTESGain error and gain temperature coefficient are based on the ADC only (with a fixed 1.25 V external reference).tV and tPD are measured from the 1.5 V level of the ENCODE input to the 10%/90% levels of the digital outputs swing. The digital output load during test is not to
exceed an ac load of 10 pF or a dc current of –40 mA.Digital supply current based on VDD = +3.0 V output drive with <10 pF loading under dynamic test conditions.Power dissipation measured under the following conditions: fS = 100 MSPS, analog input is –0.7 dBFS, both channels in operation.Standby dissipation calculated with encode clock in operation.SNR/harmonics based on an analog input voltage of –0.7 dBFS referenced to a 1.024 V full-scale input range.
Specifications subject to change without notice.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
ABSOLUTE MAXIMUM RATINGS*VD, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+4 V
Analog Inputs . . . . . . . . . . . . . . . . . . . . –0.5 V to VD + 0.5 V
Digital Inputs . . . . . . . . . . . . . . . . . . . –0.5 V to VDD + 0.5 V
VREF IN . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VD + 0.5 V
Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Operating Temperature . . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . +175°C
Maximum Case Temperature . . . . . . . . . . . . . . . . . . +150°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions outside of those indicated in the operation
sections of this specification is not implied. Exposure to absolute maximum
ratings for extended periods may affect device reliability.
EXPLANATION OF TEST LEVELS
Test Level100% production tested.100% production tested at +25°C and sample tested at
specified temperatures.
IIISample tested only.Parameter is guaranteed by design and characterization
testing.Parameter is a typical value only.100% production tested at +25°C; guaranteed by design
and characterization testing for industrial temperature
range; 100% production tested at temperature extremes for
military devices.
Table I.User Select Options
ORDERING GUIDE*ST = Thin Plastic Quad Flatpack (1.4 mm thick, 7 · 7 mm: LQFP).
AD9288
PIN CONFIGURATION
ENC
VDD
GND
GND
ENC
GND
(MSB) D7
GND
AINA
AINA
DFS
REFINA
REFOUT
REFINB
NC = NO CONNECT
AINB
AINB
GND
GND
VDD
(MSB)
GNDD2
GNDNC
PIN FUNCTION DESCRIPTIONS13, 30, 31, 48
15, 28, 33, 46
25, 26, 35, 36
Aperture Delay
The delay between a differential crossing of ENCODE and
ENCODE and the instant at which the analog input is sampled.
Aperture Uncertainty (Jitter)The sample-to-sample variation in aperture delay.
Differential NonlinearityThe deviation of any code from an ideal 1 LSB step.
Encode Pulsewidth/Duty CyclePulsewidth high is the minimum amount of time that the EN-
CODE pulse should be left in Logic “1” state to achieve rated
performance; pulsewidth low is the minimum time ENCODE
pulse should be left in low state. At a given clock rate, these
specs define an acceptable Encode duty cycle.
Integral NonlinearityThe deviation of the transfer function from a reference line
measured in fractions of 1 LSB using a “best straight line” deter-
mined by a least square curve fit.
Minimum Conversion RateThe encode rate at which the SNR of the lowest analog signal
frequency drops by no more than 3 dB below the guaranteed
limit.
Maximum Conversion RateThe encode rate at which parametric testing is performed.
Output Propagation DelayThe delay between a differential crossing of ENCODE and
ENCODE and the time when all output data bits are within
valid logic levels.
Power Supply Rejection RatioThe ratio of a change in input offset voltage to a change in
power supply voltage.
Signal-to-Noise-and-Distortion (SINAD)The ratio of the rms signal amplitude (set at 1dB below full
scale) to the rms value of the sum of all other spectral compo-
nents, including harmonics but excluding dc.
Signal-to-Noise Ratio (SNR)The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral compo-
nents, excluding the first five harmonics and dc.
Spurious-Free Dynamic Range (SFDR)The ratio of the rms signal amplitude to the rms value of the
peak spurious spectral component. The peak spurious compo-
nent may or may not be a harmonic. May be reported in dBc
(i.e., degrades as signal levels is lowered), or in dBFS (always
related back to converter full scale).
Two-Tone Intermodulation Distortion RejectionThe ratio of the rms value of either input tone to the rms
value of the worst third order intermodulation product; re-
ported in dBc.
Two-Tone SFDRThe ratio of the rms value of either input tone to the rms value
of the peak spurious component. The peak spurious component
may or may not be an IMD product. May be reported in dBc
(i.e., degrades as signal levels is lowered), or in dBFS (always
DEFINITION OF SPECIFICATIONS
Figure 1.Normal Operation, Same Clock (S1 = 1, S2 = 0) Channel Timing
Figure 2.Normal Operation with Two Clock Sources (S1 = 1, S2 = 0) Channel Timing
AD9288Figure 3.Data Align with Two Clock Sources (S1 = 1, S2 = 1) Channel Timing
SAMPLE
–90Figure 4.Spectrum: fS = 100 MSPS, fIN = 10 MHz,
Single-Ended Input
SAMPLE
–90Figure 5.Spectrum: fS = 100 MSPS, fIN = 41 MHz,
Single-Ended Input
SAMPLE
–90Figure 6.Spectrum: fS = 100 MSPS, fIN = 76 MHz,
Single-Ended Input
MHz
40.002030405060708090Figure 7.Harmonic Distortion vs. AIN Frequency
Figure 8.Two-Tone Intermodulation Distortion
MHz
36.00102030405060708090Figure 9.SINAD/SNR vs. AIN Frequency
AD9288
MSPS
45.0030405060708090100110Figure 10.SINAD/SNR vs. Encode Rate
ENCODE HIGH PULSEWIDTH – ns
34.00Figure 11.SINAD/SNR vs. Encode Pulsewidth High
BANDWIDTH – MHz
–5.5Figure 12.ADC Frequency Response: fS = 100 MSPS
MSPS
POWER – mW
1401000Figure 13.Analog Power Dissipation vs. Encode Rate
TEMPERATURE – 8C
43.5Figure 14.SINAD/SNR vs. Temperature
TEMPERATURE – 8C
% GAIN
–1.0Figure 15.ADC Gain vs. Temperature (with External
+1.25 V Reference)
