AD9244BST-40-AD9244BST-65 Fast Delivery |IC PHOENIX CO.,LIMITED

AD9244BST-65 ,14-Bit, 40/65 MSPS Monolithic A/D Converterfeaturesthe DC accuracy and temperature drift requirements of thea separate digital output driver s ..
AD9244BST-65 ,14-Bit, 40/65 MSPS Monolithic A/D ConverterSPECIFICATIONS (AVDD = +5 V, CLKVDD=3V, DRVDD = +3.0 V, f = 65 MSPS (-65) or 40MSPS (-40), INPUT RA ..
AD9244BSTZ-40 ,14-Bit 40/65 MSPS IF Sampling Analog-To-Digital ConverterSPECIFICATIONS External Reference, Differential Analog Inputs, unless otherwise noted.)Test AD9 ..
AD9244BSTZ-65 ,14-Bit 40/65 MSPS IF Sampling Analog-To-Digital ConverterGENERAL DESCRIPTION PRODUCT HIGHLIGHTSThe AD9244 is a monolithic, single 5 V supply, 14-bit, Low Po ..
AD9245BCP-80 ,14-Bit, 80 MSPS, 3 V A/D Converterapplications in communications, imaging, and to 14 bits and 20 MSPS to 80 MSPS. medical ultrasound. ..
AD9245BCPZ-80 ,14-Bit, 80 MSPS, 3 V A/D Converterapplications in communications, imaging, and to 14 bits and 20 MSPS to 80 MSPS. medical ultrasound. ..
ADS7822P ,12-Bit High Speed 2.7V Micro Power Sampling Analog-To-Digital ConverterSBAS062C–JANUARY 1996–REVISED AUGUST 2007This integrated circuit can be damaged by ESD. Texas Instr ..
ADS7822PB ,12-Bit High Speed 2.7V Micro Power Sampling Analog-To-Digital ConverterMAXIMUM RATINGSover operating free-air temperature range (unless otherwise noted)ADS7822 UNITV +6 V ..
ADS7822U ,12-Bit High Speed 2.7V Micro Power Sampling Analog-To-Digital ConverterMaximum Ratings may cause permanent damage to the device. These are stress ratingsonly, and functio ..
ADS7822U/2K5G4 ,12-Bit, 200kSPS Micro Power Sampling Analog-To-Digital Converter 8-SOIC -40 to 85.(2) Performance grade information is marked on the reel.(1)ABSOLUTE
ADS7822UB ,12-Bit High Speed 2.7V Micro Power Sampling Analog-To-Digital ConverterMAXIMUM RATINGSover operating free-air temperature range (unless otherwise noted)ADS7822 UNITV +6 V ..
ADS7822UC ,12-Bit High Speed 2.7V Micro Power Sampling Analog-To-Digital ConverterADS7822ADS7822 ADS7822 SBAS062C–JANUARY 1996–REVISED AUGUST 2007 ..

AD9244BST-40-AD9244BST-65
14-Bit, 40/65 MSPS Monolithic A/D Converter
PRELIMINARY TECHNICAL DATA
REV. PrD 01/22/02
14-Bit, 40/65 MSPS
Monolithic A/D Converter
FUNCTIONAL BLOCK DIAGRAMFEATURES
14-Bit, 65MSPS ADC
Low Power:590mW at 65MSPS with Fin to Nyquist340mW at 40MSPS with Fin to Nyquist
On-Chip Reference and Sample/Hold
750MHz Analog Input Bandwidth
SNR = 74dB up to Nyquist
SFDR = 83dB up to Nyquist
Differential Non Linearity Error = ±0.6LSB
Guaranteed No Missing Codes Over Full Temp range
1V to 2V p-p Differential Full Scale Analog Input Range
Single +5.0V Analog Supply, 3/5V Driver Supply
Out-of-Range Indicator
Straight Binary or Two’s Complement Output Data
48-Lead LQFP Package
APPLICATIONS
Communications Subsystems (Microcell, Picocell)
Medical and High End Imaging Equipment
Ultrasound Equipment
PRODUCT DESCRIPTION
The AD9244 is a monolithic, single 5V supply, 14-bit,
65MSPS Analog to Digital Converter with an on-chip,
high performance sample and hold amplifier and voltage
reference. The AD9244 uses a multi-stage differential
pipelined architecture with output error correction logic to
provide 14-bit accuracy at 65MSPS data rates and
guarantees no missing codes over the full operating
temperature range.
The AD9244 has an on-board, programmable voltage
reference. An external reference can also be chosen to suit
the DC accuracy and temperature drift requirements of the
application.
A differential clock input is used to control all internal
conversion cycles. The digital output data can be pre-
sented in straight binary or in two’s complement format.
An out of range (OTR) signal indicates an overflow condi-
tion, which can be used with the most significant bit to
determine low or high overflow.
Fabricated on an advanced CMOS process, the AD9244 is
available in a 48 pin surface mount plastic package (48
LQFP) and is specified for operation over the industrial
temperature range of (-40°C to +85°C).
PRODUCT HIGHLIGHTS
Low Power—The AD9244 at 590mW consumes a fraction
of the power of presently available in existing, high speed
monolithic solutions.
On-Board Sample-and-Hold (SHA)—The versatile SHA
input can be configured for either single-ended or differen-
tial inputs.
Out of Range (OTR)—The OTR output bit indicates when
the input signal is beyond the AD9244’s input range.
Single Supply—The AD9244 uses a single +5V power sup-
ply simplifying system power supply design. It also features
a separate digital output driver supply line to accommodate
3V and 5V logic families.
IF Sampling—The AD9244 delivers outstanding perfor-
mance at input frequencies beyond the first Nyquist zone.
Sampling at 65MSPS, with an input frequency of 100MHz,
the AD9244 delivers 70dB SNR and SFDR of 82dB.
CLK-
VIN+
VIN-
DUTY
AGNDDRGNDVREFREF
SENSE
OEB
DB13-DB0
OTR
DFS
AVDDDRVDD
REF
GND
REFTREFBCML
CLK+
AD9244–SPECIFICATIONS
PRELIMINARY TECHNICAL DATA
Test AD9244BST-65 AD9244BST-40
ParameterTempLevelMinTypMaxMinTypMaxUnits
DC SPECIFICATIONS (AVDD = +5 V, CLKVDD=3V, DRVDD = +3.0 V, fSAMPLE = 65 MSPS (-65) or 40MSPS (-40), INPUT RANGE = 2V p-p, DIFFERENTIAL ANALOG
INPUTS, DIFFERENTIAL CLOCK INPUTS, EXTERNAL REFERENCE, TMIN to TMAX unless otherwise noted)
NOTESGain Error is based on the ADC only (with a fixed 1.0V external reference).Measured at maximum clock rate, fIN = 2.4MHz, full scale sinewave, with approximately 5pF loading on each output bit.Input capacitance refers to the effective capacitance between one differential input pin and AGND. Refer to Figure 2 for the equivalent analog
input structure.
PRELIMINARY TECHNICAL DATA
AD9244–SPECIFICATIONS
AC SPECIFICATIONS (AVDD = +5 V, CLKVDD=3V, DRVDD = +3.0 V, fSAMPLE = 65 MSPS (-65) or 40MSPS (-40), INPUT RANGE = 2V p-p, DIFFERENTIAL ANALOG
INPUTS, DIFFERENTIAL CLOCK INPUTS, EXTERNAL REFERENCE, TMIN to TMAX unless otherwise noted)
Test AD9244BST-65 AD9244BST-40
ParameterTempLevelMinTypMaxMinTypMaxUnits
Specifications subject to change without notice
AD9244–SPECIFICATIONS
PRELIMINARY TECHNICAL DATA
DIGITAL SPECIFICATIONS (AVDD = +5 V, DRVDD = +3.0V, fSAMPLE = 65 MSPS, VREF = 2V, EXTERNAL REFERENCE, TMIN to TMAX unless otherwise noted)
Test AD9244BST-65 AD9244BST-40
ParameterTempLevelMinTypMaxMinTypMaxUnits
SWITCHING SPECIFICATIONS (AVDD = +5 V, DRVDD = +3.0V, TMIN to TMAX unless otherwise noted)
NOTES The clock period may be extended to 2μs with no degradation in specified performance at +25°C.For the AD9244-65 only, with duty cycle stabilizer enabled. DCS function not applicable for -40 model.Output delay is measured from clock 50% transition to data 50% transition, with 5pF load on each output.Wake-up time is dependent on value of decoupling capacitors, typical values shown with 0.1μF and 10μF capacitors on REFT and REFB.
Specifications subject to change without notice.
NOTES
1. Output Voltage Levels measured with 5pF load on each output
Specifications subject to change without notice
PRELIMINARY TECHNICAL DATA
AD9244–SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS*
Pin NameWRTMinMaxUnits
*Stresses above those listed under Absolute Maximum Ratings may cause permanent
damage to the device. This is a stress rating only; functional operation of the device at
these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum ratings for extended periods
may affect device reliability.
CAUTION
ORDERING GUIDE
MODELTEMPERATURE RANGEPACKAGE OPTION
AD9244BST-65,-40-40°C to +85°CST-48
AD9244-EVALEvaluation Board
EXPLANATION OF TEST LEVELS
Test Level100% production tested100% production tested at 25°C and sample tested at specified
temperatures
IIISample tested onlyParameter is guaranteed by design and characterization testingParameter is a typical value only100% production tested at 25°C; guaranteed by design and charac-
terization testing for industrial temperature range; 100% production tested
at temperature extremes for military devices.
Figure 1. AD9244 Input Timing
Tod = 7nsec typ
n+1
n+2n+3n+4
n+7n+8n+9
Analog
Input
clock
data
outn+1
AD9244–SPECIFICATIONS
PRELIMINARY TECHNICAL DATA
PIN FUNCTION DESCRIPTIONS
Pin
Nunber
1,2,5,32,33
3,4,31,34
8,44
7,6
11-13,16-21
14,22,30
15,23,29
39,40,41,42
46,47
AGND
AGND
AVDD
AVDD
AGND
CLK-
CLK+
OEB
DB0 (LSB)
DB1
DB2
DB11
DB12
DB13 (MSB)
OTR
DRVDD
DRGND
AVDD
AGND
AGND
AVDD
DFS
REF SENSEVIDU
PRELIMINARY TECHNICAL DATA
AD9244–SPECIFICATIONS
DEFINITIONS OF SPECIFICATIONS
INTEGRAL NONLINEARITY (INL)
INL refers to the deviation of each individual code from a
line drawn from “negative full scale” through “positive
full scale.” The point used as “negative full scale” occurs
1/2 LSB before the first code transition. “Positive full
scale” is defined as a level 1 1/2 LSB beyond the last code
transition. The deviation is measured from the middle of
each particular code to the true straight line.
DIFFERENTIAL NONLINEARITY (DNL, NO MISSING
CODES)
An ideal ADC exhibits code transitions that are exactly 1
LSB apart. DNL is the deviation from this ideal value.
Guaranteed no missing codes to 14-bit resolution indicates
that all 16384 codes, respectively, must be present over all
operating ranges.
ZERO ERROR
The major carry transition should occur for an analog
value 1/2 LSB below VIN+ = VIN-. Zero error is defined
as the deviation of the actual transition from that point.
GAIN ERROR
The first code transition should occur at an analog value
1/2 LSB above negative full scale. The last transition
should occur at an analog value 1 1/2 LSB below the
nominal full scale. Gain error is the deviation of the actual
difference between first and last code transitions and the
ideal difference between first and last code transitions.
TEMPERATURE DRIFT
The temperature drift for zero error and gain error speci-
fies the maximum change from the initial (+25°C) value
to the value at TMIN or TMAX.
POWER SUPPLY REJECTION
The specification shows the maximum change in full scale
from the value with the supply at the minimum limit to the
value with the supply at its maximum limit.
APERTURE JITTER
The variation in aperture delay for successive samples
which is manifested as noise on the input to the A/D.
APERTURE DELAY
Aperture delay is a measure of the sample-and-hold ampli-
fier (SHA) performance and is measured from the rising
edge of the clock input to when the input signal is held for
conversion.
SIGNAL-TO-NOISE AND DISTORTION (S/N+D,
SINAD) RATIO
The ratio of the rms value of the measured input signal to
the rms sum of all other spectral components below the
Nyquist frequency, including harmonics but excluding dc.
The value for S/N+D is expressed in decibels.
EFFECTIVE NUMBER OF BITS (ENOB)
For a sine wave, SINAD can be expressed in terms of the
number of bits. Using the following formula,
N = (SINAD – 1.76)/6.02
it is possible to get a measure of performance expressed as
N, the effective number of bits.
Thus, effective number of bits for a device for sine wave
inputs at a given input frequency can be calculated directly
from its measured SINAD.
TOTAL HARMONIC DISTORTION (THD)
The ratio of the rms sum of the first six harmonic compo-
nents to the rms value of the measured input signal and is
expressed as a percentage or in decibels.
SIGNAL-TO-NOISE RATIO (SNR)
The ratio of the rms value of the measured input signal to
the rms sum of all other spectral components below the
Nyquist frequency, excluding the first six harmonics and
dc. The value for SNR is expressed in decibels.
SPURIOUS FREE DYNAMIC RANGE (SFDR)
The difference in dB between the rms amplitude of the
input signal and the peak spurious signal.
NYQUIST SAMPLING
When the frequency components of the analog input are
below the Nyquist frequency (Fclock/2), this is often re-
ferred to as Nyquist sampling.
IF SAMPLING
Due to the effects of aliasing, an ADC is not necessarily
limited to Nyquist sampling. Higher sampled frequencies
will be aliased down into the 1st Nyquist zone (DC-
Fclock/2) on the output of the ADC. Care must be taken
that the bandwidth of the sampled signal does not overlap
Nyquist zones and alias onto itself. Nyquist sampling per-
formance is limited by the bandwidth of the input SHA
and clock jitter (jitter adds more noise at higher input
frequencies).
TYPICAL PERFORMANCE CHARACTERISTICS - AD9244
TPC1. Single Tone 8K FFT, fIN = 5MHzTPC2. Single Tone SNR/SFDR vs AIN, fIN = 5MHz
TPC3. Single Tone 8K FFT, fIN = 31MHzTPC4. Dual-Tone SNR/SFDR vs. AIN with fIN1
= 18MHz and fIN2 = 20MHz
(AVDD = 5.0V, DRVDD = 3.0V, fSAMPL E= 65MSPS with CLK Duty Cycle Stabilizer Enabled, TA =25°C, Differential Input Span, , VCM = 2.5V, AIN = -0.5dBFS, VREF = 2.0V, FFT
length = 8K, unless otherwise noted)
TYPICAL PERFORMANCE CHARACTERISTICS - AD9244
TPC7. SINAD/ENOB vs. FrequencyTPC10. SNR vs. Frequency
TPC8. THD vs. FrequencyTPC11. SFDR vs. Frequency
(AVDD = 5.0V, DRVDD = 3.0V, fSAMPL E= 65MSPS with CLK Duty Cycle Stabilizer Enabled, TA =25°C, Differential Input Span, , VCM = 2.5V, AIN = -0.5dBFS, VREF = 2.0V, FFT
length = 8K, unless otherwise noted)

Partno	Mfg	Dc	Qty	Available	Descript
AD9244BST-40 \|AD9244BST40	ADI	N/a	16	avai	14-Bit, 40/65 MSPS Monolithic A/D Converter
AD9244BST-65 \|AD9244BST65	ADI	N/a	100	avai	14-Bit, 40/65 MSPS Monolithic A/D Converter
AD9244BST-65 \|AD9244BST65	AD	N/a	7	avai	14-Bit, 40/65 MSPS Monolithic A/D Converter