AD9229BCP-65 ,Quad 12-Bit, 50/65 MSPS Serial LVDS 3V A/D ConverterAPPLICATIONS REFTRefData RateDCO+ DCO+REFB Select• Digital beam forming systems in ultrasound Multi ..
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AD9229BCPZ-65 ,Quad 12-Bit, 50/65 MSPS, Serial LVDS A/D ConverterSPECIFICATIONS AVDD = 3.0V, DRVDD = 3.0V; INTERNAL REFERENCE; DIFFERENTIAL ANALOG INPUTS,MAXIMUM SA ..
AD9230BCPZ11-200 , 11-Bit, 200 MSPS, 1.8 V Analog-to-Digital Converter
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AD9230BCPZ-170 , 12-Bit, 170/210/250 MSPS 1.8 V A/D Converter
ADS7812U ,Low-Power/ Serial 12-Bit Sampling ANALOG-TO-DIGITAL CONVERTERPIN CONFIGURATIONPIN # NAME DESCRIPTION1R1 Analog Input. See Tables I and IV.IN2 GND Ground3R2 Anal ..
ADS7812UB ,Low-Power/ Serial 12-Bit Sampling ANALOG-TO-DIGITAL CONVERTERFEATURES DESCRIPTION* 20µ s max CONVERSION TIME The ADS7812 is a low-power, single +5V supply, 12-b ..
ADS7813P ,Low-Power/ Serial 16-Bit Sampling ANALOG-TO-DIGITAL CONVERTERPIN CONFIGURATIONPIN # NAME DESCRIPTION1R1 Analog Input. See Tables I and IV.IN2 GND Ground3R2 Anal ..
ADS7813P ,Low-Power/ Serial 16-Bit Sampling ANALOG-TO-DIGITAL CONVERTERMAXIMUM RATINGSELECTROSTATICAnalog Inputs: R1 . ±16.5VIN DISCHARGE SENSITIVITYR2 ... GND – 0.3V to ..
ADS7813PB ,Low-Power/ Serial 16-Bit Sampling ANALOG-TO-DIGITAL CONVERTERELECTRICAL CHARACTERISTICSAt T = –40°C to +85°C, f = 40kHz, V = +5V ±5%, using internal reference, ..
ADS7813PG4 ,Low-Power, Serial 16-Bit Sampling Analog-To-Digital Converter 16-PDIP ELECTRICAL CHARACTERISTICS (Cont.)At T = –40°C to +85°C, f = 40kHz, V = +5V ±5%, using internal ref ..
AD9229BCP-50-AD9229BCP-65
Quad 12-Bit, 50/65 MSPS Serial LVDS 3V A/D Converter
FEATURES Four ADCs in one package Serial LVDS digital output data rates (ANSI-644) Data clock output provided On Chip Reference and SHA SNR = 70 dB at Fin up to Nyquist Excellent Linearity: DNL = ±0.3 LSB (Typical) INL = ±0.6 LSB (Typical) 500 MHz full power analog bandwidth Per Channel Core Power Dissipation = 270mW at 65MSPS /
200mW at 50MSPS 1 Vpp – 2 Vpp input voltage range +3.0 V supply operation Power down mode
APPLICATIONS Digital beam forming systems in ultrasound Wireless and wired broadband communications Communications test equipment Radar and satellite imaging sub-systems
FUNCTIONAL BLOCK DIAGRAM
D1+AD1-A
LVDSBIASAGND
VREF
SENSE
VIN+A
VIN-A
VIN+B
VIN-B
VIN+C
VIN-C
VIN+D
VIN-D
AVDDDRVDD
PDWN
DCO+
DCO-
REFT
REFB
CLK
D1+BD1-B
D1+CD1-C
D1+DD1-D
DRGND
DCO+
DCO-
FCO+
FCO-Figure 1. Functional Block Diagram
PRODUCT DESCRIPTION The AD9229 is a quad 12-bit monolithic sampling analog–to–
digital converter with an on–chip track–and–hold circuit and is designed for low cost, low power, small size and ease of use. The
product operates up to a 65 MSPS conversion rate and is optimized for outstanding dynamic performance where a small package size is
critical.
The ADC requires a single+3.0 V power supply and a TTL/CMOS
compatible sample rate clock for full performance operation. No external reference or driver components are required for many
applications. A separate output power supply pin supports LVDS compatible serial digital output levels.
The ADC automatically multiplies up the sample rate clock for the appropriate LVDS serial data rate. An MSB trigger is provided to
signal a new output byte. Power down is supported and consumes less than 3mW when enabled.
Fabricated on an advanced CMOS process, the AD9229 is available in a 48-LFCSP package specified over the industrial temperature
range (–40°C to +85°C).
PRODUCT HIGHLIGHTS 1. Four analog-to-digital converters are contained in one small, space saving package.
2. A Data Clock Output (DCO) is provided which operates up to 390 MHz.
3. The outputs of each ADC are serialized with a maximum data output rate of 780 Mbps (12-bits x 65 MSPS).
4. The AD9229 operates from a single +3.0 V analog power supply.
TABLE OF CONTENTS AD9229—Specifications........................................................................3
DIGITAL SPECIFICATIONS...........................................................4
AC SPECIFICATIONS.......................................................................4
SWITCHING SPECIFICATIONS....................................................5
EXPLANATION OF TEST LEVELS................................................5
Absolute Maximum Ratings..................................................................6
EQuivalent circuits..................................................................................7
TYPICAL PERFORMANCE CHARACTERISTICS.........................8
Theory of Operation.............................................................................11
Analog Inputs....................................................................................11
Voltage Reference..............................................................................11
Digital Outputs..................................................................................11
Timing................................................................................................11
PLL......................................................................................................11
Pin Function Descriptions...................................................................12
Pin Configurations................................................................................13
Timing Diagram....................................................................................14
Ordering Guide.................................................................................15
REVISION HISTORY Revision PrA: Initial Version
Revision PrB: Added Definition and Theory of Operation sections, updated Pin Configurations
Revision PrC: Deleted demux outputs
Revision PrD: Added Pin Info, Package Info
Revision PrE: Ch. 3.3V to 3.0V for supply, Updated Sinad spec typo, Added analog typical Cin, Overange Recovery Time, Latency
Revision PrF: Added 50MSPS Grade, Removed Clk-, Updated Power, SNR,LVDS Rset, Tpd Estimates, Added Equiv Ckts, Added FFT, VREF
figure, Corrected FCO, DCO polarity timing
AD9229—SPECIFICATIONS1
AVDD = 3.0V, DRVDD = 3.0V; INTERNAL REFERENCE; DIFFERENTIAL ANALOG INPUTS,MAXIMUM SAMPLE RATE,TMIN TO
TMAX, UNLESS OTHERWISE NOTED
Parameter ACCURACY TEMPERATURE REFERENCE ANALOG INPUTS
POWER SUPPLY
Table 1: DC Specifications
DIGITAL SPECIFICATIONS
AVDD = 3.0V, DRVDD = 3.0V CLOCK INPUT (LVDS Mode)*
Table 2: Digital Specifications LVDS Rset resistor = 3.6K, LVDS Output Termination Resistor= 100 Ohms.
AC SPECIFICATIONS1
AVDD = 3.0 V, DRVDD = 3.0V; INTERNAL REFERENCE; DIFFERENTIAL ANALOG INPUTS,MAXIMUM SAMPLE RATE,TMIN TO
TMAX, UNLESS OTHERWISE NOTED SIGNAL TO NOISE
RATIO (SNR) –
Without
SIGNAL TO NOISE
RATIO (SINAD) – With Harmonics
EFFECTIVE
NUMBER OF BITS (ENOB)
fIN= 51 MHz
SECOND AND THIRD
Table 3: AC Specifications
SWITCHING SPECIFICATIONS
AVDD = 3.0 V, DRVDD = 3.0 V; DIFFERENTIAL ENCODE INPUT CLOCK
OUTPUT PARAMETERS IN
LVDS MODE
Out of Range
Recovery Time
Table 4: Switching Specifications
EXPLANATION OF TEST LEVELS
TEST LEVEL 100% production tested.
II 100% production tested at +25°C and guaranteed by design and characterization at specified temperatures.
III Sample tested only.
IV Parameter is guaranteed by design and characterization testing. Parameter is a typical value only.
VI 100% production tested at +25°C and guaranteed by design and characterization for industrial temperature range.
ABSOLUTE MAXIMUM RATINGS Electrical
Environmental
Table 5: Absolute Maximum Ratings
Stresses above those listed under the Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
EQUIVALENT CIRCUITS
AVDD
ANALOG INFigure 2 Analog Inputs
CLK
AVDDAVDDFigure 3 Clock Input
DRVDD
DATAOUT+,
DCO+,FCO+
DATAOUT-,
DCO-,FCO-
3.5MA
3.5MAFigure 4 LVDS Outputs
PDWN
AVDDAVDDFigure 5 PDWN Input
TYPICAL PERFORMANCE CHARACTERISTICS MHzMeasured FFT Performance 32MHz Ain at 65MSPS
