AD9071BR Fast Delivery |IC PHOENIX CO.,LIMITED

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AD9071BR
10-Bit, 100 MSPS A/D Converter
REV.B
10-Bit, 100 MSPS
A/D Converter
FUNCTIONAL BLOCK DIAGRAM
VREF
VREF
OUT
AIN
ENCODE
AIN
VCCGND
VDD
D0–D9
FEATURES
10-Bit, 100 MSPS ADC
Low Power: 450 mW at 100 MSPS
On-Chip Track/Hold
280 MHz Analog Bandwidth
SINAD = 54 dB @ 41 MHz
On-Chip Reference
1 V p-p Analog Input Range
Single +5 V Supply Operation
+5 V/+3.3 V Outputs
APPLICATIONS
Digital Communications
Signal Intelligence
Digital Oscilloscopes
Spectrum Analyzers
Medical Imaging
Sonar
HDTV
GENERAL DESCRIPTION
The AD9071 is a monolithic sampling analog-to-digital con-
verter with an on-chip track-and-hold circuit and TTL/CMOS
digital interfaces. The product operates at a 100 MSPS conver-
sion rate with outstanding dynamic performance over its full
operating range.
The ADC requires only a single 5 V supply and an encode clock
for full performance operation. The digital outputs are TTL
compatible. Separate output power supply pins support
interfacing with 3.3 V or 5 V logic. An out-of-range output
(OR) is available that indicates a conversion result is outside the
operating range. The output data are held at saturation levels
during an out-of-range condition.
The input amplifier supports differential or single-ended inter-
faces. An internal reference is included.
Fabricated on an advanced BiCMOS process, the AD9071 is
available in a plastic SOIC package specified over the industrial
temperature range (–40°C to +85°C).
AD9071–SPECIFICATIONS
(VCC = +5 V, VDD = +3.3 V, Differential Analog Input, ENCODE = 100 MSPS unless
otherwise noted)
AD9071
NOTESDifferential and integral nonlinearity based on FS = 80 MSPS.Gain error and gain temperature coefficient are based on the ADC only (with a fixed 2.5 V external reference).tV and tPD are measured from the threshold crossing of the ENCODE input to the 50% levels of the digital outputs. The output ac load during test is 5 pF.Power dissipation is measured under the following conditions: FS @ 100 MSPS, analog input is –1 dBFS at 10.3 MHz.A change in input offset voltage with respect to a change in VCC.SNR/harmonics based on an analog input voltage of –1.0 dBFS referenced to a 1.024 V full-scale input range.
Typical thermal impedance for the R style (SOIC) 28-lead package: qJC = 23°C/W, qCA = 48°C/W, qJA = 71°C/W.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
VCC␣ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+6 V
Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . .VCC to 0.0 V
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . .VCC to 0.0 V
VREF IN, VREF OUT . . . . . . . . . . . . . . . . . . . .VCC to 0.0 V
Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . .10 mA
Operating Temperature . . . . . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . .–65°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . .+175°C
Maximum Case Temperature . . . . . . . . . . . . . . . . . . .+150°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods may effect device reliability.
EXPLANATION OF TEST LEVELS
Test Level100% production tested.
II.100% production tested at +25°C and sample tested at
specified temperatures.
III.Sample tested only.
IV.Parameter is guaranteed by design and characterization
testing.Parameter is a typical value only.
VI.100% production tested at +25°C; guaranteed by design
and characterization testing for industrial temperature range.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9071 features proprietary ESD protection circuitry, permanent damage may
AD9071
ORDERING GUIDE
Table I.Output Coding
PIN FUNCTION DESCRIPTIONS
15–19, 24–28
PIN CONFIGURATION
VDD
GND
VDD
GND
D9 (MSB)
VCC
GND
VREF OUT
VREF IN
DNC
DNC
VCC
GND
AIN
AIN
GND
VCC
ENCODE
DNC = DO NOT CONNECT
Figure 1.Timing Diagram
Figure 4.Equivalent Encode Input Circuit
D9–0, OR
VDD
Figure 5.Equivalent Digital Output Circuit
VREF
OUT
VCC
Figure 6.Equivalent Reference Output Circuit
AD9071
–Typical Performance Characteristics
MHz
–20
Figure 7.Spectrum: FS = 100 MSPS, fIN = 10.3 MHz
MHz
–20
Figure 8.Spectrum: FS = 100 MSPS, fIN = 41 MHz
MHz
–20
Figure 9.Two-Tone Intermodulation Distortion
MHz
–20
Figure 10. Two-Tone Intermodulation Distortion
fIN – MHz10100206080
120140
Figure 11.SINAD/SNR vs. fIN: FS = 100 MSPS1206080100140
FS – MSPS
Figure 12.SINAD/SNR vs. FS: fIN = 10.3 MHz

Partno	Mfg	Dc	Qty	Available	Descript
AD9071BR	AD	N/a	25	avai	10-Bit, 100 MSPS A/D Converter