AD8555AR Fast Delivery |IC PHOENIX CO.,LIMITED

AD8555AR ,Zero-Drift, Digitally Programmable Sensor Signal AmplifierGENERAL DESCRIPTION In addition to extremely low input offset voltage and input off-set voltage dri ..
AD8561 ,Ultrafast 7 ns Single Supply ComparatorCHARACTERISTICSOffset Voltage V 2.3 7 mVOS £ +85

AD8555AR
Zero-Drift, Digitally Programmable Sensor Signal Amplifier
Zero-Drift, Digitally Programmable
Sensor Signal Amplifier
Rev. 0
FEATURES
Very low offset voltage: 10 µV maximum over temperature
Very low input offset voltage drift: 60 nV/°C maximum
High CMRR: 96 dB minimum
Digitally programmable gain and output offset voltage
Single-wire serial interface
Open and short wire fault detection
Low-pass filtering
Stable with any capacitive load
Externally programmable output clamp voltage for driving
low voltage ADCs
LFCSP-16 and SOIC-8 packages
2.7 V to 5.5 V operation
−40°C to +125°C operation
APPLICATIONS
Automotive sensors
Pressure and position sensors
Thermocouple amplifiers
Industrial weigh scales
Precision current sensing
Strain gages
FUNCTIONAL BLOCK DIAGRAM
VSS
VSS
VSS
VDD
VCLAMP
VPOS
FILT/
DIGOUT
VDDR7R6
04598-0-001
Figure 1.
GENERAL DESCRIPTION
The AD8555 is a zero-drift, sensor signal amplifier with digi-
tally programmable gain and output offset. Designed to easily
and accurately convert variable pressure sensor and strain
bridge outputs to a well-defined output voltage range, the
AD8555 also accurately amplifies many other differential or
single-ended sensor outputs. The AD8555 uses the ADI pat-
ented low noise auto-zero and DigiTrim® technologies to create
an incredibly accurate and flexible signal processing solution in
a very compact footprint.
Gain is digitally programmable in a wide range from 70 to 1,280
through a serial data interface. Gain adjustment can be fully
simulated in-circuit and then permanently programmed with
proven and reliable poly-fuse technology. Output offset voltage
is also digitally programmable and is ratiometric to the supply
voltage.
In addition to extremely low input offset voltage and input off-
set voltage drift and very high dc and ac CMRR, the AD8555
also includes a pull-up current source at the input pins and a
pull-down current source at the VCLAMP pin. This allows open
wire and shorted wire fault detection. A low-pass filter function
is implemented via a single low cost external capacitor. Output
clamping set via an external reference voltage allows the
AD8555 to drive lower voltage ADCs safely and accurately.
When used in conjunction with an ADC referenced to the same
supply, the system accuracy becomes immune to normal supply
voltage variations. Output offset voltage can be adjusted with a
resolution of better than 0.4% of the difference between VDD
and VSS. A lockout trim after gain and offset adjustment further
ensures field reliability.
The AD8555AR is fully specified over the extended industrial
temperature range of −40°C to +125°C. Operating from
single-supply voltages of 2.7 V to 5.5 V, the AD8555 is offered in
the narrow 8-lead SOIC package and the 4 mm × 4 mm
16-lead LFCSP.
TABLE OF CONTENTS
Electrical Specifications...................................................................3
Absolute Maximum Ratings............................................................7
Pin Configurations and Function Descriptions...........................8
Typical Performance Characteristics.............................................9
Theory of Operation......................................................................17
Gain Values..................................................................................18
Open Wire Fault Detection.......................................................19
Shorted Wire Fault Detection...................................................19
Floating VPOS, VNEG, or VCLAMP Fault Detection...........19
Device Programming.................................................................19
Filtering Function.......................................................................25
Driving Capacitive Loads..........................................................25
RF Interference...........................................................................26
Single-Supply Data Acquisition System..................................26
Using the AD8555 with Capacitive Sensors...........................27
Outline Dimensions.......................................................................28
Ordering Guide..........................................................................28
REVISION HISTORY
4/04—Revision 0: Initial Version
ELECTRICAL SPECIFICATIONS
At VDD = 5.0 V, VSS = 0.0 V, VCM = 2.5 V, VO = 2.5 V, −40°C ≤ TA ≤ +125°C, unless otherwise specified.
Table 1.

At VDD = 2.7 V, VSS = 0.0 V, VCM = 1.35 V, VO = 1.35 V, −40°C ≤ TA ≤ +125°C, unless otherwise specified.
Table 2.

ABSOLUTE MAXIMUM RATINGS
Table 3.
Table 4.

1 Differential input voltage is limited to ±5.0 V or ± the supply voltage, which-
ever is less.
2 θJA is specified for the worst-case conditions, i.e., θJA is specified for device
soldered in circuit board for SOIC and LFCSP packages.
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VSS
VOUT
VCLAMP
VPOS
VDD
FILT/DIGOUT
DIGIN
VNEG
04598-0-049
Figure 2. 8-Lead SOIC (Not Drawn to Scale)
04598-0-050NC
VCLAMP
VOUT1NCNC
VPOS78DIGIN
FILT/DIGOUT151413
AD8555
TOP VIEW
PIN 1
INDICATOR
VSS
VSS
NC = NO CONNECT
Figure 3. 16-Lead LFCSP (Not Drawn to Scale)
Table 5. Pin Configuration
TYPICAL PERFORMANCE CHARACTERISTICS
04598-0-005VOS (µV)–9–6–3360
NUMBE
R OF AMP
LIFIE
Figure 4. Input Offset Voltage Distribution
04598-0-061VCM (V)
4.500.51.01.52.02.53.03.54.0
–4.0
Figure 5. Input Offset Voltage vs. Common-Mode Voltage
04598-0-062TEMPERATURE (°C)
T OFFSET VOLTA
GE (
–10
Figure 6. Input Offset Voltage vs. Temperature
04598-0-006TCVOS (nV/°C)
NUMBE
R OF AMP
LIFIE
Figure 7. TCVOS @ VS = 5 V
04598-0-007TCVOS (nV/°C)12.525.037.550.062.575.0
NUMBE
R OF AMP
LIFIE
Figure 8. TCVOS @ VS = 2.7 V
04598-0-008TEMPERATURE (°C)
BUF V
(mV
–7.5
Figure 9. Output Buffer Offset vs. Temperature
04598-0-009TEMPERATURE (°C)
(nA)
100
Figure 10. Input Bias Current at VPOS, VNEG vs. Temperature
04598-0-010VCM (V)01234
(nA)
100
Figure 11. Input Bias Current at VPOS, VNEG vs. Common-Mode Voltage
04598-0-063TEMPERATURE (°C)
(nA)
–0.5
Figure 12. Input Offset Current vs. Temperature
04598-0-011DIGITAL INPUT VOLTAGE (V)012345
DIGITAL INP
T CURRE
NT (
0.5
Figure 13. Digital Input Current vs. Digital Input Voltage (Pin 3)
04598-0-012VCLAMP VOLTAGE (V)023145
CLAMP
CURRE
NT (nA)
100
Figure 14. VCLAMP Current Over Temperature at VS = 5 V vs. VCLAMP Voltage
04598-0-013VCLAMP VOLTAGE (V)
CLAMP
CURRE
NT (nA)
100
Figure 15. VCLAMP Current Over Temperature at VS = 2.7 vs. VCLAMP Voltage
04598-0-014SUPPLY VOLTAGE (V)023145
CURRE
NT (mA)
Figure 16. Supply Current (ISY) vs. Supply Voltage
04598-0-015TEMPERATURE (°C)
CURRE
NT (mA)
1.0
Figure 17. Supply Current (ISY) vs. Temperature
04598-0-016FREQUENCY (Hz)100k1001k10k
CMRR (dB)
120
Figure 18. CMRR vs. Frequency
04598-0-017FREQUENCY (Hz)1001k10k100k
CMRR (dB)
120
Figure 19. CMRR vs. Frequency
04598-0-018TEMPERATURE (°C)
CMRR (dB)
115
Figure 20. CMRR vs. Temperature at Different Gains
04598-0-019FREQUENCY (kHz)50
VOLTA
GE N
OISE D
ITY (
V/ H
Figure 21. Input Voltage Noise Density vs. Frequency (0 Hz to 10 kHz)
04598-0-021FREQUENCY (kHz)
VOLTA
GE N
OISE D
ITY (
V/ H
Figure 22. Input Voltage Noise Density vs. Frequency (0 Hz to 500 kHz)
04598-0-023TIME (1s/DIV)
OISE (
–0.6
Figure 23. Low Frequency Input Voltage Noise (0.1 Hz to 10 Hz)
Figure 24. Low Frequency Input Voltage Noise (0.1 Hz to 10 Hz)
04598-0-025FREQUENCY (Hz)100k10k1M
CLOSED-
OOP GAIN (
Figure 25. Closed-Loop Gain vs. Frequency Measured at Filter Pin
04598-0-026FREQUENCY (Hz)100k10k1M
CLOSED-
OOP GAIN (
Figure 26. Closed-Loop Gain vs. Frequency Measured at Output Pin
04598-0-027FREQUENCY (Hz)100k10k1M10M
GAIN (
Figure 27. Output Buffer Gain vs. Frequency
04598-0-028LOAD CAPACITANCE (nF)
OVER
OOT (
Figure 28. Output Buffer Positive Overshoot
04598-0-029LOAD CAPACITANCE (nF)
OVER
OOT (
Figure 29. Output Buffer Negative Overshoot
04598-0-030LOAD CURRENT (mA)
VDD
OUTPUT VOLTAGE (V)
0.010
Figure 30. Output Voltage to Supply Rail vs. Load Current
04598-0-031TEMPERATURE (°C)
OUTP
UT S
ORT CIRCUIT (mA)
–12
Figure 31. Output Short Circuit vs. Temperature
TIME (100µs/DIV)
VOLTAGE
Figure 32. Power-On Response at 25°C
TIME (100µs/DIV)
VOLTA
GE (
V/D
IV)5
Figure 33. Power-On Response at 125°C
TIME (100µs/DIV)
VOLTA
GE (
V/D
IV)5
Figure 34. Power-On Response at −40°C
04598-0-035TEMPERATURE (°C)
RR (dB)
105
Figure 35. PSRR vs. Temperature
04598-0-068FREQUENCY (kHz)
RR (dB)
100
Figure 36. PSRR vs. Frequency
04598-0-036TIME (100µs/DIV)
VOU
50mV/D
IV)
Figure 37. Small Signal Response
04598-0-037TIME (100µs/DIV)
VOU
50mV/D
IV)
Figure 38. Small Signal Response
04598-0-038TIME (10µs/DIV)
VOU
V/D
IV)
Figure 39. Large Signal Response

Partno	Mfg	Dc	Qty	Available	Descript
AD8555AR	AD	N/a	10	avai	Zero-Drift, Digitally Programmable Sensor Signal Amplifier