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AD8551AR-AD8551ARM-AD8552AR-AD8552ARU-AD8554AR-AD8554ARU
Zero-Drift, Single-Supply, Rail-to-Rail Input/Output Operational Amplifiers
REV.0
Zero-Drift, Single-Supply,
Rail-to-Rail Input/Output
Operational Amplifiers
8-Lead SOIC
(R Suffix)
14-Lead SOIC
(R Suffix)
FEATURES
Low Offset Voltage: 1 mV
Input Offset Drift: 0.005 mV/8C
Rail-to-Rail Input and Output Swing
+5 V/+2.7 V Single-Supply Operation
High Gain, CMRR, PSRR: 130 dB
Ultralow Input Bias Current: 20 pA
Low Supply Current: 700 mA/Op Amp
Overload Recovery Time: 50 ms
No External Capacitors Required
APPLICATIONS
Temperature Sensors
Pressure Sensors
Precision Current Sensing
Strain Gage Amplifiers
Medical Instrumentation
Thermocouple Amplifiers
GENERAL DESCRIPTIONThis new family of amplifiers has ultralow offset, drift and bias
current. The AD8551, AD8552 and AD8554 are single, dual and
quad amplifiers featuring rail-to-rail input and output swings. All
are guaranteed to operate from +2.7 V to +5 V single supply.
The AD855x family provides the benefits previously found only
in expensive autozeroing or chopper-stabilized amplifiers. Using
Analog Devices’ new topology these new zero-drift amplifiers
combine low cost with high accuracy. No external capacitors are
required.
With an offset voltage of only 1 mV and drift of 0.005 mV/°C,
the AD8551 is perfectly suited for applications where error
sources cannot be tolerated. Temperature, position and pres-
sure sensors, medical equipment and strain gage amplifiers
benefit greatly from nearly zero drift over their operating
temperature range. The rail-to-rail input and output swings
provided by the AD855x family make both high-side and low-
side sensing easy.
The AD855x family is specified for the extended industrial/
automotive (–40°C to +125°C) temperature range. The AD8551
single is available in 8-lead MSOP and narrow 8-lead SOIC
packages. The AD8552 dual amplifier is available in 8-lead
narrow SO and 8-lead TSSOP surface mount packages. The
AD8554 quad is available in narrow 14-lead SOIC and 14-lead
TSSOP packages.
8-Lead MSOP
(RM Suffix)
8-Lead TSSOP
(RU Suffix)
14-Lead TSSOP
(RU Suffix)
PIN CONFIGURATIONS
8-Lead SOIC
(R Suffix)
AD8551/AD8552/AD8554–SPECIFICATIONS
ELECTRICAL CHARACTERISTICSNOISE PERFORMANCE␣
NOTEGain testing is highly dependent upon test bandwidth.
Specifications subject to change without notice.
(VS = +5 V, VCM = +2.5 V, VO = +2.5 V, TA = +258C unless otherwise noted)
AD8551/AD8552/AD8554
ELECTRICAL CHARACTERISTICSNOISE PERFORMANCE␣
NOTEGain testing is highly dependent upon test bandwidth.
Specifications subject to change without notice.
(VS = +2.7 V, VCM = +1.35 V, VO = +1.35 V, TA = +258C unless otherwise noted)
AD8551/AD8552/AD8554
ORDERING GUIDENOTESDue to package size limitations, these characters represent the part number.Available in reels only. 1,000 or 2,500 pieces per reel.Available in reels only. 2,500 pieces per reel.
ABSOLUTE MAXIMUM RATINGSSupply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+6 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . .GND to VS + 0.3 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . .–5.0 V
ESD(Human Body Model) . . . . . . . . . . . . . . . . . . . . .2,000 V
Output Short-Circuit Duration to GND . . . . . . . . .Indefinite
Storage Temperature Range
RM, RU and R Packages . . . . . . . . . . . . .–65°C to +150°C
Operating Temperature Range
AD8551A/AD8552A/AD8554A . . . . . . . .–40°C to +125°C
Junction Temperature Range
RM, RU and R Packages . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . .+300°C
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.Differential input voltage is limited to –5.0 V or the supply voltage, whichever is less.
NOTEqJA is specified for worst case conditions, i.e., qJA is specified for device in socket
for P-DIP packages, qJA is specified for device soldered in circuit board for
SOIC and TSSOP packages.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8551/AD8552/AD8554 features proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
Figure 1.Input Offset Voltage
Distribution at +2.7 V
Figure 4.Input Offset Voltage
Distribution at +5 V
LOAD CURRENT – mA
OUTPUT VOLTAGE – mV
10k
0.00010.01 Figure 7.Output Voltage to Supply
Rail vs. Output Current at +2.7 V
INPUT COMMON-MODE VOLTAGE – V
INPUT BIAS CURRENT – pA230
5234220
Figure 2.Input Bias Current vs.
Common-Mode Voltage
INPUT OFFSET DRIFT – nV/8C
NUMBER OF AMPLIFIERS62345 Figure 5.Input Offset Voltage Drift
Distribution at +5 V
TEMPERATURE – 8C
INPUT BIAS CURRENT –21000275250
125225
0255075100150
Figure 8.Bias Current vs. Temperature
Figure 3.Input Bias Current vs.
Common-Mode Voltage
Figure 6.Output Voltage to Supply
Rail vs. Output Current at +5 V
Figure 9.Supply Current vs.
Temperature
AD8551/AD8552/AD8554
SUPPLY VOLTAGE – V
SUPPLY CURRENT PER AMPLIFIER – 800
500162345 Figure 10.Supply Current vs.
Supply Voltage
FREQUENCY – Hz
CLOSED-LOOP GAIN – dB
1001k10M10k100k1M240
Figure 13.Closed Loop Gain vs.
Frequency at +2.7 V
FREQUENCY – Hz
OUTPUT IMPEDANCE –
1001k10M10k100k1M
120 Figure 16.Output Impedance vs.
Frequency at +5 V
Figure 11.Open-Loop Gain and
Phase Shift vs. Frequency at +2.7 V
FREQUENCY – Hz
CLOSED-LOOP GAIN – dB
1001k10M10k100k1M240
Figure 14.Closed Loop Gain vs.
Frequency at +5 V
Figure 17.Large Signal Transient
Response at +2.7 V
Figure 12.Open-Loop Gain and
Phase Shift vs. Frequency at +5 V
Figure 15.Output Impedance vs.
Frequency at +2.7 V
Figure 18.Large Signal Transient
Response at +5 V
Figure 19.Small Signal Transient
Response at +2.7 V
Figure 22.Small Signal Overshoot
vs. Load Capacitance at +5 V
Figure 25.No Phase Reversal
Figure 20.Small Signal Transient
Response at +5 V
Figure 23.Positive Overvoltage
Recovery
FREQUENCY – Hz
CMRR – dB
1001k10M10k100k1M
100 Figure 26.CMRR vs. Frequency
at +2.7 V
Figure 21.Small Signal Overshoot
vs. Load Capacitance at +2.7 V
Figure 24.Negative Overvoltage
Recovery
Figure 27.CMRR vs. Frequency
at +5 V
AD8551/AD8552/AD8554
FREQUENCY – Hz
PSRR – dB
1401001k10M10k100k1M
100 Figure 28.PSRR vs. Frequency
at –1.35 V
FREQUENCY – Hz
OUTPUT SWING – V p-p
1001k1M10k100k Figure 31.Maximum Output Swing
vs. Frequency at +5 V
– nV/ Hz
FREQUENCY – kHz
1.01.52.02.50 Figure 34.Voltage Noise Density at
+2.7 V from 0 Hz to 2.5 kHz
FREQUENCY – Hz
PSRR – dB
1001k10M10k100k1M
100 Figure 29.PSRR vs. Frequency
at –2.5 V
Figure 32.0.1 Hz to 10 Hz Noise
at +2.7 V
– nV/ Hz
FREQUENCY – kHz1520250 Figure 35.Voltage Noise Density at
+2.7 V from 0 Hz to 25 kHz
Figure 30.Maximum Output Swing
vs. Frequency at +2.7 V
Figure 33.0.1 Hz to 10 Hz Noise at +5 V
Figure 36.Voltage Noise Density at
+5 V from 0 Hz to 2.5 kHz
– nV/ Hz
FREQUENCY – kHz Figure 37.Voltage Noise Density
at +5 V from 0 Hz to 25 kHz
TEMPERATURE – 8C
SHORT-CIRCUIT CURRENT – mA
250275250
125225
0255075100
150220
Figure 40.Output Short-Circuit
Current vs. Temperature
TEMPERATURE – 8C
OUTPUT VOLTAGE SWING – mV
200275250
125225
0255075100
225 Figure 43.Output Voltage to Supply
Rail vs. Temperature
– nV/ Hz
FREQUENCY – Hz
168 Figure 38.Voltage Noise Density
at +5 V from 0 Hz to 10 Hz
TEMPERATURE – 8C
SHORT-CIRCUIT CURRENT – mA
100
2100275250
125225
0255075100
150240
Figure 41.Output Short-Circuit
Current vs. Temperature
Figure 39.Power-Supply Rejection
vs. Temperature
Figure 42.Output Voltage to
Supply Rail vs. Temperature
AD8551/AD8552/AD8554
FUNCTIONAL DESCRIPTIONThe AD855x family of amplifiers are high precision rail-to-rail
operational amplifiers that can be run from a single supply volt-
age. Their typical offset voltage of less than 1 mV allows these
amplifiers to be easily configured for high gains without risk of
excessive output voltage errors. The extremely small tempera-
ture drift of 5 nV/°C ensures a minimum of offset voltage error
over its entire temperature range of –40°C to +125°C, making
the AD855x amplifiers ideal for a variety of sensitive measure-
ment applications in harsh operating environments such as
under-hood and braking/suspension systems in automobiles.
The AD855x family are CMOS amplifiers and achieve their
high degree of precision through autozero stabilization. This
autocorrection topology allows the AD855x to maintain its low
offset voltage over a wide temperature range and over its operat-
ing lifetime.
Amplifier ArchitectureEach AD855x op amp consists of two amplifiers, a main amplifier
and a secondary amplifier, used to correct the offset voltage of the
main amplifier. Both consist of a rail-to-rail input stage, allowing
the input common-mode voltage range to reach both supply rails.
The input stage consists of an NMOS differential pair operating
concurrently with a parallel PMOS differential pair. The outputs
from the differential input stages are combined in another gain
stage whose output is used to drive a rail-to-rail output stage.
The wide voltage swing of the amplifier is achieved by using two
output transistors in a common-source configuration. The output
voltage range is limited by the drain to source resistance of these
transistors. As the amplifier is required to source or sink more
output current, the rDS of these transistors increases, raising the
voltage drop across these transistors. Simply put, the output volt-
age will not swing as close to the rail under heavy output current
conditions as it will with light output current. This is a character-
istic of all rail-to-rail output amplifiers. Figures 6 and 7 show how
close the output voltage can get to the rails with a given output
current. The output of the AD855x is short circuit protected to
approximately 50 mA of current.
The AD855x amplifiers have exceptional gain, yielding greater
than 120 dB of open-loop gain with a load of 2 kW. Because the
output transistors are configured in a common-source configu-
ration, the gain of the output stage, and thus the open-loop gain
of the amplifier, is dependent on the load resistance. Open-loop
gain will decrease with smaller load resistances. This is another
characteristic of rail-to-rail output amplifiers.
Basic Autozero Amplifier TheoryAutocorrection amplifiers are not a new technology. Various IC
implementations have been available for over 15 years and some
improvements have been made over time. The AD855x design
offers a number of significant performance improvements over
older versions while attaining a very substantial reduction in de-
vice cost. This section offers a simplified explanation of how the
AD855x is able to offer extremely low offset voltages and high
open-loop gains.
As noted in the previous section on amplifier architecture, each
AD855x op amp contains two internal amplifiers. One is used as
the primary amplifier, the other as an autocorrection, or nulling,
amplifier. Each amplifier has an associated input offset voltage,
which can be modeled as a dc voltage source in series with the
noninverting input. In Figures 44 and 45 these are labeled as
VOSX, where x denotes the amplifier associated with the offset; A
for the nulling amplifier, B for the primary amplifier. The open-
loop gain for the +IN and –IN inputs of each amplifier is given
as AX. Both amplifiers also have a third voltage input with an
associated open-loop gain of BX.
There are two modes of operation determined by the action of
two sets of switches in the amplifier: An autozero phase and an
amplification phase.
Autozero PhaseIn this phase, all fA switches are closed and all fB switches are
opened. Here, the nulling amplifier is taken out of the gain loop
by shorting its two inputs together. Of course, there is a degree of
offset voltage, shown as VOSA, inherent in the nulling amplifier
which maintains a potential difference between the +IN and –IN
inputs. The nulling amplifier feedback loop is closed through fA2
and VOSA appears at the output of the nulling amp and on CM1,
an internal capacitor in the AD855x. Mathematically, we can ex-
press this in the time domain as:
which can be expressed as,
This shows us that the offset voltage of the nulling amplifier
times a gain factor appears at the output of the nulling amplifier
and thus on the CM1 capacitor.
VIN+
VIN2
VOUT
VNAFigure 44.Autozero Phase of the AD855x
Amplification PhaseWhen the fB switches close and the fA switches open for the
amplification phase, this offset voltage remains on CM1 and
essentially corrects any error from the nulling amplifier. The
voltage across CM1 is designated as VNA. Let us also designate
VIN as the potential difference between the two inputs to the
primary amplifier, or VIN = (VIN+ – VIN–). Now the output of the
nulling amplifier can be expressed as:
