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AD844JR-16
18V; 1.5W; 60MHz, 1.1W; 2000V/mS monolithic Op Amp. For flash ADC input amplifiers, high-speed current DAC interfaces
REV.D
60 MHz, 2000 V/�s
Monolithic Op Amp
CONNECTION DIAGRAMS
PRODUCT DESCRIPTIONThe AD844 is a high-speed monolithic operational amplifier
fabricated using Analog Devices’ junction isolated complemen-
tary bipolar (CB) process. It combines high bandwidth and very
fast large signal response with excellent dc performance. Although
optimized for use in current to voltage applications and as an
inverting mode amplifier, it is also suitable for use in many
noninverting applications.
The AD844 can be used in place of traditional op amps, but its
current feedback architecture results in much better ac perfor-
mance, high linearity and an exceptionally clean pulse response.
This type of op amp provides a closed-loop bandwidth which is
determined primarily by the feedback resistor and is almost inde-
pendent of the closed-loop gain. The AD844 is free from the slew
rate limitations inherent in traditional op amps and other
current-feedback op amps. Peak output rate of change can be over
2000 V/µs for a full 20 V output step. Settling time is typically
100 ns to 0.1%, and essentially independent of gain. The AD844
can drive 50 Ω loads to ±2.5 V with low distortion and is short
circuit protected to 80 mA.
The AD844 is available in four performance grades and three
package options. In the 16-lead SOIC (R) package, the AD844J is
specified for the commercial temperature range of 0°C to 70°C.
The AD844A and AD844B are specified for the industrial tem-
perature range of –40°C to +85°C and are available in the cerdip (Q)
16-Lead SOIC
(R) Package
8-Lead Plastic (N),
and Cerdip (Q) Packagespackage. The AD844A is also available in an 8-lead plastic
mini-DIP (N). The AD844S is specified over the military tempera-
ture range of –55°C to +125°C. It is available in the 8-lead
cerdip (Q) package. “A” and “S” grade chips and devices processed
to MIL-STD-883B, REV. C are also available.
PRODUCT HIGHLIGHTS1. The AD844 is a versatile, low cost component providing an
excellent combination of ac and dc performance.It is essentially free from slew rate limitations. Rise and fall
times are essentially independent of output level.The AD844 can be operated from ±4.5 V to ±18 V power
supplies and is capable of driving loads down to 50 Ω, as well
as driving very large capacitive loads using an external network.The offset voltage and input bias currents of the AD844 are
laser trimmed to minimize dc errors; VOS drift is typically
1 µV/°C and bias current drift is typically 9 nA/°C.The AD844 exhibits excellent differential gain and differen-
tial phase characteristics, making it suitable for a variety of
video applications with bandwidths up to 60 MHz.The AD844 combines low distortion, low noise and low drift
with wide bandwidth, making it outstanding as an input
amplifier for flash A/D converters.
FEATURES
Wide Bandwidth:60 MHz at Gain of –1
Wide Bandwidth:33 MHz at Gain of –10
Very High Output Slew Rate: Up to 2000 V/�s
20 MHz Full Power Bandwidth, 20 V p-p, RL = 500 �
Fast Settling: 100 ns to 0.1% (10 V Step)
Differential Gain Error: 0.03% at 4.4 MHz
Differential Phase Error: 0.158 at 4.4 MHz
High Output Drive: 650 mA into 50 � Load
Low Offset Voltage: 150 mV Max (B Grade)
Low Quiescent Current: 6.5 mA
Available in Tape and Reel in Accordance with
EIA-481A Standard
APPLICATIONS
Flash ADC Input Amplifiers
High-Speed Current DAC Interfaces
Video Buffers and Cable Drivers
Pulse Amplifiers
AD844–SPECIFICATIONS
(@ TA = 25�C and VS = �15 V dc, unless otherwise noted)
AD844
ORDERING GUIDE
*N = Plastic DIP; Q = Cerdip; R = Small Outline IC (SOIC).NOTESRated performance after a 5 minute warmup at TA = 25°C.Input signal 285 mV p-p carrier (40 IRE) riding on 0 mV to 642 mV (90 IRE) ramp. RL= 100 Ω; R1, R2 = 300 Ω.Input signal 0 dBm, CL = 10 pF, RL = 500 Ω, R1 = 500 Ω, R2 = 500 Ω in Figure 2.Input signal 0 dBm, CL =10 pF, RL = 500 Ω, R1 = 500 Ω, R2 = 50 Ω in Figure 2.CL = 10 pF, RL = 500 Ω, R1 = 1 kΩ, R2 = 1 kΩ in Figure 2.CL = 10 pF, RL = 500 Ω, R1 = 500 Ω, R2 = 50 Ω in Figure 2.
Specifications subject to change without notice. All min and max specifications are guaranteed.
ABSOLUTE MAXIMUM RATINGS1Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Power Dissipation2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 W
Output Short Circuit Duration . . . . . . . . . . . . . . . . .Indefinite
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . .±VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Inverting Input Current
Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 mA
Transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 mA
Storage Temperature Range (Q) . . . . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . .300°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 V
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect device
reliability.8-Lead Plastic Package:θJA = 90°C/W
8-Lead Cerdip Package:θJA = 110°C/W
16-Lead SOIC Package:θJA = 100°C/W
METALIZATION PHOTOGRAPHContact factory for latest dimensions.
Dimension shown in inches and (mm).
TPC 1.–3 dB Bandwidth vs.
Supply Voltage R1 = R2 = 500 Ω
TPC 4.Noninverting Input Voltage
Swing vs. Supply Voltage
TPC 7.Inverting Input Bias Cur-
rent (IBN) and Noninverting Input
Bias Current (IBP) vs. Temperature
TPC 2.Harmonic Distortion vs.
Frequency, R1 = R2 = 1 kΩ
TPC 5.Output Voltage Swing
vs. Supply Voltage
TPC 8.Output Impedance vs.
Frequency, Gain = –1, R1 = R2 = 1 kΩ
TPC 3.Transresistance vs.
Temperature
TPC 6.Quiescent Supply
Current vs. Temperature and
Supply Voltage
TPC 9.–3 dB Bandwidth vs.
Temperature, Gain = –1,
R1 = R2 = 1 kΩ
AD844–Typical Characteristics(TA = 25�C and VS = �15 V, unless otherwise noted)
TPC 10.Inverting Amplifier,
Gain of –1 (R1 = R2)
TPC 12.Phase vs. Frequency
Gain = –1, RL = 500 Ω, CL = 0 pF
TPC 11.Gain vs. Frequency for
Gain = –1, RL = 500 Ω, CL = 0 pF
TPC 13.Large Signal Pulse
Response, Gain = –1, R1 = R2 = 1 kΩ
TPC 14.Small Signal Pulse
Response, Gain = –1, R1 = R2 = 1 kΩ
Inverting Gain-of-1 AC Characteristics
Inverting Gain-of-10 AC CharacteristicsTPC 16.Gain vs. Frequency,
Gain = –10
TPC 15.Gain of –10 Amplifier
TPC 17.Phase vs. Frequency,
Gain = –10
AD844
Inverting Gain-of-10 Pulse ResponseTPC 18.Large Signal Pulse
Response, Gain = –10, RL = 500 Ω
TPC 19.Small Signal Pulse
Response, Gain = –10, RL = 500 Ω
TPC 21.Gain vs. Frequency,
Gain = +10
TPC 22.Phase vs. Frequency,
Gain = +10
Noninverting Gain-of-10 AC CharacteristicsTPC 20.Noninverting Gain of
+10 Amplifier
TPC 24.Small Signal Pulse
Response, Gain = +10, RL = 500 Ω
TPC 23.Noninverting Amplifier Large
Signal Pulse Response, Gain = +10,
RL = 500 Ω
Response as an Inverting AmplifierFigure 2 shows the connections for an inverting amplifier.
Unlike a conventional amplifier the transient response and the
small signal bandwidth are determined primarily by the value of
the external feedback resistor, R1, rather than by the ratio of
R1/R2 as is customarily the case in an op amp application. This
is a direct result of the low impedance at the inverting input. As
with conventional op amps, the closed loop gain is –R1/R2.
The closed loop transresistance is simply the parallel sum of R1
and Rt. Since R1 will generally be in the range 500 Ω to 2 kΩ
and Rt is about 3 MΩ the closed loop transresistance will be
only 0.02% to 0.07% lower than R1. This small error will often
be less than the resistor tolerance.
When R1 is fairly large (above 5 kΩ) but still much less than Rt,
the closed loop HF response is dominated by the time constant
R1Ct. Under such conditions the AD844 is over-damped and
will provide only a fraction of its bandwidth potential. Because
of the absence of slew rate limitations under these conditions,
the circuit will exhibit a simple single pole response even under
large signal conditions.
In Figure 2, R3 is used to properly terminate the input if desired.
R3 in parallel with R2 gives the terminated resistance. As R1 is
lowered, the signal bandwidth increases, but the time constant
R1Ct becomes comparable to higher order poles in the closed
loop response. Therefore, the closed loop response becomes
complex, and the pulse response shows overshoot. When R2 is
much larger than the input resistance, RIN, at Pin 2, most of the
feedback current in R1 is delivered to this input; but as R2
becomes comparable to RIN, less of the feedback is absorbed at
Pin 2, resulting in a more heavily damped response. Conse-
quently, for low values of R2 it is possible to lower R1 without
causing instability in the closed loop response. Table I lists
combinations of R1 and R2 and the resulting frequency response
for the circuit of Figure 2. TPC 13 shows the very clean and fast
±10 V pulse response of the AD844.
Figure 2.Inverting Amplifier
UNDERSTANDING THE AD844The AD844 can be used in ways similar to a conventional op
amp while providing performance advantages in wideband
applications. However, there are important differences in the
internal structure which need to be understood in order to
optimize the performance of the AD844 op amp.
Open Loop BehaviorFigure 1 shows a current feedback amplifier reduced to essen-
tials. Sources of fixed dc errors such as the inverting node bias
current and the offset voltage are excluded from this model and
are discussed later. The most important parameter limiting the
dc gain is the transresistance, Rt, which is ideally infinite. A finite
value of Rt is analogous to the finite open loop voltage gain in a
conventional op amp.
The current applied to the inverting input node is replicated by
the current conveyor so as to flow in resistor Rt. The voltage
developed across Rt is buffered by the unity gain voltage follower.
Voltage gain is the ratio Rt/ RIN. With typical values of Rt = 3 MΩ
and RIN = 50 Ω, the voltage gain is about 60,000. The open
loop current gain is another measure of gain and is determined
by the beta product of the transistors in the voltage follower
stage (see Figure 4); it is typically 40,000.
Figure 1.Equivalent Schematic
The important parameters defining ac behavior are the trans-
capacitance, Ct, and the external feedback resistor (not shown).
The time constant formed by these components is analogous to
the dominant pole of a conventional op amp, and thus cannot
be reduced below a critical value if the closed loop system is to
be stable. In practice, Ct is held to as low a value as possible
(typically 4.5 pF) so that the feedback resistor can be maximized
while maintaining a fast response. The finite RIN also affects the
closed loop response in some applications as will be shown.
The open loop ac gain is also best understood in terms of the
transimpedance rather than as an open loop voltage gain. The
open loop pole is formed by Rt in parallel with Ct. Since Ct is
typically 4.5 pF, the open loop corner frequency occurs at
about 12 kHz. However, this parameter is of little value in
determining the closed loop response.
AD844
Table I.Response as an I-V Converter
The AD844 works well as the active element in an operational
current to voltage converter, used in conjunction with an exter-
nal scaling resistor, R1, in Figure 3. This analysis includes the
stray capacitance, CS, of the current source, which might be a
high speed DAC. Using a conventional op amp, this capacitance
forms a “nuisance pole” with R1 which destabilizes the closed
loop response of the system. Most op amps are internally com-
pensated for the fastest response at unity gain, so the pole due
to R1 and CS reduces the already narrow phase margin of the
system. For example, if R1 were 2.5 kΩ a CS of 15 pF would
place this pole at a frequency of about 4 MHz, well within the
response range of even a medium speed operational amplifier.
In a current feedback amp this nuisance pole is no longer deter-
mined by R1 but by the input resistance, RIN. Since this is about
50 Ω for the AD844, the same 15 pF forms a pole 212 MHz
and causes little trouble. It can be shown that theresponse of
this system is:
where K is a factor very close to unity and represents the finite
dc gain of the amplifier, Td is the dominant pole and Tn is the
nuisance pole:
Td = KR1Ct
Tn = RINCS (assuming RIN << R1)
Using typical values of R1 = 1 kΩ and Rt = 3 MΩ, K is 0.9997;
in other words, the “gain error” is only 0.03%. This is much less
than the scaling error of virtually all DACs and can be absorbed,
if necessary, by the trim needed in a precise system.
In the AD844, Rt is fairly stable with temperature and supply
voltages, and consequently the effect of finite “gain” is negli-
gible unless high value feedback resistors are used. Since that
would result in slower response times than are possible, the
relatively low value of Rt in the AD844 will rarely be a signifi-
cant source of error.
Figure 3.Current-to-Voltage Converter
Circuit Description of the AD844A simplified schematic is shown in Figure 4. The AD844 differs
from a conventional op amp in that the signal inputs have
radically different impedance. The noninverting input (Pin 3)
presents the usual high impedance. The voltage on this input is
transferred to the inverting input (Pin 2) with a low offset
voltage, ensured by the close matching of like polarity transis-
tors operating under essentially identical bias conditions. Laser
trimming nulls the residual offset voltage, down to a few
tens of microvolts. The inverting input is the common emitter
node of a complementary pair of grounded base stages and
behaves as a current summing node. In an ideal current feed-
back op amp the input resistance would be zero. In the AD844
it is about 50 Ω.
A current applied to the inverting input is transferred to a
complementary pair of unity-gain current mirrors which deliver
the same current to an internal node (Pin 5) at which the full
output voltage is generated. The unity-gain complementary
voltage follower then buffers this voltage and provides the load
driving power. This buffer is designed to drive low impedance
loads such as terminated cables, and can deliver ±50 mA into a
50 Ω load while maintaining low distortion, even when operat-
ing at supply voltages of only ±6 V. Current limiting (not
shown) ensures safe operation under short circuited conditions.
Figure 4.Simplified Schematic
