AD8307 ,Low Cost, DCAPPLICATIONSCOMMON COM COMConversion of Signal Level to Decibel FormOFSINPUT-OFFSETOFS. ADJ.COMPENS ..
AD8307AN ,Low Cost DC-500 MHz, 92 dB Logarithmic AmplifierSPECIFICATIONSS A L Parameter Conditions Min Typ Max UnitsGENERAL
AD8307AR ,Low Cost DC-500 MHz, 92 dB Logarithmic AmplifierSpecifications subject to change without notice.–2– REV. AAD8307*Stresses above those listed under ..
AD8307AR-REEL ,Low Cost DC-500 MHz, 92 dB Logarithmic AmplifierAPPLICATIONSCOMMON COM COMConversion of Signal Level to Decibel FormOFSINPUT-OFFSETOFS. ADJ.COMPENS ..
AD8307AR-REEL7 ,Low Cost DC-500 MHz, 92 dB Logarithmic Amplifierapplications requiring the reduction of aEach of the cascaded amplifier/limiter cells has a small-s ..
AD8307ARZ-RL7 , Low Cost DC-500 MHz, 92 dB Logarithmic Amplifier
ADP3189JCPZ-RL , 8-Bit Programmable 2- to 5-Phase Synchronous Buck Controller
ADP3189JCPZ-RL , 8-Bit Programmable 2- to 5-Phase Synchronous Buck Controller
ADP3189JCPZ-RL , 8-Bit Programmable 2- to 5-Phase Synchronous Buck Controller
ADP3192JCPZ-RL , 8-Bit Programmable 2- to 4-Phase Synchronous Buck Controller
ADP3192JCPZ-RL , 8-Bit Programmable 2- to 4-Phase Synchronous Buck Controller
ADP3196JCPZ-RL , 6-Bit Programmable 2- to 4-Phase Synchronous Buck Controller
AD8307
Low Cost, DC
REV.A
Low Cost DC-500 MHz, 92 dB
Logarithmic Amplifier
FUNCTIONAL BLOCK DIAGRAM
COMMON
–INPUT
+INPUT
SUPPLYENABLE
INT. ADJ
OUTPUT
OFS. ADJ.
FEATURES
Complete Multistage Logarithmic Amplifier
92 dB Dynamic Range:–75 dBm to +17 dBm
to –90 dBm Using Matching Network
Single Supply of 2.7 V Min at 7.5 mA Typical
DC-500 MHz Operation, 61 dB Linearity
Slope of 25 mV/dB, Intercept of –84 dBm
Highly Stable Scaling Over Temperature
Fully Differential DC-Coupled Signal Path
100 ns Power-Up Time, 150 mA Sleep Current
APPLICATIONS
Conversion of Signal Level to Decibel Form
Transmitter Antenna Power Measurement
Receiver Signal Strength Indication (RSSI)
Low Cost Radar and Sonar Signal Processing
Network and Spectrum Analyzers (to 120 dB)
Signal Level Determination Down to 20 Hz
True Decibel AC Mode for Multimeters
PRODUCT DESCRIPTIONThe AD8307 is the first logarithmic amplifier in an 8-lead (SO-8)
package. It is a complete 500 MHz monolithic demodulating
logarithmic amplifier based on the progressive compression
(successive detection) technique, providing a dynamic range of
92 dB to –3 dB law-conformance and 88 dB to a tight –1 dB
error bound at all frequencies up to 100 MHz. It is extremely
stable and easy to use, requiring no significant external compo-
nents. A single supply voltage of 2.7 V to 5.5 V at 7.5 mA is
needed, corresponding to an unprecedented power consumption
of only 22.5 mW at 3 V. A fast-acting CMOS-compatible con-
trol pin can disable the AD8307 to a standby current of under
150mA.
Each of the cascaded amplifier/limiter cells has a small-signal
gain of 14.3 dB, with a –3 dB bandwidth of 900 MHz. The
input is fully differential and at a moderately high impedance
(1.1 kW in parallel with about 1.4 pF). The AD8307 provides a
basic dynamic range extending from approximately –75 dBm
(where dBm refers to a 50W source, that is, a sine amplitude of
about –56 mV) up to +17 dBm (a sine amplitude of –2.2 V).
A simple input-matching network can lower this range to –88dBm
to +3 dBm. The logarithmic linearity is typically within –0.3dB
up to 100 MHz over the central portion of this range, and is
degraded only slightly at 500 MHz. There is no minimum
frequency limit; the AD8307 may be used at audio frequencies
(20 Hz) or even lower.
The output is a voltage scaled 25 mV/dB, generated by a current
of nominally 2 mA/dB through an internal 12.5 kW resistor. This
voltage varies from 0.25 V at an input of –74 dBm (that is, the
ac intercept is at –84 dBm, a 20 mV rms sine input), up to 2.5 V
for an input of +16 dBm. This slope and intercept can be trimmed
using external adjustments. Using a 2.7V supply, the output
scaling may be lowered, for example to 15 mV/dB, to permit
utilization of the full dynamic range.
The AD8307 exhibits excellent supply insensitivity and tem-
perature stability of the scaling parameters. The unique combi-
nation of low cost, small size, low power consumption, high
accuracy and stability, very high dynamic range, and a frequency
range encompassing audio through IF to UHF, make this prod-
uct useful in numerous applications requiring the reduction of a
signal to its decibel equivalent.
The AD8307 is available in the industrial temperature range of
–40°C to +85°C, and in 8-lead SOIC and PDIP packages.
AD8307–SPECIFICATIONS(VS = +5 V, TA = 258C, RL ‡ 1MV, unless otherwise noted)NOTESThis may be adjusted downward by adding a shunt resistor from the Output to Ground. A 50 kW resistor will reduce the nominal slope to 20 mV/dB.This may be adjusted in either direction by a voltage applied to Pin 5, with a scale factor of 8 dB/V.See Application on 900 MHz operation.Normally nulled automatically by internal offset correction loop. May be manually nulled by a voltage applied between Pin 3 and Ground; see APPLICATIONS.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.5 V
Input Voltage (Pins 1, 8) . . . . . . . . . . . . . . . . . . . . . . VSUPPLY
Storage Temperature Range, N, R . . . . . . . . –65°C to +125°C
Ambient Temperature Range, Rated Performance Industrial,
AD8307AN, AD8307AR . . . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . +300°C
PIN CONFIGURATION
INP
VPS
ENB
INT
COM
OFS
OUT
INM
PIN FUNCTION DESCRIPTIONS*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may effect device reliability.
ORDERING GUIDE
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8307 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
VENB – Volts1.0
SUPPLY CURRENT – mA
1.81.92.0Figure 1.Supply Current vs. VENB Voltage (5 V)
VENB – Volts
SUPPLY CURRENT – mA
1.81.92.0Figure 2.Supply Current vs. VENB Voltage (3 V)
INPUT LEVEL – dBm
ERROR – dB
–40–200Figure 3.Log Conformance vs. Input Level (dBm) @
100MHz, 300MHz
INPUT LEVEL – dBm
ERROR – dB
–40–200Figure 4.Log Conformance vs. Input Level (dBm) at 25°C,
85°C, –40°C
INPUT LEVEL – dBm
OUT
– Volts
–40–200Figure 5.VOUT vs. Input Level (dBm) at Various Frequencies
INPUT LEVEL – dBm
– 1.5– 8020– 60
ERROR – dB
– 40– 200
–1.0Figure 6.Log Conformance vs. CFO Values at 1kHz Input
Frequency
AD8307–Typical Performance Characteristics
INPUT LEVEL – dBm
OUT
– VoltsFigure 7.VOUT vs. Input Level at 5V Supply; Showing
Intercept Adjustment
INPUT LEVEL – dBm
OUT
– Volts Figure 8.VOUT vs. Input Level at 3V Supply Using AD820
as Buffer, Gain = +2; Showing Intercept Adjustment
OUT
– Volts
INPUT LEVEL – dBm Figure 9.VOUT vs. Input Level at Three Temperatures
(–40°C, +25°C, +85°C)
Figure 10.Log Conformance vs. Input Level at 100MHz;
Showing Response to Alternative Inputs
INPUT LEVEL – dBm–9010–70
ERROR – dB
–50–30–10Figure 11.Log Conformance vs. Input at 100MHz, 500MHz;
Input Driven Differentially Using Transformer
Figure 12.Log Conformance vs. Input Level at 3V Supply
Using AD820 as Buffer, Gain = +2
AD8307
VENB
CH 2
VOUT
CH 1
GNDFigure 13.Power-Up Response Time
VENB
CH 2
VOUT
CH 1
GNDFigure 14.Power-Down Response Time
VPS = +5.0V
RF OUT
TEK P6139A
10x PROBE
NC = NO CONNECTFigure 15.Test Setup For Power-Up/Power-Down
Response Time
VOUT
CH 1
CH 1 GND
INPUT SIGNAL
CH 2CH 2 GNDFigure 16.VOUT Rise Time
VOUT
CH 1
CH 1 GND
INPUT SIGNAL
CH 2CH 2 GND
2.5VFigure 17.Large Signal Response Time
1nF
RF OUTTEK P6204
FET PROBE
NC = NO CONNECTFigure 18.Test Setup For VOUT Pulse Response
LOG AMP THEORYLogarithmic amplifiers perform a more complex operation than
that of classical linear amplifiers, and their circuitry is signifi-
cantly different. A good grasp of what log amps do, and how
they do it, will avoid many pitfalls in their application. The
essential purpose of a log amp is not to amplify, though amplifi-
cation is utilized to achieve the function. Rather, it is to com-
press a signal of wide dynamic range to its decibel equivalent. It
is thus a measurement device. A better term might be logarith-
mic converter, since its basic function is the conversion of a
signal from one domain of representation to another, via a precise
nonlinear transformation.
Logarithmic compression leads to situations that may be con-
fusing or paradoxical. For example, a voltage offset added to
the output of a log amp is equivalent to a gain increase ahead of
its input. In the usual case where all the variables are voltages,
and regardless of the particular structure, the relationship between
the variables can be expressed as:
VOUT = VY log (VIN /VX)(1)
where:
VOUT is the output voltage, is called the slope voltage; the logarithm is usually taken
to base-ten (in which case VY is also the volts-per-decade),
VIN is the input voltage,
and is called the intercept voltage.
All log amps implicitly require two references, here VX and VY,
which determine the scaling of the circuit. The absolute accu-
racy of a log amp cannot be any better than the accuracy of its
scaling references. Equation 1 is mathematically incomplete in
representing the behavior of a demodulating log amp such as
the AD8307, where VIN has an alternating sign. However, the
basic principles are unaffected, and we can safely use this as our
starting point in the analyses of log amp scaling which follow.
VOUT = 0 Figure 19.Ideal Log Amp Function
Figure 19 shows the input/output relationship of an ideal log
amp, conforming to Equation 1. The horizontal scale is loga-
rithmic and spans a wide dynamic range, shown here as over
continue indefinitely in both directions. The dotted line shows
that the effect of adding an offset voltage VSHIFT to the output is
to lower the effective intercept voltage VX. Exactly the same
alteration could be achieved raising the gain (or signal level)
ahead of the log amp by the factor VSHIFT/VY. For example, if
VY is 500 mV per decade (that is, 25 mV/dB, as for the AD8307),
an offset of +150 mV added to the output will appear to lower
the intercept by two tenths of a decade, or 6 dB. Adding an
offset to the output is thus indistinguishable from applying an
input level that is 6 dB higher.
The log amp function described by Equation 1 differs from that
of a linear amplifier in that the incremental gain ¶VOUT/¶VIN is a
very strong function of the instantaneous value of VIN, as is
apparent by calculating the derivative. For the case where the
logarithmic base is e, we have:(2)
That is, the incremental gain is inversely proportional to the
instantaneous value of the input voltage. This remains true for
any logarithmic base, which is chosen as 10 for all decibel-
related purposes. It follows that a perfect log amp would be
required to have infinite gain under classical small-signal (zero-
amplitude) conditions. Less ideally, this result indicates that,
whatever means are used to implement a log amp, accurate
response under small-signal conditions (that is, at the lower end
of the dynamic range) demands the provision of a very high
gain-bandwidth product. A further consequence of this high
gain is that, in the absence of an input signal, even very small
amounts of thermal noise at the input of a log amp will cause a
finite output for zero input, resulting in the response line curving
away from the ideal shown in Figure 19 toward a finite baseline,
which can be either above or below the intercept. Note that the
value given for this intercept may be an extrapolated value, in
which case the output may not cross zero, or even reach it, as is
the case for the AD8307.
While Equation 1 is fundamentally correct, a simpler formula is
appropriate for specifying the calibration attributes of a log amp
like the AD8307, which demodulates a sine wave input:
VOUT = VSLOPE (PIN – P0)(3)
where:
VOUT is the demodulated and filtered baseband (video or
RSSI) output,
VSLOPE is the logarithmic slope, now expressed in volts/dB
(typically between 15 and 30 mV/dB),
PIN is the input power, expressed in decibels relative to some
reference power level,
and
P0 is the logarithmic intercept, expressed in decibels relative
to the same reference level.
The most widely used reference in RF systems is decibels abovemW in 50W, written dBm. Note that the quantity (PIN – P0) is
just dB. The logarithmic function disappears from the formula
because the conversion has already been implicitly performed in
AD8307voltage. The use of dBV (decibels with respect to 1V rms) would
be more precise, though still incomplete, since waveform is
involved, too. Since most users think about and specify RF
signals in terms of power—even more specifically, in dBm re 50W
—we will use this convention in specifying the performance of
the AD8307.
Progressive CompressionMost high speed high dynamic range log amps use a cascade of
nonlinear amplifier cells (Figure 20) to generate the logarithmic
function from a series of contiguous segments, a type of piece-
wise-linear technique. This basic topology immediately opens
up the possibility of enormous gain-bandwidth products. For
example, the AD8307 employs six cells in its main signal path,
each having a small-signal gain of 14.3 dB (·5.2) and a –3 dB
bandwidth of about 900 MHz; the overall gain is about 20,000
(86 dB) and the overall bandwidth of the chain is some 500MHz,
resulting in the incredible gain-bandwidth product (GBW) of
10,000GHz, about a million times that of a typical op amp.
This very high GBW is an essential prerequisite to accurate
operation under small-signal conditions and at high frequencies.
Equation 2 reminds us, however, that the incremental gain will
decrease rapidly as VIN increases. The AD8307 continues to
exhibit an essentially logarithmic response down to inputs as
small as 50mV at 500 MHz.
Figure 20.Cascade of Nonlinear Gain Cells
To develop the theory, we will first consider a slightly different
scheme to that employed in the AD8307, but which is simpler
to explain and mathematically more straightforward to analyze.
This approach is based on a nonlinear amplifier unit, which we
may call an A/1 cell, having the transfer characteristic shown in
Figure 21. The local small-signal gain ¶VOUT/¶VIN is A, main-
tained for all inputs up to the knee voltage EK, above which the
incremental gain drops to unity. The function is symmetrical: the
same drop in gain occurs for instantaneous values of VIN less
than –EK. The large-signal gain has a value of A for inputs in the
range –EK £ VIN £ +EK, but falls asymptotically toward unity for
very large inputs. In logarithmic amplifiers based on this ampli-
fier function, both the slope voltage and the intercept voltage
must be traceable to the one reference voltage, EK. Therefore, in
this fundamental analysis, the calibration accuracy of the log amp
is dependent solely on this voltage. In practice, it is possible to
separate the basic references used to determine VY and VX and
in the case of the AD8307, VY is traceable to an on-chip band-
gap reference, while VX is derived from the thermal voltage kT/q
and later temperature-corrected.
Let the input of an N-cell cascade be VIN, and the final output
VOUT. For small signals, the overall gain is simply AN. A six-
stage system in which A = 5 (14 dB) has an overall gain of
15,625 (84 dB). The importance of a very high small-signal gain
in implementing the logarithmic function has been noted; how-
ever, this parameter is of only incidental interest in the design of
log amps.
From here onward, rather than considering gain, we will analyze
the overall nonlinear behavior of the cascade in response to a
simple dc input, corresponding to the VIN of Equation 1. For
very small inputs, the output from the first cell is V1 = AVIN;
from the second, V2 = A2 VIN, and so on, up to VN = AN VIN. At
a certain value of VIN, the input to the Nth cell, VN–1, is exactly
equal to the knee voltage EK. Thus, VOUT = AEK and since there
are N–1 cells of gain A ahead of this node, we can calculate that
VIN = EK /AN–1. This unique situation corresponds to the lin-log
transition, labeled 1 on Figure 22. Below this input, the cascade
of gain cells is acting as a simple linear amplifier, while for higher
values of VIN, it enters into a series of segments which lie on a
logarithmic approximation (dotted line).
VOUT
EK/AN–1EK/AN–2EK/AN–3EK/AN–4
(4A-3) EK
(3A-2) EK
(2A-1) EK
AEKFigure 22.The First Three Transitions
Continuing this analysis, we find that the next transition occurs
when the input to the (N–1) stage just reaches EK; that is, when
VIN = EK /AN–2. The output of this stage is then exactly AEK,
and it is easily demonstrated (from the function shown in Figure
21) that the output of the final stage is (2A–1) EK (labeled ` on
Figure 22). Thus, the output has changed by an amount (A–1)EK
for a change in VIN from EK /AN–1 to EK /AN–2, that is, a ratio
change of A. At the next critical point, labeled ´, we find the
input is again A times larger and VOUT has increased to (3A–2)EK,
that is, by another linear increment of (A–1)EK. Further analysis
shows that right up to the point where the input to the first cell
is above the knee voltage, VOUT changes by (A–1)EK for a ratio
change of A in VIN. This can be expressed as a certain fraction
of a decade, which is simply log10(A). For example, when A = 5
a transition in the piecewise linear output function occurs at
regular intervals of 0.7 decade (that is, log10(A), or 14 dB divided
by 20 dB). This insight allows us to immediately write the Volts
per Decade scaling parameter, which is also the Scaling Voltage
VY, when using base-10 logarithms, as:
Note that only two design parameters are involved in determin-
ing VY, namely, the cell gain A and the knee voltage EK, while
N, the number of stages, is unimportant in setting the slope of
the overall function. For A = 5 and EK = 100 mV, the slope
would be a rather awkward 572.3 mV per decade (28.6 mV/dB).
A well designed log amp will have rational scaling parameters.
The intercept voltage can be determined by using two pairs of
transition points on the output function (consider Figure 22).
The result is:(5)
For the case under consideration, using N = 6, we calculate
VZ = 4.28 mV. However, we need to be careful about the inter-
pretation of this parameter, since it was earlier defined as the
input voltage at which the output passes through zero (see Fig-
ure 19). But clearly, in the absence of noise and offsets, the
output of the amplifier chain shown in Figure 21 can be zero
when, and only when, VIN = 0. This anomaly is due to the finite
gain of the cascaded amplifier, which results in a failure to maintain
the logarithmic approximation below the lin-log transition (point �
in Figure 22). Closer analysis shows that the voltage given by
Equation 5 represents the extrapolated, rather than actual,
intercept.
Demodulating Log AmpsLog amps based on a cascade of A/1 cells are useful in baseband
applications, because they do not demodulate their input signal.
However, baseband and demodulating log amps alike can be
made using a different type of amplifier stage, which we will call
an A/0 cell. Its function differs from that of the A/1 cell in that
the gain above the knee voltage EK falls to zero, as shown by the
solid line in Figure 23. This is also known as the limiter func-
tion, and a chain of N such cells is often used to generate a
hard-limited output, in recovering the signal in FM and PM
modes.
Figure 23.A/0 Amplifier Functions (Ideal and Tanh)
The AD640, AD606, AD608, AD8307 and various other Analog
Devices communications products incorporating a logarithmic
IF amplifier all use this technique. It will be apparent that the
output of the last stage can no longer provide the logarithmic
output, since this remains unchanged for all inputs above the
limiting threshold, which occurs at VIN = EK /AN–1. Instead, the
logarithmic output is now generated by summing the outputs of
all the stages. The full analysis for this type of log amp is only
slightly more complicated than that of the previous case. It is(6)
Preference for the A/0 style of log amp, over one using A/1 cells,
stems from several considerations. The first is that an A/0 cell
can be very simple. In the AD8307 it is based on a bipolar-
transistor differential pair, having resistive loads RL and an
emitter current source, IE. This will exhibit an equivalent knee-
voltage of EK = 2kT/q and a small signal gain of A = IERL /EK.
The large signal transfer function is the hyperbolic tangent (see
dotted line in Figure 23). This function is very precise, and the
deviation from an ideal A/0 form is not detrimental. In fact, the
rounded shoulders of the tanh function beneficially result in a
lower ripple in the logarithmic conformance than that obtained
using an ideal A/0 function.
An amplifier built of these cells is entirely differential in struc-
ture and can thus be rendered very insensitive to disturbances
on the supply lines and, with careful design, to temperature
variations. The output of each gain cell has an associated
transconductance (gm) cell, which converts the differential out-
put voltage of the cell to a pair of differential currents, which are
summed simply by connecting the outputs of all the gm (detec-
tor) stages in parallel. The total current is then converted back
to a voltage by a transresistance stage, to generate the logarith-
mic output. This scheme is depicted, in single-sided form, in
Figure 24.
Figure 24.Log Amp Using A/0 Stages and Auxiliary Sum-
ming Cells
The chief advantage of this approach is that the slope voltage
may now be decoupled from the knee-voltage EK = 2kT/q,
which is inherently PTAT. By contrast, the simple summation
of the cell outputs would result in a very high temperature coef-
ficient of the slope voltage given by Equation 6. To do this, the
detector stages are biased with currents (not shown in the Fig-
ure) which are rendered stable with temperature. These are
derived either from the supply voltage (as in the AD606 and
AD608) or from an internal bandgap reference (as in the AD640
and AD8307). This topology affords complete control over the
magnitude and temperature behavior of the logarithmic slope,
decoupling it completely from EK.
A further step is yet needed to achieve the demodulation response,
required when the log amp is to convert an alternating input
into a quasi-dc baseband output. This is achieved by altering the
gm cells used for summation purposes to also implement the
rectification function. Early discrete log amps based on the
progressive compression technique used half-wave rectifiers.
This made post-detection filtering difficult. The AD640 was the
first commercial monolithic log amp to use a full-wave rectifier,
AD8307We can model these detectors as being essentially linear gm cells,
but producing an output current independent of the sign of the
voltage applied to the input of each cell. That is, they imple-
ment the absolute-value function. Since the output from the
later A/0 stages closely approximates an amplitude-symmetric
square wave for even moderate input levels (most stages of the
amplifier chain operate in a limiting mode), the current output
from each detector is almost constant over each period of the
input. Somewhat earlier detectors stages produce a waveform
having only very brief dropouts, while the detectors nearest the
input produce a low level almost-sinusoidal waveform at twice
the input frequency. These aspects of the detector system result
in a signal that is easily filtered, resulting in low residual ripple
on the output.
Intercept CalibrationAll monolithic log amps from Analog Devices include accurate
means to position the intercept voltage VX (or equivalent power
for a demodulating log amp). Using the scheme shown in Figure
24, the basic value of the intercept level departs considerably
from that predicted by the simpler analyses given earlier. How-
ever, the intrinsic intercept voltage is still proportional to EK,
which is PTAT (Equation 5). Recalling that the addition of an
offset to the output produces an effect which is indistinguishable
from a change in the position of the intercept, we can cancel the
left-right motion of VX resulting from the temperature variation of
EK by adding an offset having the required temperature behavior.
The precise temperature-shaping of the intercept-positioning
offset results in a log amp having stable scaling parameters,
making it a true measurement device, for example, as a cali-
brated Received Signal Strength Indicator (RSSI). In this appli-
cation, one is more interested in the value of the output for an
input waveform which is invariably sinusoidal. The input level
may alternatively be stated as an equivalent power, in dBm, but
here we must step carefully. It is essential to know the load
impedance in which this power is presumed to be measured.
In RF practice, it is generally safe to assume a reference imped-
ance of 50W, in which 0 dBm (1 mW) corresponds to a sinusoi-
dal amplitude of 316.2 mV (223.6 mV rms). The intercept may
likewise be specified in dBm. For the AD8307, it is positioned
at –84 dBm, corresponding to a sine amplitude of 20 mV. It is
important to bear in mind that log amps do not respond to
power, but to the voltage applied to their input.
The AD8307 presents a nominal input impedance much higher
than 50 W (typically 1.1 kW at low frequencies). A simple input
matching network can considerably improve the sensitivity of
this type of log amp. This will increase the voltage applied to the
input and thus alter the intercept. For a 50 W match, the voltage
gain is 4.8 and the whole dynamic range moves down by 13.6dB
(see Figure 33). Note that the effective intercept is a function of
waveform. For example, a square-wave input will read 6 dB
higher than a sine wave of the same amplitude, and a Gaussian
noise input 0.5dB higher than a sine wave of the same rms
value.
Offset ControlIn a monolithic log amp, direct-coupling between the stages is
used for several reasons. First, this avoids the use of coupling
capacitors, which may typically have a chip area equal to that of
a basic gain cell, thus considerably increasing die size. Second,
the capacitor values predetermine the lowest frequency at which
the log amp can operate; for moderate values, this may be as
high as 30 MHz, limiting the application range. Third, the para-
sitic (back-plate) capacitance lowers the bandwidth of the cell,
further limiting the applications.
But the very high dc gain of a direct-coupled amplifier raises a
practical issue. An offset voltage in the early stages of the chain
is indistinguishable from a ‘real’ signal. If it were as high as, say,
400 mV, it would be 18 dB larger than the smallest ac signal
(50mV), potentially reducing the dynamic range by this amount.
This problem is averted by using a global feedback path from
the last stage to the first, which corrects this offset in a similar
fashion to the dc negative feedback applied around an op amp.
The high frequency components of the signal must, of course,
be removed, to prevent a reduction of the HF gain in the for-
ward path.
In the AD8307, this is achieved by an on-chip filter, providing
sufficient suppression of HF feedback to allow operation aboveMHz. To extend the range below this frequency, an external
capacitor may be added. This permits the high pass corner to be
lowered to audio frequencies using a capacitor of modest value.
Note that this capacitor has no effect on the minimum signal
frequency for input levels above the offset voltage: this extends
down to dc (for a signal applied directly to the input pins). The
offset voltage will vary from part to part; some will exhibit essen-
tially stable offsets of under 100 mV, without the benefit of an
offset adjustment.
Extension of RangeThe theoretical dynamic range for the basic log amp shown in
Figure 24 is AN. For A = 5.2 (14.3 dB) and N = 6, it is 20,000
or 86 dB. The actual lower end of the dynamic range is largely
determined by the thermal noise floor, measured at the input of
the chain of amplifiers. The upper end of the range is extended
upward by the addition of top-end detectors. The input signal is
applied to a tapped attenuator, and progressively smaller signals
are applied to three passive rectifying gm cells whose outputs are
summed with those of the main detectors. With care in design,
the extension to the dynamic range can be seamless over the full
frequency range. For the AD8307 it amounts to a further 27dB.
The total dynamic range is thus theoretically 113 dB. The speci-
fied range of 90 dB (–74 dBm to +16 dBm) is that for high
accuracy, calibrated operation, and includes the low end degra-
dation due to thermal noise, and the top end reduction due to
voltage limitations. The additional stages are not, however,
redundant, but are needed to maintain accurate logarithmic
conformance over the central region of the dynamic range, and
in extending the usable range considerably beyond the specified
range. In applications where log-conformance is less demand-
ing, the AD8307 can provide over 95 dB of range.
