AD8184AN-AD8184AR Fast Delivery |IC PHOENIX CO.,LIMITED

AD8184AN ,700 MHz, 5 mA 4-to-1 Video MultiplexerCHARACTERISTICS1Channel Switching Time Channel-to-Channel50% Logic to 10% Output Settling IN0 = +1 ..
AD8184AR ,700 MHz, 5 mA 4-to-1 Video MultiplexerCHARACTERISTICS9Output Voltage Swing V = ±4 V, R = 2 kΩ ±3.15 ±3.2 VIN LShort Circuit Current 30 mA ..
AD8184ARZ-REEL7 , 700 MHz, 5 mA 4-to-1 Video Multiplexer
AD8184ARZ-REEL7 , 700 MHz, 5 mA 4-to-1 Video Multiplexer
AD8185ARU ,380 MHz, 25 mA, Triple 2:1 MultiplexersSPECIFICATIONS (T = 258C, V = 65 V, R = 1 kV unless otherwise noted)A S LParameter Condition Min Ty ..
AD8185ARUZ , 380 MHz, 25 mA, Triple 2:1 Multiplexers
ADP1710AUJZ-0.9-R7 , 150 mA, Low Dropout, CMOS Linear Regulator
ADP1710AUJZ-1.0-R7 , 150 mA, Low Dropout, CMOS Linear Regulator
ADP1710AUJZ-1.2-R7 , 150 mA, Low Dropout, CMOS Linear Regulator
ADP1710AUJZ-1.5-R7 , 150 mA, Low Dropout, CMOS Linear Regulator
ADP1710AUJZ-1.8-R7 , 150 mA, Low Dropout, CMOS Linear Regulator
ADP1710AUJZ-2.5-R7 , 150 mA, Low Dropout, CMOS Linear Regulator

AD8184AN-AD8184AR
700 MHz, 5 mA 4-to-1 Video Multiplexer
REV.0700 MHz, 5 mA
4-to-1 Video Multiplexer
PRODUCT DESCRIPTION
The AD8184 is a high speed 4-to-1 multiplexer. It offers –3 dB
signal bandwidth of 700 MHz along with a slew rate of 750 V/μs.
With 95 dB of crosstalk and 115 dB isolation, it is useful in
many high speed applications. The differential gain and differ-
ential phase error of 0.01% and 0.01°, along with 0.1 dB flatness
of 75 MHz, make AD8184 ideal for professional video multi-
plexing. It offers 10 ns switching time, making it an excellent
choice for pixel switching (picture-in-picture) while consuming
less than 4.5 mA on ±5 V supply voltage.
The AD8184 offers a high speed disable feature allowing the
output to be put into a high impedance state. This allows mul-
tiple outputs to be connected together for cascading stages while
the “OFF” channels do not load the output bus. It operates on
voltage supplies of ±5 V and is offered in 14-lead PDIP and
SOIC packages.
*All trademarks are the property of their respective holders.
Table I.Truth Table
FEATURES
Single and Dual 2-to-1 Also Available (AD8180 and AD8182)
Fully Buffered Inputs and Outputs
Fast Channel Switching:10 ns
High Speed
> 700 MHz Bandwidth (–3 dB)
> 750 V/ms Slew Rate
Fast Settling Time of 15 ns to 0.1%
Excellent Video Specifications (RL > 2 kV)
Gain Flatness of 0.1 dB of 75 MHz
0.01% Differential Gain Error, RL = 10 kV
0.018 Differential Phase Error, RL = 10 kV
Low Power:4.4 mA
Low Glitch: < 25 mV
Low All-Hostile Crosstalk of –95 dB @ 5 MHz
High “OFF” Isolation of –115 dB @ 5 MHz
Low Cost
Fast Output Disable Feature for Connecting Multiple Devices
APPLICATIONS
Pin Compatible with HA4314* and GX4314*
Video Switchers and Routers
Pixel Switching for “Picture-In-Picture”
Switching in LCD and Plasma Displays
FUNCTIONAL BLOCK DIAGRAM
ENABLE
OUT
+VS
–VS
NC = NO CONNECT
IN0
GND
IN1
IN2
GND
IN3
GND
FREQUENCY – Hz
NORMALIZED OUTPUT – dB
10M100M1G
Figure 1.Small Signal Frequency Response
AD8184–SPECIFICATIONS
(@ TA = +258C, VS = 65 V, RL = 2 kV unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12.6 V
Internal Power Dissipation2
AD8184 14-Lead Plastic (N) . . . . . . . . . . . . . . . .1.6 Watts
AD8184 14-Lead Small Outline (R) . . . . . . . . . .1.0 Watts
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±VS
Output Short Circuit Duration . .Observe Power Derating Curves
Storage Temperature Range
N & R Package . . . . . . . . . . . . . . . . . . . . .–65°C to +125°C
Lead Temperature Range (Soldering 10 sec) . . . . . . .+300°C
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.Specification is for device in free air: 14-pin plastic package: θJA = 75°C/Watt
14-pin SOIC package: θJA = 120°C/Watt, where PD = (TJ–TA)/θJA.
ORDERING GUIDE
AD8184AR-REEL
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the AD8184
is limited by the associated rise in junction temperature. The maxi-
mum safe junction temperature for plastic encapsulated devices is
determined by the glass transition temperature of the plastic,
approximately +150°C. Exceeding this limit temporarily may
cause a shift in parametric performance due to a change in the
stresses exerted on the die by the package. Exceeding a junction
temperature of +175°C for an extended period can result in
device failure.
NOTESENABLE pin is grounded. IN0 and IN2 = +1 V dc, IN1 and IN3 = –1 V dc. A0 is driven with a 0 V to +5 V pulse, A1 is grounded. Measure transition time from 50% of the A0
input value (+2.5 V) and 10% (or 90%) of the total output voltage transition from IN0 channel voltage (+1 V) to IN1 (–1 V), or vice versa. All inputs are measured in a similar
manner using A0 and A1 to select the channels.ENABLE pin is driven with 0 V to +5 V pulse (with 3 ns edges). The state of the A0 and A1 pins determines which input is activated (refer to Table I). Set IN0 and IN2 = +1 V dc,
IN1 and IN3 = –1 V dc, and measure transition time from 50% of ENABLE pulse (+2.5 V) to 90% of the total output voltage change. In Figure 4, ΔtOFF is the disable time, ΔtON
is the enable time.All inputs are grounded. A0 input is driven with 0 V to +5 V pulse, A1 is grounded. The output is monitored. Speeding the edges of the A0 pulse increases the glitch magnitude
due to coupling via the ground plane. Removing the A0 and A1 terminations will lower the glitch, as does increasing RL.Decreasing RL slightly lowers the bandwidth. Increasing CL significantly lowers the bandwidth (see Figure 18).A resistor (RS) placed in series with the multiplexer inputs serves to optimize 0.1 dB flatness, but is not required (see Figure 19.)Select an input that is not being driven (i.e., A0 and A1 are logic 0, IN0 is selected); drive all other inputs with VIN = 0.707 V rms and monitor the output at ƒ = 5 and 30 MHz.
RL = 2 kΩ (see Figure 12).Multiplexer is disabled (i.e., ENABLE = logic 1) and all inputs are driven simultaneously with VIN = 0.446 V rms. Output is monitored at ƒ = 5 and 30 MHz. RL = 30 Ω to simu-
late RON of one enabled multiplexer within a system (see Figure 13). In this mode the output impedance is very high (typ 10 MΩ), and the signal couples across the package; the
load impedance determines the crosstalk.Voltage gain decreases for lower values of RL. The resistive divider formed by the multiplexers enables output resistance (28 Ω) and RL causes a gain that increases as RL-
decreases (i.e., the voltage gain is approximately 0.97 V/V [3% gain error] for RL = 1 kΩ).Larger values of RL provide wider output voltage swings, as well as better gain accuracy. See Note 8.
Specifications subject to change without notice.
AD8184
While the AD8184 is internally short circuit protected, this may
not be sufficient to guarantee that the maximum junction tempera-
ture (+150°C) is not exceeded under all conditions. To ensure
proper operation, it is necessary to observe the maximum power
derating curves shown in Figure 2.
AMBIENT TEMPERATURE – °C
MAXIMUM POWER DISSIPATION – Watts
1.0
Figure 2.Maximum Power Dissipation vs. Temperature
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8184 feature proprietary ESD protection circuitry, permanent damage may
AD8184–Typical Performance Curves
FREQUENCY – Hz
NORMALIZED OUTPUT – dB
10M100M1G
Figure 6.Small Signal Frequency Response
NORMALIZED FLATNESS – dB10M100M1G
FREQUENCY – Hz
–0.5
Figure 7.Gain Flatness vs. Frequency
–2410M100M1G
FREQUENCY – Hz
OUTPUT – dBV
Figure 8.Large Signal Frequency Response
DUT OUT
500mV/DIV
5ns/DIV
–1V
Figure 3Channel Switching Characteristics
DUT OUT
800mV/DIV
–1V
10ns/DIV
+1V
–1V
+1V
Figure 4.Enable and Disable Switching Characteristics
25mV/DIV
25ns/DIV
Figure 5.Channel Switching Transient (Glitch)
50mV/DIV
5ns/DIV
Figure 9.Small Signal Transient Response
2V/DIV
10ns/DIV
Figure 10.Large Signal Transient Response
DIFFERENTIAL GAIN – %
DIFFERENTIAL PHASE – Deg
Figure 11.Differential Gain and Phase Error
FREQUENCY – Hz
100k1G1M10M100M
CROSSTALK – dB
Figure 12.All-Hostile Crosstalk vs. Frequency
OFF ISOLATION – dB
FREQUENCY – Hz100k1M10M100M
–120
Figure 13.“OFF” Isolation vs. Frequency
FREQUENCY – Hz
100101M1001k10k100k10M
VOLTAGE NOISE – nV/ Hz
30M
Figure 14.Voltage Noise vs. Frequency
AD8184–Typical Performance Curves
FREQUENCY – Hz
100k1M10M100M
HARMONIC DISTORTION – dBc–80
–100
Figure 15.Harmonic Distortion vs. Frequency
FREQUENCY – Hz
100M1001G1k
INPUT AND DISABLED OUTPUT IMPEDANCE
10k100k1M10M100M
10M
100k
10k
ENABLED OUTPUT IMPEDANCE –
Figure 16.Output & Input Impedance vs. Frequency
FREQUENCY – Hz
0.03M0.01M10M500M
PSSR – dB100M
Figure 17.Power Supply Rejection vs. Frequency
NORMALIZED FLATNESS – dB
FREQUENCY – Hz10M100M1G
NORMALIZED OUTPUT – dB
Figure 18.Frequency Response vs. Capacitive Load
NORMALIZED FLATNESS – dB
10M100M
FREQUENCY – Hz
NORMALIZED OUTPUT – dB
Figure 19.Frequency Response vs. Input Series Resistance
INPUT VOLTAGE – Volts5–4–3–2–101234
OUTPUT VOLTAGE – Volts
Figure 20.Output Voltage vs. Input Voltage, RL = 2 kΩ

Partno	Mfg	Dc	Qty	Available	Descript
AD8184AN	AD	N/a	800	avai	700 MHz, 5 mA 4-to-1 Video Multiplexer
AD8184AR	AD	N/a	42	avai	700 MHz, 5 mA 4-to-1 Video Multiplexer