AD8114AST-AD8115AST Fast Delivery |IC PHOENIX CO.,LIMITED

AD8115AST ,Low Cost 225 MHz 16 X 16 Crosspoint Switchesapplications. The differential gain and differential phase ofThe AD8114/AD8115 is packaged in 100-l ..
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AD8114AST-AD8115AST
Low Cost 225 MHz 16 X 16 Crosspoint Switches
REV.0
Low Cost 225 MHz 3 16 Crosspoint Switches
FUNCTIONAL BLOCK DIAGRAM
CLK
DATA IN
UPDATE
RESET
16 INPUTS
DATA
OUT
OUTPUTS
SER/PARD0D1D2D3D4
FEATURES
16 3 16 High Speed Nonblocking Switch Arrays
AD8114; G = +1
AD8115; G = +2
Serial or Parallel Programming of Switch Array
Serial Data Out Allows “Daisy Chaining” of Multiple
16 3 16s to Create Larger Switch Arrays
High Impedance Output Disable Allows Connection of
Multiple Devices Without Loading the Output Bus
For Smaller Arrays See Our AD8108/AD8109 (8 3 8) or
AD8110/AD8111 (16 3 8) Switch Arrays
Complete Solution
Buffered Inputs
Programmable High Impedance Outputs
16 Output Amplifiers, AD8114 (G = +1), AD8115 (G = +2)
Drives 150 V Loads
Excellent Video Performance
25 MHz, 0.1 dB Gain Flatness
0.05%/0.058 Differential Gain/Differential Phase Error
(RL = 150 V)
Excellent AC Performance
–3 dB Bandwidth: 225 MHz
Slew Rate: 375 V/ms
Low Power of 700 mW (2.75 mW per Point)
Low All Hostile Crosstalk of –70 dB @ 5 MHz
Reset Pin Allows Disabling of All Outputs (Connected
Through a Capacitor to Ground Provides “Power-On”
Reset Capability)
100-Lead LQFP Package (14 mm 3 14 mm)
APPLICATIONS
Routing of High Speed Signals Including:
Video (NTSC, PAL, S, SECAM, YUV, RGB)
Compressed Video (MPEG, Wavelet)
3-Level Digital Video (HDB3)
Datacomms
Telecomms
PRODUCT DESCRIPTION
The AD8114/AD8115 are high speed 16 · 16 video crosspoint
switch matrices. They offer a –3 dB signal bandwidth greater
than 200 MHz and channel switch times of less than 50 ns with
1% settling. With –70 dB of crosstalk and –90 dB isolation (@
5 MHz), the AD8114/AD8115 are useful in many high speed
applications. The differential gain and differential phase of
better than 0.05% and 0.05° respectively, along with 0.1 dB
flatness out to 25 MHz while driving a 75 W back-terminated
load, make the AD8114/AD8115 ideal for all types of signal
switching.
The AD8114 /AD8115 include 16 independent output buffers
that can be placed into a high impedance state for paralleling
crosspoint outputs so that off channels do not load the output
bus. The AD8114 has a gain of +1, while the AD8115 offers
a gain of +2. They operate on voltage supplies of –5 V while
consuming only 70 mA of idle current. The channel switching
is performed via a serial digital control (which can accommo-
date “daisy chaining” of several devices) or via a parallel control
allowing updating of an individual output without reprogram-
ming the entire array.
The AD8114/AD8115 is packaged in 100-lead LQFP package
and is available over the extended industrial temperature range
of –40°C to +85°C.
*Patent Pending.
AD8114/AD8115–SPECIFICATIONS
(VS = 65 V, TA = +258C, RL = 1 kV unless otherwise noted)
TIMING CHARACTERISTICS (Serial)
Table I.Logic Levels
Figure 1.Timing Diagram, Serial Mode
AD8114/AD8115
TIMING CHARACTERISTICS (Parallel)
CLK Pulsewidth
Data Hold Time
CLK Pulse Separation
CLK to UPDATE Delay
UPDATE Pulsewidth
Propagation Delay, UPDATE to Switch On or Off
CLK, UPDATE Rise and Fall Times
Table II.␣Logic Levels
1 = LATCHED
CLK
D0–D4
A0–A2
0 = TRANSPARENT
UPDATE
Figure 2.Timing Diagram, Parallel Mode
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8114/AD8115 features proprietary ESD protection circuitry, permanent dam-
age may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
AD8114/AD8115 is limited by the associated rise in junction
temperature. The maximum safe junction temperature for plas-
tic encapsulated devices is determined by the glass transition
temperature of the plastic, approximately +150°C. Temporarily
exceeding this limit may cause a shift in parametric performance
due to a change in the stresses exerted on the die by the pack-
age. Exceeding a junction temperature of +175°C for an ex-
tended period can result in device failure.
While the AD8114/AD8115 is internally short circuit protected,
this may not be sufficient to guarantee that the maximum junc-
tion temperature (+150°C) is not exceeded under all conditions.
To ensure proper operation, it is necessary to observe the maxi-
mum power derating curves shown in Figure 3.
Figure 3.Maximum Power Dissipation vs. Temperature
ABSOLUTE MAXIMUM RATINGS1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12.0 V
Internal Power Dissipation2
AD8114/AD8115 100-Lead Plastic LQFP (ST) . . . .2.6 W
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–VS
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . .Observe Power Derating Curves
Storage Temperature Range . . . . . . . . . . . .–65°C to +125°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . .+300°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Specification is for device in free air (TA = +25°C):
100-lead plastic LQFP (ST): qJA = 40°C/W.
ORDERING GUIDE
AD8114/AD8115
Table III.Operation Truth Table
CLK
UPDATE
DATA IN
(SERIAL)
(OUTPUT
ENABLE)
SER/PAR
RESET
(OUTPUT ENABLE)
DATA
PARALLEL
DATA
OUTPUT
ADDRESS
PIN FUNCTION DESCRIPTIONSLogic Inpute.Logic Output
AD8114/AD8115
PIN CONFIGURATION
RESETCE
DATA OUTCLKDATA INUPDATESER
/PARNCNCNCNCNCNCA1A2A3
AVCC13/14
OUT13
AVEE12/13
OUT12
AVCC11/12
OUT11
AVEE10/11
OUT10
AVCC09/10
OUT09
AVEE08/09
OUT08
AVCC07/08
OUT07
AVEE06/07
OUT06
AVCC05/06
OUT05
AVEE04/05
DVCC
DGND
AGND
IN07
AGND
IN06
AGND
IN05
AGND
IN04
AGND
IN03
AGND
IN02
AGND
IN01
AGND
IN00
AGND
AVEE
AVCC
AVCC00
OUT00
AVEE00/01
OUT01
DVCC
DGND
AGND
IN08
AGND
IN09
AGND
IN10
AGND
IN11
AGND
IN12
AGND
IN13
AGND
IN14
AGND
IN15
AGND
AVEE
AVCC
AVCC15
OUT15
AVEE14/15
OUT14D1D2D3
OUT04
AVCC03/04
OUT03
AVEE02/03
OUT02
AVCC01/02
NC = NO CONNECT
FREQUENCY – MHz
GAIN – dB101001000
FLATNESS – dB
–0.6
Figure 6.AD8114 Frequency Response; RL = 150 W

FREQUENCY – MHz
GAIN – dB
FLATNESS – dB
0.4
Figure 7.AD8114 Frequency Response; RL = 1 kW
FREQUENCY – MHz
GAIN – dB
0.11101001000
Figure 8.AD8114 Frequency Response vs. Load Impedance

FREQUENCY – MHz
GAIN – dB
FLATNESS – dB
0.5
Figure 9.AD8115 Frequency Response; RL = 150 W

FREQUENCY – MHz
GAIN – dB
FLATNESS – dB
0.53
Figure 10.AD8115 Frequency Response; RL = 1 kW
Figure 11.AD8115 Frequency Response vs. Load Impedance
AD8114/AD8115
FREQUENCY – MHz
CROSSTALK – dB–70
–10
Figure 12.AD8114 Crosstalk vs. Frequency
FUNDAMENTAL FREQUENCY – MHz
DISTORTION – dBc
–10
Figure 13.AD8114 Distortion vs. Frequency51015202530354045
5ns/DIV
0.1%/DIV
Figure 14.AD8114 Settling Time
FREQUENCY – MHz
CROSSTALK – dB–70
–10
Figure 15.AD8115 Crosstalk vs. Frequency
FUNDAMENTAL FREQUENCY – MHz
DISTORTION – dBc
–10
Figure 16.AD8115 Distortion vs. Frequency51015202530354045
5ns/DIV
0.1%/DIV
Figure 17.AD8115 Settling Time
FREQUENCY – MHz
INPUT IMPEDANCE –
100k
10k
1005000.11100
Figure 18.AD8114 Input Impedance vs. Frequency
FREQUENCY – MHz
OUTPUT IMPEDANCE – 101001000
1000
Figure 19.AD8114 Output Impedance, Enabled
vs. Frequency
FREQUENCY – MHz
OUTPUT IMPEDANCE – 101001000
10k
100k
Figure 20.AD8114 Output Impedance, Disabled
vs. Frequency
FREQUENCY – MHz
INPUT IMPEDANCE – 10100500
10k
100k
Figure 21.AD8115 Input Impedance vs. Frequency
FREQUENCY – MHz
OUTPUT IMPEDANCE – 101001000
0.1
Figure 22.AD8115 Output Impedance Enabled
vs. Frequency
FREQUENCY – MHz
OUTPUT IMPEDANCE – 101001000
10k
100k
Figure 23.AD8115 Output Impedance, Disabled
vs. Frequency
AD8114/AD8115
Figure 24.AD8114 Off Isolation, Input-Output
FREQUENCY – MHz
PSRR – dB
–20
Figure 25.AD8114 PSRR vs. Frequency
FREQUENCY – Hz
VOLTAGE NOISE – nV/10k100k1M10M
150
Figure 26.AD8114 Voltage Noise vs. Frequency
FREQUENCY – MHz
OFF ISOLATION – dB–110
–40
Figure 27.AD8115 Off Isolation, Input-Output
FREQUENCY – MHz
PSRR – dB
–20
Figure 28.AD8115 PSRR vs. Frequency
FREQUENCY – Hz
VOLTAGE NOISE – nV/10k100k1M10M
150
Figure 29.AD8115 Voltage Noise vs. Frequency
Figure 30.AD8114 Pulse Response, Small Signal
Figure 31.AD8114 Pulse Response, Large Signal
+5V
–0V
–1V
+1V
Figure 32.AD8114 Switching Time
Figure 33.AD8115 Pulse Response, Small Signal
Figure 34.AD8115 Pulse Response, Large Signal
Figure 35.AD8115 Switching Time

Partno	Mfg	Dc	Qty	Available	Descript
AD8114AST	ADI	N/a	4	avai	Low Cost 225 MHz 16 X 16 Crosspoint Switches
AD8115AST	ADI	N/a	64	avai	Low Cost 225 MHz 16 X 16 Crosspoint Switches
AD8115AST	AD	N/a	500	avai	Low Cost 225 MHz 16 X 16 Crosspoint Switches