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AD8067ART
High Gain Bandwidth Product Precision Fast FET Op Amp
High Gain Bandwidth Product
Precision Fast FET ™ Op Amp
FEATURES FET input amplifier: 0.6 pA input bias current Stable for gains ≥8 High speed 54 MHz, –3 dB bandwidth (G = +10) 640 V/µs slew rate Low noise 6.6 nV/√Hz 0.6 fA/√Hz Low offset voltage (1.0 mV max) Wide supply voltage range: 5 V to 24 V No phase reversal Low input capacitance Single-supply and rail-to-rail output Excellent distortion specs: SFDR 95 dBc @ 1 MHz High common-mode rejection ratio: –106 dB Low power: 6.5 mA typical supply current Low cost Small packaging: SOT-23-5
APPLICATIONS Photodiode preamplifier Precision high gain amplifier High gain, high bandwidth composite amplifier
GENERAL DESCRIPTION The AD8067 Fast FET amp is a voltage feedback amplifier with
FET inputs offering wide bandwidth (54 MHz @ G = +10) and high
slew rate (640 V/µs). The AD8067 is fabricated in a proprietary,
dielectrically isolated eXtra Fast Complementary Bipolar process
(XFCB) that enables high speed, low power, and high performance
FET input amplifiers.
The AD8067 is designed to work in applications that require high
speed and low input bias current, such as fast photodiode
preamplifiers. As required by photodiode applications, the laser
trimmed AD8067 has excellent dc voltage offset (1.0 mV max)
and drift (15 µV/°C max).
CONNECTION DIAGRAM
+VS5–IN+IN
–VS
VOUT
SOT-23-5 (RT-5)Figure 1. Connection Diagram (Top View)
The FET input bias current (5 pA max) and low voltage noise
(6.6 nV/√Hz) also contribute to making it appropriate for precision
applications. With a wide supply voltage range (5 V to 24 V) and
rail-to-rail output, the AD8067 is well suited to a variety of
applications that require wide dynamic range and low distortion.
The AD8067 amplifier consumes only 6.5 mA of supply current,
while capable of delivering 30 mA of load current and driving
capacitive loads of 100 pF. The AD8067 amplifier is available in a
SOT-23-5 package and is rated to operate over the industrial
temperature range, –40°C to +85°C.
FREQUENCY– MHz
GAIN
– dB
G = +20
G = +10
G = +8Figure 2. Small Signal Frequency Response
Rev. 0
TABLE OF CONTENTS AD8067–Specifications for ±5 V...........................................................4
AD8067–Specifications for +5 V...........................................................5
AD8067–Specifications for ±12 V.........................................................6
Absolute Maximum Ratings..................................................................7
Maximum Power Dissipation............................................................7
Typical Performance Characteristics....................................................8
Test Circuits............................................................................................13
Theory of Operation.............................................................................15
Basic Frequency Response...............................................................15
Resistor Selection for Wideband Operation..................................16
Input and Output Overload Behavior............................................17
Input Protection................................................................................18
Capacitive Load Drive......................................................................18
Layout, Grounding, and Bypassing Considerations.....................18
Applications............................................................................................20
Wideband Photodiode Preamp.......................................................20
Using the AD8067 at Gains of Less Than 8...................................21
Single-Supply Operation..................................................................22
High Gain, High Bandwidth Composite Amplifier......................22
Outline Dimensions..............................................................................24
Ordering Guide.................................................................................24
TABLES Table 1. Recommended Values of RG and RF.....................................15
Table 2. RMS Noise Contributions of Photodiode Preamp.............20
Table 3. Ordering Guide........................................................................24
REVISION HISTORY Revision 0: Initial Version
FIGURES Figure 1. Connection Diagram (Top View)..........................................1
Figure 2. Small Signal Frequency Response.........................................1
Figure 3. Maximum Power Dissipation vs. Temperature for
a 4-Layer Board...............................................................................7
Figure 4. Small Signal Frequency Response for Various Gains.........8
Figure 5. Small Signal Frequency Response for Various Supplies.....8
Figure 6. Large Signal Frequency Response for Various Supplies.....8
Figure 7. 0.1 dB Flatness Frequency Response...................................8
Figure 8. Small Signal Frequency Response for Various CLOAD.........8
Figure 9. Frequency Response for Various Output Amplitudes........8
Figure 10. Small Signal Frequency Response for Various RF.............9
Figure 11. Distortion vs. Frequency for Various Loads......................9
Figure 12. Distortion vs. Frequency for Various Amplitudes.............9
Figure 13. Open-Loop Gain and Phase................................................9
Figure 14. Distortion vs. Frequency for Various Supplies..................9
Figure 15. Distortion vs. Output Amplitude for Various Loads........9
Figure 16. Small Signal Transient Response 5 V Supply...................10
Figure 17. Output Overdrive Recovery...............................................10
Figure 18. Long-Term Settling Time...................................................10
Figure 19. Small Signal Transient Response ± 5 V Supply...............10
Figure 20. Large Signal Transient Response.......................................10
Figure 21. 0.1% Short-Term Settling Time........................................10
Figure 22. Input Bias Current vs. Temperature..................................11
Figure 23. Input Offset Voltage Histogram........................................11
Figure 24. Voltage Noise........................................................................11
Figure 25. Input Bias Current vs. Common-Mode Voltage..............11
Figure 26. Input Offset Voltage vs. Common-Mode Voltage...........11
Figure 27. CMRR vs. Frequency..........................................................11
Figure 28. Output Impedance vs. Frequency.....................................12
Figure 29. Output Saturation Voltage vs. Output Load Current......12
Figure 30. PSRR vs. Frequency.............................................................12
Figure 31. Quiescent Current vs. Temperature for Various
Supply Voltages..............................................................................12
Figure 32. Output Saturation Voltage vs. Temperature....................12
Figure 33. Open-Loop Gain vs. Load Current for Various
Supplies..........................................................................................12
Figure 34. Standard Test Circuit..........................................................13
Figure 35. Open-Loop Gain Test Circuit...........................................13
Figure 36. Test Circuit for Capacitive Load.......................................13
Figure 37. CMRR Test Circuit.............................................................14
Figure 38. Positive PSRR Test Circuit.................................................14
Figure 39. Output Impedance Test Circuit........................................14
Figure 40. Noninverting Gain Configuration...................................15
Figure 41. Open-Loop Frequency Response....................................15
Figure 42. Inverting Gain Configuration...........................................15
Figure 43. Input and Board Capacitances..........................................16
Figure 44. Op Amp DC Error Sources..............................................17
Figure 45. Simplified Input Schematic.............................................17
Figure 46 Current Limiting Resistor..................................................18
Figure 47. Guard-Ring Configurations..............................................18
Figure 48. Guard-Ring Layout SOT-23-5..........................................18
Figure 49. Wideband Photodiode Preamp.........................................20
Figure 50. Photodiode Voltage Noise Contributions.......................20
Figure 51. Photodiode Preamplifier...................................................21
Figure 52. Photodiode Preamplifier Frequency Response..............21
Figure 53. Photodiode Preamplifier Pulse Response.......................21
Figure 54. Gain of Less than 2 Schematic..........................................21
Figure 55. Gain of 2 Pulse Response..................................................22
Figure 56. Single-Supply Operation Schematic................................22
Figure 57. AD8067/AD8009 Composite ...........................................23
Figure 58. Gain Bandwidth Response................................................23
Figure 59. Large Signal Response........................................................23
Figure 60. Small Signal Response........................................................23
Figure 61. 5-Lead Plastic Surface Mount Package ...........................24
AD8067–SPECIFICATIONS FOR ±5 V
VS = ±5 V (@ TA = +25°C, G = +10, RF = RL =1 kΩ, Unless Otherwise Noted.) AD8067–SPECIFICATIONS FOR +5 V
VS = +5 V (@ TA = +25°C, G = +10, RL =RF = 1 kΩ, Unless Otherwise Noted.) AD8067–SPECIFICATIONS FOR ±12 V
VS = ±12 V (@ TA = +25°C, G = +10, RL = RF = 1 kΩ, Unless Otherwise Noted.) ABSOLUTE MAXIMUM RATINGS Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those
indicated in the operational section of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
Maximum Power Dissipation The associated raise in junction temperature (TJ) on the die limits
the maximum safe power dissipation in the AD8067 package. At
approximately 150°C, which is the glass transition temperature, the
plastic will change its properties. Even temporarily exceeding this
temperature limit may change the stresses that the package exerts
on the die, permanently shifting the parametric performance of the
AD8067. Exceeding a junction temperature of 175°C for an
extended period of time can result in changes in the silicon devices,
potentially causing failure.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive. The quiescent power is the voltage
between the supply pins (VS) times the quiescent current (IS).
Assuming the load (RL) is referenced to midsupply, the total drive
power is VS/2 × IOUT, some of which is dissipated in the package
and some in the load (VOUT × IOUT). The difference between the
total drive power and the load power is the drive power dissipated
in the package. RMS output voltages should be considered. PowerLoad–PowerDriveTotalPowerQuiescentPD+=
OUT
OUTSSSDR–RVIVP×+×=
If RL is referenced to VS– as in single-supply operation, then the
total drive power is VS × IOUT.
If the RMS signal levels are indeterminate, then consider the worst
case, when VOUT = VS/4 for RL to midsupply: ()SSDRVIVP4+×=
In single-supply operation with RL referenced to VS–, worst case is
VOUT = VS/2.
Airflow will increase heat dissipation effectively, reducing θJA. In
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes will
reduce the θJA.
Figure 3 shows the maximum safe power dissipation in the pack-
age versus ambient temperature for the SOT-23-5 (180°C/W)
package on a JEDEC standard 4-layer board. θJA values are
approximations.
It should be noted that for every 10°C rise in temperature, IB
approximately doubles (See Figure 22).
AMBIENT TEMPERATURE–°C
MAXIMUM POWER DISSAPATION
SOT-23-5Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
TYPICAL PERFORMANCE CHARACTERISTICS
Default Conditions VS = ±5 V (@ TA = +25°C, G = +10, RL = RF = 1 kΩ, Unless Otherwise Noted.)
FREQUENCY– MHz
GAIN
dB10100
G = +20
G = +10
G = +6
G = +8
VOUT = 200mV p-p Figure 4. Small Signal Frequency Response for Various Gains
FREQUENCY– MHz
GAIN
dB10100
VOUT = 200mV p-p
VS =±12V
VS =
VS = +5VFigure 5. Small Signal Frequency Response for Various Supplies
FREQUENCY– MHz
GAIN
dB10100
VOUT = 2V p-p
VS =±12V
VS =
VS = +5V
FREQUENCY– MHz
GAIN
– dB
20.6Figure 7. 0.1 dB Flatness Frequency Response
FREQUENCY– MHz
GAIN
dBFigure 8. Small Signal Frequency Response for Various CLOAD
FREQUENCY– MHz
GAIN
dB10100
VOUT = 0.2V p-p, 2V p-p
VOUT = 4V p-pFREQUENCY– MHz
GAIN
– dB10100
RF = 1kΩ
RF = 499Ω
RF = 2kΩVOUT = 200mV p-pFigure 10. Small Signal Frequency Response for Various RF
FREQUENCY– MHz
DISTORTION
– dBc
VOUT = 2V p-p
HD3 RLOAD = 150ΩFigure 11. Distortion vs. Frequency for Various Loads
FREQUENCY– MHz
DISTORTION
dBc
VS =
G = +10
HD3 VOUT = 20V p-p
HD3 VOUT = 2V p-p
HD2 VOUT = 2V p-p
HD2 VOUT = 20V p-pFigure 12. Distortion vs. Frequency for Various Amplitudes
FREQUENCY– MHz
GAIN
dB
PHASE
Degrees
–1800.010.11101001kFigure 13. Open-Loop Gain and Phase
FREQUENCY– MHz
DISTORTION
– dBc
HD3 VS =±12V
HD2 VS =
HD2 VS =±12VFigure 14. Distortion vs. Frequency for Various Supplies
OUTPUT AMPLITUDE– V p-p
DISTORTION
– dBc
HD2 RLOAD = 150Ω
HD3 RLOAD = 150Ω
HD2 RLOAD = 1kΩ
HD3 RLOAD = 1kΩFigure 15. Distortion vs. Output Amplitude for Various Loads
Figure 16. Small Signal Transient Response 5 V Supply
Figure 17. Output Overdrive Recovery
Figure 18. Long-Term Settling Time
Figure 19. Small Signal Transient Response ± 5 V Supply
Figure 20. Large Signal Transient Response
Figure 21. 0.1% Short-Term Settling Time
TEMPERATURE–°C
INPUT BIAS CURRENT
– pA
VS =±5V25354555657585
VS =COMMON-MODE VOLTAGE– V
INPUT BIAS CURRENT
– pA
VS =VS = +5VVS =Figure 25. Input Bias Current vs. Common-Mode Voltage Figure 22. Input Bias Current vs. Temperature
COMMON-MODE VOLTAGE– V
INPUT OFFSET VOLTAGE
mV
VS =
VS = +5V
VS =INPUT OFFSET VOLTAGE– mV
COUNT
160001Figure 26. Input Offset Voltage vs. Common-Mode Voltage Figure 23. Input Offset Voltage Histogram
FREQUENCY– MHz
CMRR
– dB
0.1101100FREQUENCY– Hz
NOISE
nV/ Hz
1001101001k10k100k1M10M100MFigure 27. CMRR vs. Frequency Figure 24. Voltage Noise
FREQUENCY– MHz
OUTPUT IMPEDANCE
G = +10
TEMPERATURE–°C
QUIESCENT CURRENT
mA
–40–20020406080Figure 31. Quiescent Current vs. Temperature for Various Supply Voltages Figure 28. Output Impedance vs. Frequency
RL = 1kΩ
TEMPERATURE–°C
OUTPUT SATURATION VOLTAGE
mV
–40–20020406080
ILOAD– mA
OUT
URAT
ION V
– V
0.25510152025303540Figure 32. Output Saturation Voltage vs. Temperature Figure 29. Output Saturation Voltage vs. Output Load Current
ILOAD– mA
OPEN-LOOP GAIN
– dB
130510152025303540FREQUENCY– MHz
PSRR
dB
–PSRR
+PSRRFigure 30. PSRR vs. Frequency Figure 33. Open-Loop Gain vs. Load Current for Various Supplies
