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AD8039AR-AD8039ART-REEL-AD8039ART-REEL7
Low Power 350 MHz Voltage Feedback Amplifiers
REV.B
Low Power 350 MHz
Voltage Feedback Amplifiers
FEATURES
Low Power
1 mA Supply Current/Amp
High Speed
350 MHz, –3 dB Bandwidth (G = +1)
425 V/�s Slew Rate
Low Cost
Low Noise
8 nV/√Hz @ 100 kHz
600 fA/√Hz @ 100 kHz
Low Input Bias Current: 750 nA Max
Low Distortion
–90 dB SFDR @ 1 MHz
–65 dB SFDR @ 5 MHz
Wide Supply Range: 3 V to 12 V
Small Packaging: SOT23-8, SC70-5, and SOIC-8
APPLICATIONS
Battery-Powered Instrumentation
Filters
A/D Driver
Level Shifting
Buffering
High Density PC Boards
Photo Multiplier
SOIC-8 (R) and SOT23-8 (RT)*
PRODUCT DESCRIPTIONThe AD8038 (single) and AD8039 (dual) amplifiers are high
speed (350 MHz) voltage feedback amplifiers with an exceptionally
low quiescent current of 1.0 mA/amplifier typical (1.5 mA max).
The AD8038 single amplifier in the SOIC-8 package has a
disable feature. Despite being low power and low cost, the
amplifier provides excellent overall performance. Additionally,
it offers a high slew rate of 425 V/µs and low input offset volt-
age of 3 mV max.
ADI’s proprietary XFCB process allows low noise operation
(8 nV/√Hz and 600 fA/√Hz) at extremely low quiescent currents.
Given a wide supply voltage range (3 V to 12 V), wide bandwidth,
and small packaging, the AD8038 and AD8039 amplifiers are
designed to work in a variety of applications where power and space
are at a premium.
The AD8038 and AD8039 amplifiers have a wide input common-
mode range of 1V from either rail and will swing within 1V of
each rail on the output. These amplifiers are optimized for
driving capacitive loads up to 15pF. If driving larger capaci-
tive loads, a small series resistor is needed to avoid excessive
peaking or overshoot.
The AD8039 amplifier is the only dual low power, high speed
amplifier available in a tiny SOT23-8 package, and the single
AD8038 is available in both a SOIC-8 and a SC70-5 package.
These amps are rated to work over the industrial temperature
range of –40°C to +85°C.
Figure 1.Small Signal Frequency Response for
Various Gains, VOUT = 500 mV p-p, VS = ±5 V
*Not yet released
SOIC-8 (R)
SC70-5 (KS)
CONNECTION DIAGRAMS
AD8038/AD8039–SPECIFICATIONS(TA = 25�C, VS = �5 V, RL = 2 k�, Gain = +1, unless otherwise noted.)DC PERFORMANCE
INPUT CHARACTERISTICS
*Only available in AD8038 SOIC-8 package.
Specifications subject to change without notice.
AD8038/AD8039
SPECIFICATIONS(TA = 25�C, VS = 5 V, RL = 2 k� to VS/2, Gain = +1, unless otherwise noted.)DC PERFORMANCE
INPUT CHARACTERISTICS
*Only available in AD8038 SOIC-8 package.
Specifications subject to change without notice.
AD8038/AD8039
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
ABSOLUTE MAXIMUM RATINGS*Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . See Figure 2
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . ±VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ±4 V
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +125°C
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
MAXIMUM POWER DISSIPATIONThe maximum safe power dissipation in the AD8038/AD8039
package is limited by the associated rise in junction temperature (TJ)
on the die. The plastic encapsulating the die will locally reach the
junction temperature. At approximately 150°C, which is the glass
transition temperature, the plastic will change its properties. Even
temporarily exceeding this temperature limit may change the stresses
that the package exerts on the die, permanently shifting the parametric
performance of the AD8038/AD8039. Exceeding a junction tempera-
ture of 175°C for an extended period of time can result in changes
in the silicon devices, potentially causing failure.
The still-air thermal properties of the package and PCB (�JA), ambient
temperature (TA), and total power dissipated in the package (PD)
determine the junction temperature of the die. The junction
temperature can be calculated as follows:
The power dissipated in the package (PD) is the sum of the quiescent
power dissipation and the power dissipated in the package due to the
load drive for all outputs. The quiescent power is the voltage between
the supply pins (VS) multiplied by the quiescent current (IS). Assuming
the load (RL) is referenced to midsupply, then the total drive power is
VS / 2 × IOUT, some of which is dissipated in the package and some
in the load (VOUT × IOUT). The difference between the total drive
power and the load power is the drive power dissipated in the package.
PD = quiescent power + (total drive power – load power)
Figure 2.Maximum Power Dissipation vs.
Temperature for a Four-Layer Board
RMS output voltages should be considered. If RL is referenced to
VS–, as in single-supply operation, then the total drive power is
VS � IOUT.
If the RMS signal levels are indeterminate, then consider the
worst case, when VOUT = VS / 4 for RL to midsupply:
In single-supply operation with RL referenced to VS–, worst case is
VOUT = VS / 2.
Airflow will increase heat dissipation effectively reducing �JA. Also,
more metal directly in contact with the package leads from metal traces,
through holes, ground, and power planes, will reduce the �JA. Care
must be taken to minimize parasitic capacitances at the input leads
of high speed op amps as discussed in the board layout section.
Figure 2 shows the maximum safe power dissipation in the package
versus the ambient temperature for the SOIC-8 (125°C/W), SC70-5
(210°C/W), and SOT23-8 (160°C/W) package on a JEDEC standard
four-layer board. �JA values are approximations.
OUTPUT SHORT CIRCUITShorting the output to ground or drawing excessive current from
the AD8038/AD8039 will likely cause a catastrophic failure.
ORDERING GUIDE*Under development.
(Default Conditions: �5 V, CL = 5 pF, G = +2, RG = RF = 1 kΩ, RL = 2 kΩ, VO = 2 V p-p, Frequency = 1 MHz, TA = 25�C.)TPC 1.Small Signal Frequency
Response for Various Gains,
VOUT= 500 mV p-p
TPC 4.Small Signal Frequency
Response for Various RLOAD,
VS = 5 V, VOUT = 500 mV p-p
TPC 7.Small Signal Frequency
Response for Various CLOAD,
VOUT= 500 mV p-p, VS = ±5 V,
TPC 2.Small Signal Frequency
Response for Various Supplies,
VOUT= 500 mV p-p
TPC 5.Large Signal Frequency
Response for Various RLOAD,
VOUT = 3 V p-p, VS = 5 V
TPC 8.Small Signal Frequency
Response for Various CLOAD,
VOUT= 500 mV p-p, VS = 5 V, G
TPC 3.Small Signal Frequency
Response for Various RLOAD,
VS = ±5 V, VOUT = 500 mV p-p
TPC 6.Large Signal Frequency
Response for Various RLOAD,
VOUT = 4 V p-p, VS = ±5 V
TPC 9.Frequency Response for
Various Output Voltage Levels
AD8038/AD8039TPC 10.Open-Loop Gain and
Phase, VS = ±5 V
TPC 13.Harmonic Distortion vs.
Frequency for Various Loads,= 5 V, VOUT = 2 V p-p, G = +2
TPC 16.Harmonic Distortion vs.
VOUT Amplitude for Various
Frequencies, VS = ±5 V, G = +2
TPC 11.Frequency Response
vs. Temperature, Gain = +2, VS
= ±5 V, VOUT = 2V p-p
TPC 14.Harmonic Distortion vs.
Frequency for Various Gains,= ±5 V, VOUT = 2 V p-p
TPC 17.Harmonic Distortion vs.
Amplitude for Various Frequencies,
VS = 5 V, G = +2
TPC 12.Harmonic Distortion vs.
Frequency for Various Loads,= ±5 V, VOUT = 2 V p-p, G = +2
TPC 15.Harmonic Distortion vs.
Frequency for Various Gains,= 5 V, VOUT = 2 V p-p
TPC 18.Input Voltage Noise vs.
Frequency
(Default Conditions: �5 V, CL = 5 pF, G = +2, RG = RF = 1 kΩ, RL = 2 kΩ, VO = 2 V p-p, Frequency = 1 MHz, TA = 25�C.)
