AD8027ART-REEL7 ,Low-Distortion High-Speed Rail-to-Rail Input/Output AmplifierGENERAL DESCRIPTION FREQUENCY = 100kHz1 R = 1kΩLThe AD8027/AD8028 is a high speed amplifier with ra ..
AD8027ARTZ-R2 ,Low-Distortion High-Speed Rail-to-Rail Input/Output AmplifierSPECIFICATIONS Table 1. V = ±5 V (@ T = 25°C, R = 1 kΩ to midsupply, G = +1, unless otherwise noted ..
AD8027ARTZ-REEL7 ,Low-Distortion High-Speed Rail-to-Rail Input/Output AmplifierFEATURES CONNECTION DIAGRAMS High speed SOIC-8 SOT-23-6(R) (RT)190 MHz, –3 dB bandwidth (G = +1) 1 ..
AD8027ARTZ-REEL7 ,Low-Distortion High-Speed Rail-to-Rail Input/Output AmplifierCHARACTERISTICS Input Impedance 6 MΩ Input Capacitance 2 pF Input Common-Mode Voltage Ra ..
AD8027ARZ ,Low-Distortion High-Speed Rail-to-Rail Input/Output AmplifierSpecifications subject to change without notice. No license is granted by implication www.analog.c ..
AD8027ARZ-REEL7 ,Low-Distortion High-Speed Rail-to-Rail Input/Output AmplifierGENERAL DESCRIPTION FREQUENCY = 100kHz1 R = 1kΩLThe AD8027/AD8028 is a high speed amplifier with ra ..
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ADM709MAR ,Power Supply Monitor with ResetAPPLICATIONSMicroprocessor SystemsComputersV VControllers CC CCIntelligent InstrumentsADM709µPCriti ..
ADM709RAR ,Power Supply Monitor with ResetPower Supply Monitorawith ResetADM709
ADM709SAN ,Power Supply Monitor with ResetSPECIFICATIONSCC A MIN MAXParameter Min Typ Max Units Test Conditions/CommentsV Operating Voltage R ..
ADM709TAR ,Power Supply Monitor with ResetSPECIFICATIONSCC A MIN MAXParameter Min Typ Max Units Test Conditions/CommentsV Operating Voltage R ..
AD8027AR-AD8027ART-REEL7-AD8027ARTZ-R2-AD8027ARTZ-REEL7-AD8027ARZ-AD8027ARZ-REEL7-AD8028AR-AD8028AR-REEL7-AD8028ARZ
Low-Distortion High-Speed Rail-to-Rail Input/Output Amplifier
Low Distortion, High Speed
Rail-to-Rail Input/Output Amplifiers
FEATURES
High speed
190 MHz, –3 dB bandwidth (G = +1)
100 V/µs slew rate
Low distortion
120 dBc @ 1 MHz SFDR
80 dBc @ 5 MHz SFDR
Selectable input crossover threshold
Low noise
4.3 nV/√Hz
1.6 pA/√Hz
Low offset voltage: 900 µV max
Low power: 6.5 mA/amplifier supply current
Power-down mode
No phase reversal: VIN > |VS| + 200 mV
Wide supply range: 2.7 V to 12 V
Small packaging: SOIC-8, SOT-23-6, MSOP-10
APPLICATIONS
Filters
ADC drivers
Level shifting
Buffering
Professional video
Low voltage instrumentation
GENERAL DESCRIPTION The AD8027/AD80281 is a high speed amplifier with rail-to-
rail input and output that operates on low supply voltages and
is optimized for high performance and wide dynamic signal
range. The AD8027/AD8028 has low noise (4.3 nV/√Hz,
1.6 pA/√Hz) and low distortion (120 dBc @ 1 MHz). In appli-
cations that use a fraction of or the entire input dynamic range
and require low distortion, the AD8027/AD8028 is an ideal
choice.
Many rail-to-rail input amplifiers have an input stage that
switches from one differential pair to another as the input sig-
nal crosses a threshold voltage, which causes distortion. The
AD8027/AD8028 has a unique feature that allows the user to
select the input crossover threshold voltage through the
SELECT pin. This feature controls the voltage at which the
complementary transistor input pairs switch. The AD8027/
AD8028 also has intrinsically low crossover distortion.
CONNECTION DIAGRAMS
SOT-23-6
(RT)
VOUT
–VS
+IN+VS
DISABLE/SELECT–IN03327-B-001
NC = NO CONNECT
SOIC-8
(R)
–IN
+IN
–VS
+VS
VOUT
DISABLE/SELECT
VOUTB
–IN B
+IN B
+VSVOUTA
SOIC-8
(R)
–IN A
+IN A
–VS
VOUTB
+VS
DISABLE/SELECT B
–IN B
+IN BDISABLE/SELECT A
VOUTA
MSOP-10
(RM)
–IN A
+IN A
–VSFigure 1. Connection Diagrams (Top View)
With its wide supply voltage range (2.7 V to 12 V) and wide
bandwidth (190 MHz), the AD8027/AD8028 amplifier is
designed to work in a variety of applications where speed and
performance are needed on low supply voltages. The high per-
formance of the AD8027/AD8028 is achieved with a quiescent
current of only 6.5 mA/amplifier typical. The AD8027/AD8028
has a shut down mode that is controlled via the SELECT pin.
The AD8027/AD8028 is available in SOIC-8, MSOP-10, and
SOT-23-6 packages. They are rated to work over the industrial
temperature range of –40°C to +125°C.
OUTPUT VOLTAGE (V p-p)
DR (d03327-A-063
Figure 2. SFDR vs. Output Amplitude
1. patent numbers 6,486,737B1; 6,518,842B1
Rev. B
TABLE OF CONTENTS Specifications.....................................................................................3
Absolute Maximum Ratings............................................................6
Maximum Power Dissipation.....................................................6
Typical Performance Characteristics.............................................7
Theory of Operation......................................................................16
Input Stage...................................................................................16
Crossover Selection....................................................................16
Output Stage................................................................................17
DC Errors....................................................................................17
Wideband Operation.....................................................................18
Circuit Considerations..............................................................19
Applications.....................................................................................20
Using the AD8027/AD8028 SELECT Pin...............................20
Driving a 16-Bit ADC................................................................20
Band-Pass Filter..........................................................................21
Design Tools and Technical Support.......................................21
Outline Dimensions.......................................................................22
Ordering Guide..........................................................................23
REVISION HISTORY
Revision B: 10/03—Data Sheet changed from Rev. A to Rev. B
Changes to Figure 1...........................................................................1
Revision A: 8/03—Data Sheet changed from Rev. 0 to Rev. A
Addition of AD8028...........................................................Universal
Changes to GENERAL DESCRIPTION.........................................1
Changes to Figures 1, 3, 4, 8, 13, 15, 17............................1, 6, 7, 8, 9
Changes to Figures 58, 60.........................................................18, 20
Changes to SPECIFICATIONS........................................................3
Updated OUTLINE DIMENSIONS.............................................22
Updated ORDERING GUIDE.......................................................23
Revision 0: Initial Version
SPECIFICATIONS
Table 1. VS = ±5 V (@ TA = 25°C, RL = 1 kΩ to midsupply, G = +1, unless otherwise noted.)
SPECIFICATIONS
Table 2. VS = +5 V (@ TA = 25°C, RL = 1 kΩ to midsupply, unless otherwise noted.)
SPECIFICATIONS
Table 3. VS = +3 V (@ TA = 25°C, RL = 1 kΩ to midsupply, unless otherwise noted.)
ABSOLUTE MAXIMUM RATINGS
Table 4. Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rat-
ing only; functional operation of the device at these or any
other conditions above those indicated in the operational sec-
tion of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Maximum Power Dissipation The maximum safe power dissipation in the AD8027/AD8028
package is limited by the associated rise in junction temperature
(TJ) on the die. The plastic encapsulating the die will locally
reach the junction temperature. At approximately 150°C, which
is the glass transition temperature, the plastic will change its
properties. Even temporarily exceeding this temperature limit
may change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the
AD8027/AD8028. Exceeding a junction temperature of 175°C
for an extended period of time can result in changes in the
silicon devices, potentially causing failure.
The still-air thermal properties of the package and PCB (θJA),
ambient temperature (TA), and the total power dissipated in the
package (PD) determine the junction temperature of the die.
The junction temperature can be calculated as JADAJθTT×+=
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS). Assuming the load (RL) is referenced to
midsupply, then the total drive power is VS/2 × IOUT, some of
which is dissipated in the package and some in the load (VOUT ×
IOUT). The difference between the total drive power and the load
power is the drive power dissipated in the package. PowerLoad–PowerDrivePowerQuiescentPD
OUT
OUTSSSDRVIVP2×+×=
RMS output voltages should be considered. If RL is referenced
to VS–, as in single-supply operation, then the total drive power
is VS × IOUT.
If the rms signal levels are indeterminate, then consider the
worst case, when VOUT = VS/4 for RL to midsupply ()SSDRIVP4/+×=
In single-supply operation with RL referenced to VS–, worst case
is VOUT = VS/2.
Airflow will increase heat dissipation, effectively reducing θJA.
Also, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes will
reduce the θJA. Care must be taken to minimize parasitic capaci-
tances at the input leads of high speed op amps as discussed in
the board layout section.
Figure 3 shows the maximum safe power dissipation in the
package versus the ambient temperature for the SOIC-8
(125°C/W), SOT-23-6 (170°C/W), and MSOP-10 (130°C/W)
packages on a JEDEC standard 4-layer board.
OUTPUT SHORT CIRCUIT Shorting the output to ground or drawing excessive current
from the AD8027/AD8028 will likely cause catastrophic failure.
AMBIENT TEMPERATURE (°C)
XIM
POW
ISSIPA
TION
2.003327-A-002
Figure 3. Maximum Power Dissipation
TYPICAL PERFORMANCE CHARACTERISTICS Default Conditions VS = +5 V (TA = +25°C, RL = 1 kΩ, unless otherwise noted.)
FREQUENCY (MHz)
NORMALIZE
CLOS
-LOOP
GAIN (dB)03327-A-003
Figure 4. Small Signal Frequency Response for Various Gains
FREQUENCY (MHz)
CLOSED-
LOOP GAIN (03327-A-004
Figure 5. AD8027 Small Signal Frequency Response for Various Supplies
FREQUENCY (MHz)
CLOSED-
OOP GAIN (03327-A-005
Figure 6. Large Signal Frequency Response for Various Supplies
FREQUENCY (MHz)
CLOSED-
OOP GAIN (03327-A-006
Figure 7. Small Signal Frequency Response for Various Supplies
FREQUENCY (MHz)
CLOSED-
OOP GAIN (03327-A-007
Figure 8. AD8028 Small Signal Frequency Response for Various Supplies
FREQUENCY (MHz)
CLOSED-
OOP GAIN (03327-A-008
Figure 9. Large Signal Frequency Response for Various Supplies
FREQUENCY (MHz)
CLOSED-
OOP GAIN (03327-A-009
Figure 10. AD8027 Small Signal Frequency Response for Various CLOAD
FREQUENCY (MHz)
CLOSED-
OOP GAIN (03327-A-010
Figure 11. Frequency Response for Various Output Amplitudes
FREQUENCY (MHz)
CLOSED-
OOP GAIN (03327-A-011
Figure 12. AD8027 Small Signal Frequency Response vs. Temperature
FREQUENCY (MHz)
CLOSED-
OOP GAIN (03327-A-012
Figure 13. AD8028 Small Signal Frequency Response for Various CLOAD
FREQUENCY (MHz)
CLOSED-
OOP GAIN (03327-A-013
Figure 14. Small Signal Frequency Response for Various RLOAD Values
FREQUENCY (MHz)
CLOSED-
OOP GAIN (03327-A-014
Figure 15. AD8028 Small Signal Frequency Response vs. Temperature
FREQUENCY (MHz)
CLOSED-
OOP GAI (03327-A-015
Figure 16. Small Signal Frequency Response vs.
Input Common-Mode Voltages
FREQUENCY (MHz)
CROS
ALK (dB)03327-A-016
CROSSTALK = 20log (VOUT/VIN)Figure 17. AD8028 Crosstalk Output to Output
FREQUENCY (Hz)
OPEN-
OOP GAIN (
SE (
egrees)100
11003327-A-017
Figure 18. Open-Loop Gain and Phase vs. Frequency
1001k10k100k
FREQUENCY (Hz)10M100M1G
CURRE
NT NOIS
(pA/ Hz)
VOLTA
GE N
ISE (
V/ H03327-A-018
Figure 19. Voltage and Current Noise vs. Frequency
FREQUENCY (MHz)
CLOSED-
OOP GAIN (03327-A-019
Figure 20. 0.1 dB Flatness Frequency Response
FREQUENCY (MHz)
DISTORTION (
–2003327-A-020
Figure 21. Harmonic Distortion vs. Frequency and Supply Voltage
OUTPUT VOLTAGE (V p-p)
DISTORTION (03327-A-021
Figure 22. Harmonic Distortion vs. Output Amplitude
INPUT COMMON-MODE VOLTAGE (V)
DISTORTION (
–5003327-A-022
Figure 23. Harmonic Distortion vs. Input Common-Mode Voltage,
SELECT = High
FREQUENCY (MHz)
DISTORTION (
–2003327-A-023
Figure 24. Harmonic Distortion vs. Frequency and Load
INPUT COMMON-MODE VOLTAGE (V)
DISTORTION (
–4503327-A-024
Figure 25. Harmonic Distortion vs. Input Common-Mode Voltage, VS = +5 V
INPUT COMMON-MODE VOLTAGE (V)
DISTORTION (
–5003327-A-025
Figure 26. Harmonic Distortion vs. Input Common-Mode Voltage,
SELECT = Tri-State or Open
FREQUENCY (MHz)
DISTORTION (
–2003327-A-026
Figure 27. Harmonic Distortion vs. Frequency and Gain
0.2003327-A-027
Figure 28. Small Signal Transient Response
2.003327-A-028
Figure 29. Large Signal Transient Response, G = +1
2.503327-A-029
Figure 30. Large Signal Transient Response, G = +2
0.2003327-A-030
Figure 31. Small Signal Transient Response with Capacitive Load
3.503327-A-031
Figure 32. Output Overdrive Recovery
3.503327-A-032
Figure 33. Input Overdrive Recovery
Figure 34. Long-Term Settling Time
Figure 35. 0.1% Short-Term Settling Time
TEMPERATURE (°C)
INP
T BIAS
CURRE
NT (S
T = HIGH) (
INP
T BIAS
CURRE
NT (S
T = TRI) (
–8.503327-A-035
Figure 36. Input Bias Current vs. Temperature
INPUT COMMON-MODE VOLTAGE (V)
INP
T BIAS
CURRE
NT (234567891010
–1003327-A-036
Figure 37. Input Bias Current vs. Input Common-Mode Voltage
INPUT OFFSET VOLTAGE (µV)
FREQUENCY03327-A-037
Figure 38. Input Offset Voltage Distribution
