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AD8002ANZADN/a2avaiDual 600 MHz, 50 mW Current Feedback Amplifier
AD8002ARZADN/a4avaiDual 600 MHz, 50 mW Current Feedback Amplifier


AD8002ARZ ,Dual 600 MHz, 50 mW Current Feedback AmplifierSpecifications subject to change without notice.–2–REV. DAD80021ABSOLUTE MAXIMUM RATINGS MAXIMUM PO ..
AD800-45BQ ,Clock Recovery and Data Retiming Phase-Locked Loopspecifications result from statistical*Stresses above those listed under “Absolute Maximum Ratings” ..
AD8004AN ,Quad 3000 V/us, 35 mW Current Feedback AmplifierSPECIFICATIONSA S L AD8004AParameter Conditions Min Typ Max UnitsDYNAMIC PERFORMANCE–3 dB ..
AD8004AN ,Quad 3000 V/us, 35 mW Current Feedback AmplifierSpecifications (R = 150 V, G = +2)L–IN–IN 6 923Gain Flatness 0.1 dB to 30 MHzOUTPUTOUTPUT 7 80.04% ..
AD8004AR-14 ,Quad 3000 V/us, 35 mW Current Feedback AmplifierSpecifications subject to change without notice.–2– REV. BAD8004(@ T = + 258C, V = +5 V, R = 100 V, ..
AD8004SQ , Quad 3000 V/s, 35 mW Current Feedback Amplifier
ADM690AN ,Microprocessor Supervisory CircuitsSpecifications subject to change without notice.ABSOLUTE MAXIMUM RATINGS*ORDERING GUIDE(T = +25°C u ..
ADM691AAN ,Microprocessor Supervisory CircuitsFEATURESLow Power Consumption:BATT ONPrecision Voltage Monitor62% Tolerance on ADM800L/M14.65VLOW L ..
ADM691AARN ,Microprocessor Supervisory CircuitsGENERAL DESCRIPTIONPOWER FAILINPUT (PFI)1.25V OUTPUT (PFO)The ADM691A/ADM693A/ADM800L/ADM800M famil ..
ADM691AARNZ , Microprocessor Supervisory Circuits
ADM691AARNZ , Microprocessor Supervisory Circuits
ADM691AARW ,Microprocessor Supervisory CircuitsFEATURESLow Power Consumption:BATT ONPrecision Voltage Monitor62% Tolerance on ADM800L/M14.65VLOW L ..


AD8002ANZ-AD8002ARZ
Dual 600 MHz, 50 mW Current Feedback Amplifier
REV. D
Dual 600 MHz, 50 mW
Current Feedback Amplifier
FEATURES
Excellent Video Specifications (RL = 150 �, G = +2)
Gain Flatness 0.1 dB to 60 MHz
0.01% Differential Gain Error
0.02� Differential Phase Error
Low Power
5.5 mA/Amp Max Power Supply Current (55 mW)
High Speed and Fast Settling
600 MHz, –3 dB Bandwidth (G = +1)
500 MHz, –3 dB Bandwidth (G = +2)
1200 V/�s Slew Rate
16 ns Settling Time to 0.1%
Low Distortion
–65 dBc THD, fC = 5 MHz
33 dBm Third Order Intercept, F1 = 10 MHz
–66 dB SFDR, f = 5 MHz
–60dB Crosstalk, f = 5MHz
High Output Drive
Over 70 mA Output Current
Drives Up to Eight Back-Terminated 75 � Loads
(Four Loads/Side) While Maintaining Good
Differential Gain/Phase Performance (0.01%/0.17�)
Available in 8-Lead Plastic DIP, SOIC and �SOIC Packages
APPLICATIONS
A-to-D Driver
Video Line Driver
Differential Line Driver
Professional Cameras
Video Switchers
Special Effects
RF Receivers
FUNCTIONAL BLOCK DIAGRAM
8-Lead Plastic DIP, SOIC, and �SOIC
PRODUCT DESCRIPTION

The AD8002 is a dual, low-power, high-speed amplifier designed
to operate on±5V supplies. The AD8002 features unique trans-
impedance linearization circuitry. This allows it to drive video
loads with excellent differential gain and phase performance on
only 50mW of power per amplifier. The AD8002 is a current
feedback amplifier and features gain flatness of 0.1 dB to 60 MHz
while offering differential gain and phase error of 0.01% and
0.02°. This makes the AD8002 ideal for professional video
electronics such as cameras and video switchers. Additionally,
the AD8002’s low distortion and fast settling make it ideal for
buffer high-speed A-to-D converters.
The AD8002 offers low power of 5.5 mA/amplifier max (VS =5 V) and can run on a single 12 V power supply, while capable
of delivering over 70 mA of load current. It is offered in an
8-lead plastic DIP, SOIC, and µSOIC package. These features
make this amplifier ideal for portable and battery-powered
applications where size and power are critical.
The outstanding bandwidth of 600 MHz along with 1200 V/µs
of slew rate make the AD8002 useful in many general purpose
high speed applications where dual power supplies of up to ±6 V
andsinglesuppliesfrom6Vto12Vareneeded.TheAD8002is
availableintheindustrialtemperaturerangeof–40°C to +85°C.
Figure 1.Frequency Response and Flatness, G = +2
Figure 2.1 V Step Response, G = +1
AD8002–SPECIFICATIONS(@ TA = 25�C, VS = �5 V, RL = 100 �, RC1 = 75 �, unless otherwise noted.)
ABSOLUTE MAXIMUM RATINGS1
SupplyVoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.2V
InternalPowerDissipation2
PlasticDIP Package (N) . . . . . . . . . . . . . . . . . . . . . . .1.3W
SmallOutlinePackage (R) . . . . . . . . . . . . . . . . . . . . . .0.9W
µSOICPackage (RM) . . . . . . . . . . . . . . . . . . . . . . . . .0.6W
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . .±VS
DifferentialInputVoltage . . . . . . . . . . . . . . . . . . . . . . .±1.2V
Output Short Circuit Duration. . . . . . . . . . . . . . . . . . . . .Observe Power Derating Curves
Storage Temperature Range N, R, RM . . . . .–65°C to +125°C
Operating Temperature Range (A Grade) . . .–40°C to +85°C
Lead Temperature Range (Soldering10sec) . . . . . . . . .300°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Specification is for device in free air:
8-Lead Plastic DIP Package: θJA = 90°C/W
8-Lead SOIC Package: θJA = 155°C/W
8-Lead µSOIC Package: θJA = 200°C/W
MAXIMUM POWER DISSIPATION

The maximum power that can be safely dissipated by the
AD8002 is limited by the associated rise in junction tempera-
ture. The maximum safe junction temperature for plastic
encapsulated devices is determined by the glass transition tem-
perature of the plastic, approximately 150°C. Exceeding this
limit temporarily may cause a shift in parametric performance
due to a change in the stresses exerted on the die by the package.
Exceeding a junction temperature of 175°C for an extended
period can result in device failure.
While the AD8002 is internally short circuit protected, this
may not be sufficient to guarantee that the maximum junction
temperature (150°C) is not exceeded under all conditions. To
ensure proper operation, it is necessary to observe the maximum
power derating curves.
Figure 3.Plot of Maximum Power Dissipation vs.
Temperature
CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8002 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ORDERING GUIDE

AD8002AR
AD8002AR-REEL
AD8002AR-REEL7
AD8002ARM
AD8002ARM-REEL
AD8002
TPC 1.Test Circuit , Gain = +1
TPC 2.100 mV Step Response, G = +1
TPC 3.1 V Step Response, G = +1
–Typical Performance Characteristics

TPC 4.Test Circuit, Gain = +2
TPC 5.100 mV Step Response, G = +2
TPC 6.1 V Step Response, G = +2
TPC 7.Frequency Response and Flatness, G = +2
TPC 8.Distortion vs. Frequency, G = +2, RL = 100 Ω
TPC 9.Distortion vs. Frequency, G = +2, RL = 1 kΩ
TPC 10.Crosstalk (Output-to-Output) vs. Frequency
TPC 11.Pulse Crosstalk, Worst Case, 1V Step
TPC 12. Differential Gain and Differential Phase
(per Amplifier)
AD8002
TPC 13.Frequency Response, G = +1
TPC 14.Distortion vs. Frequency, G = +1, RL = 100 Ω
TPC 15. Distortion vs. Frequency, G = +1, RL = 1 kΩ
TPC 16.Large Signal Frequency Response, G = +2
TPC 17.Large Signal Frequency Response, G = +1
TPC 18.Frequency Response, G = +10, G = +100
TPC 19.Short-Term Settling Time
TPC 20.Output Swing vs. Temperature
TPC 21.Input Bias Current vs. Temperature
TPC 22.Long-Term Settling Time
TPC 23.Input Offset Voltage vs. Temperature
TPC 24.Total Supply Current vs. Temperature
AD8002
TPC 25.Short Circuit Current vs. Temperature
TPC 26.Noise vs. Frequency
TPC 27.CMRR vs. Temperature
TPC 28. Output Resistance vs. Frequency
TPC 29.–3 dB Bandwidth vs. Frequency, G = –1
TPC 30.PSRR vs. Temperature
TPC 31.CMRR vs. Frequency
TPC 32.2V Step Response, G = –1
TPC 33.100 mV Step Response, G = –1
TPC 34.PSRR vs. Frequency
TPC 35.2 V Step Response, G = –2
TPC 36.100mV Step Response, G = –2
AD8002
THEORY OF OPERATION

A very simple analysis can put the operation of the AD8002, a
current feedback amplifier, in familiar terms. Being a current
feedback amplifier, the AD8002’s open-loop behavior is expressed
as transimpedance, ∆VO/∆I–IN, or TZ. The open-loop transim-
pedance behaves just as the open-loop voltage gain of a voltage
feedback amplifier, that is, it has a large dc value and decreases
at roughly 6 dB/octave in frequency.
Since the RIN is proportional to 1/gm, the equivalent voltage
gain is just TZ × gm, where the gm in question is the trans-
conductance of the input stage. This results in a low open-loop
input impedance at the inverting input, a now familiar result.
Using this amplifier as a follower with gain, Figure 4, basic
analysis yields the following result.
Figure 4.
Recognizing that G × RIN << R1 for low gains, it can be seen to
the first order that bandwidth for this amplifier is independent
of gain (G).
Considering that additional poles contribute excess phase at
high frequencies, there is a minimum feedback resistance below
which peaking or oscillation may result. This fact is used to
determine the optimum feedback resistance, RF. In practice
parasitic capacitance at the inverting input terminal will also add
phase in the feedback loop, so picking an optimum value for RF
can be difficult.
Achieving and maintaining gain flatness of better than 0.1 dB at
frequencies above 10 MHz requires careful consideration of
several issues.
Choice of Feedback and Gain Resistors

The fine scale gain flatness will, to some extent, vary with
feedback resistance. It, therefore, is recommended that once
optimum resistor values have been determined, 1% tolerance
values should be used if it is desired to maintain flatness over a
wide range of production lots. In addition, resistors of different
construction have different associated parasitic capacitance
and inductance. Surface mount resistors were used for the bulk
of the characterization for this data sheet. It is not recommended
that leaded components be used with the AD8002.
Printed Circuit Board Layout Considerations

As expected for a wideband amplifier, PC board parasitics can
affect the overall closed-loop performance. Of concern are
stray capacitances at the output and the inverting input nodes. If
a ground plane is to be used on the same side of the board as
the signal traces, a space (5 mm min) should be left around the
signal lines to minimize coupling. Additionally, signal lines
connecting the feedback and gain resistors should be short
enough so that their associated inductance does not cause high
frequency gain errors. Line lengths on the order of less than
5 mm are recommended. If long runs of coaxial cable are being
driven, dispersion and loss must be considered.
Power Supply Bypassing

Adequate power supply bypassing can be critical when optimiz-
ing the performance of a high-frequency circuit. Inductance in
the power supply leads can form resonant circuits that produce
peaking in the amplifier’s response. In addition, if large current
transients must be delivered to the load, bypass capacitors
(typically greater than 1 µF) will be required to provide the
best settling time and lowest distortion. A parallel combina-
tion of 4.7 µF and 0.1 µF is recommended. Some brands of
electrolytic capacitors will require a small series damping resis-
tor ≈4.7 Ω for optimum results.
DC Errors and Noise

There are three major noise and offset terms to consider in a
current feedback amplifier. For offset errors, refer to the equa-
tion below. For noise error, the terms are root-sum-squared to
give a net output error. In the circuit shown in Figure 5 they
are input offset (VIO), which appears at the output multiplied by
the noise gain of the circuit (1 + RF/RI), noninverting input
current (IBN × RN), also multiplied by the noise gain, and the
inverting input current, which, when divided between RF and RI
and subsequently multiplied by the noise gain, always appears
at the output as IBN × RF. The input voltage noise of the AD8002
is a low 2 nV/√Hz. At low gains, though, the inverting input
current noise times RF is the dominant noise source. Careful
layout and device matching contribute to better offset and
drift specifications for the AD8002 compared to many other
current feedback amplifiers. The typical performance curves in
conjunction with the equations below can be used to predict the
performance of the AD8002 in any application.
Figure 5.Output Offset Voltage
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