AD7895AR-3 ,5 V, 12-Bit, Serial 3.8 ms ADC in 8-Pin PackageFEATURES FUNCTIONAL BLOCK DIAGRAMFast 12-Bit ADC with 3.8 ms Conversion TimeREF IN V8-Pin Mini-DlP ..
AD7895BR-10 ,5 V, 12-Bit, Serial 3.8 ms ADC in 8-Pin Packagefeatures a high sampling rate mode and, for lowallowing for an easy, two-wire serial interface arra ..
AD7896 ,2.7 V to 5.5 V, 12-Bit, 8 祍 ADC in 8-Pin SO/DIPSPECIFICATIONSABJ S1Parameter Versions Versions Version Version Units Test Conditions/Comments 2DYN ..
AD7896AR ,2.7 V to 5.5 V, 12-Bit, 8 us ADC in 8-Pin SO/DIPspecifications T to TDD MIN MAXunless otherwise noted)AD7896–
AD7896BR ,2.7 V to 5.5 V, 12-Bit, 8 us ADC in 8-Pin SO/DIPSpecifications subject to change without notice.–2– REV. BAD78961(V = +2.7 V to +5.5 V, AGND = DGND ..
AD7896BR ,2.7 V to 5.5 V, 12-Bit, 8 us ADC in 8-Pin SO/DIPspecifications such asversion is complete and “wakes up” before the next conver-linearity, full-sca ..
ADM5170AN ,Octal, RS-232/RS-423 Line DriverSpecifications subject to change without notice.REV. 0–2–ADM5170ABSOLUTE MAXIMUM RATINGS* ORDERING ..
ADM5170AP ,Octal, RS-232/RS-423 Line DriverFEATURESFUNCTIONAL BLOCK DIAGRAMEight Single Ended Line Drivers in One PackageMeets EIA Standard RS ..
ADM5170JN ,Octal, RS-232/RS-423 Line DriverCHARACTERISTICSunless otherwise noted.)Parameter Min Typ Max Units Test Conditions/CommentsOutput S ..
ADM5170JP ,Octal, RS-232/RS-423 Line DriverSpecifications T to T unless otherwise noted.)MIN MAXParameter Min Typ Max Units Test Conditions/Co ..
ADM5180JN ,Octal, RS-232/RS-423 Line ReceiverSPECIFICATIONS T unless otherwise noted.)MAXParameter Min Typ Max Units Test Conditions/CommentsPOW ..
ADM5180JP ,Octal, RS-232/RS-423 Line ReceiverSpecifications subject to change without notice.–2– REV. 0ADM51801ABSOLUTE MAXIMUM RATINGS Operatin ..
AD7895AN-10-AD7895AN-3-AD7895AR-10-AD7895AR-2-AD7895AR-3-AD7895BR-10
5 V, 12-Bit, Serial 3.8 ms ADC in 8-Pin Package
REV.0
5 V, 12-Bit, Serial 3.8 ms
ADC in 8-Pin Package
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Fast 12-Bit ADC with 3.8 ms Conversion Time
8-Pin Mini-DlP and SOIC
Single 5 V Supply Operation
High Speed, Easy-to-Use, Serial Interface
On-Chip Track/Hold Amplifier
Selection of Input Ranges610 V for AD7895-10
62.5 V for AD7895-3
0 V to +2.5 V for AD7895-2
High Input Impedance
Low Power: 20 mW max
14-Bit Pin Compatible Upgrade (AD7894)
GENERAL DESCRIPTIONThe AD7895 is a fast 12-bit ADC that operates from a single
+5 V supply and is housed in a small 8-pin mini-DIP and 8-pin
SOIC. The part contains a 3.8μs successive approximation A/D
converter, an on-chip track/hold amplifier, an on-chip clock and
a high speed serial interface.
Output data from the AD7895 is provided via a high speed,
serial interface port. This two-wire serial interface has a serial
clock input and a serial data output with the external serial clock
accessing the serial data from the part.
In addition to the traditional dc accuracy specifications such as
linearity and full-scale and offset errors, the AD7895 is specified
for dynamic performance parameters, including harmonic
distortion and signal-to-noise ratio.
The part accepts an analog input range of ±10 V (AD7895-10),2.5 V (AD7895-3), 0 V to 2.5 V (AD7895-2) and operates
from a single +5 V supply, consuming only 20 mW max.
The AD7895 features a high sampling rate mode and, for low
power applications, a proprietary automatic power-down mode
where the part automatically goes into power down once
conversion is complete and “wakes up” before the next conver-
sion cycle.
The part is available in a small, 8-pin, 0.3" wide, plastic dual-in-
line package (mini-DIP) and in an 8-pin, small outline IC (SOIC).
PRODUCT HIGHLIGHTSFast, 12-Bit ADC in 8-Pin Package
The AD7895 contains a 3.8μs ADC, a track/hold amplifier,
control logic and a high speed serial interface, all in an 8-pin
package. This offers considerable space saving over alterna-
tive solutions.Low Power, Single Supply Operation
The AD7895 operates from a single +5 V supply and
consumes only 20 mW. The automatic power-down mode,
where the part goes into power-down once conversion is
complete and “wakes up” before the next conversion cycle,
makes the AD7895 ideal for battery-powered or portable
applications.High Speed Serial Interface
The part provides high speed serial data and serial clock lines
allowing for an easy, two-wire serial interface arrangement.
AD7895–SPECIFICATIONSNOTES
1Temperature ranges are as follows: A, B Versions: –40°C to +85°C.
2Applies to Mode 1 operation. See section on “Operating Modes.”
(VDD = +5 V, GND = 0 V, REF IN = +2.5 V.
All specifications TMIN to TMAX unless otherwise noted)
TIMING CHARACTERISTICS1, 2NOTESSample tested at +25°C to ensure compliance. All input signals are measured with tr = tf = 1 ns (10% to 90% of +5 V) and timed from a voltage level of +1.4 V.The SCLK maximum frequency is 15 MHz. Care must be taken when interfacing to account for the data access time, t4, and the setup time required for the user's
processor. These two times will determine the maximum SCLK frequency that the user’s system can operate with. See “Serial Interface” section for more information.Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.0 V.Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back
to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t6, quoted in the timing characteristics is the true bus relinquish time
of the part and, as such, is independent of external bus loading capacitances.
ABSOLUTE MAXIMUM RATINGS*(TA = +25°C unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +7 V
Analog Input Voltage to GND
AD7895-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±17 V
AD7895-2, AD7895-3 . . . . . . . . . . . . . . . . . . . –5V, +10 V
Reference Input Voltage to GND . . . . –0.3 V to VDD + 0.3 V
Digital Input Voltage to GND . . . . . . . –0.3 V to VDD + 0.3 V
Digital Output Voltage to GND . . . . . –0.3 V to VDD + 0.3 V
Operating Temperature Range
Commercial (A, B Versions) . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 130°C/W
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . +260°C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 170°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
(VDD = +5 V, GND = 0 V, REF IN = +2.5 V)*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDEAD7895AN-10
AD7895AR-10
AD7895BR-10
AD7895AN-3
*N = Plastic DIP, SO = SOIC.
Figure 1.Load Circuit for Access Time and Bus
Relinquish Time
AD7895
PIN FUNCTION DESCRIPTION
PIN CONFIGURATION
DIP and SOIC
REF IN
SDATA
BUSY
CONVST
VDD
VIN
GND
SCLK
TERMINOLOGY
Signal to (Noise + Distortion) RatioThis is the measured ratio of signal to (noise + distortion) at the
output of the A/D converter. The signal is the rms amplitude of
the fundamental. Noise is the rms sum of all nonfundamental
signals up to half the sampling frequency (fS/2), excluding dc.
The ratio is dependent upon the number of quantization levels
in the digitization process; the more levels, the smaller the
quantization noise. The theoretical signal to (noise + distortion)
ratio for an ideal N-bit converter with a sine wave input is given
by:
Signal to (Noise + Distortion) = (6.02N + 1.76) dB
Thus for a 12-bit converter, this is 74 dB.
Total Harmonic DistortionTotal harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7895, it is defined as:
THD(dB)=20log
where V1 is the rms amplitude of the fundamental, and V2, V3,
V4, V5 and V6 are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious NoisePeak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to fS/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is
determined by the largest harmonic in the spectrum, but for
parts where the harmonics are buried in the noise floor, it will
be a noise peak.
Intermodulation DistortionWith inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa ± nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation terms are those for which
neither m or n are equal to zero. For example, the second order
terms include (fa + fb) and (fa – fb), while the third order terms
include (2 fa + fb), (2 fa – fb), (fa + 2 fb) and (fa – 2 fb).
The AD7895 is tested using the CCIF standard where two
input frequencies near the top end of the input bandwidth are
used. In this case, the second and third order terms are of
different significance. The second order terms are usually
distanced in frequency from the original sine waves, while the
third order terms are usually at a frequency close to the input
frequencies. As a result, the second and third order terms are
specified separately. The calculation of the intermodulation
distortion is as per the THD specification where it is the ratio of
the rms sum of the individual distortion products to the rms
amplitude of the fundamental expressed in dBs.
Relative AccuracyRelative accuracy or endpoint nonlinearity is the maximum
deviation from a straight line passing through the endpoints of
the ADC transfer function.
Differential NonlinearityThis is the difference between the measured and the ideal 1LSB
change between any two adjacent codes in the ADC.
Positive Full-Scale Error (AD7895-10)This is the deviation of the last code transition (01 . . . 110 to
01 . . . 111) from the ideal (4 × VREF – 1 LSB) after the
Bipolar Zero Error has been adjusted out.
Positive Full-Scale Error (AD7895-3)This is the deviation of the last code transition (01 . . . 110 to
01 . . . 111) from the ideal ( VREF – 1 LSB) after the
Bipolar Zero Error has been adjusted out.
Positive Full-Scale Error (AD7895-2)This is the deviation of the last code transition (11 . . . 110 to
11 . . . 111) from the ideal (VREF – 1 LSB) after the Unipolar
Offset Error has been adjusted out.
Bipolar Zero Error (AD7895-10, AD7895-3)This is the deviation of the midscale transition (all 0s to all 1s)
from the ideal 0 V (GND).
Unipolar Offset Error (AD7895-2)This is the deviation of the first code transition (00 . . . 000 to
00 . . . 001) from the ideal 1 LSB.
Negative Full-Scale Error (AD7895-10)This is the deviation of the first code transition (10 . . . 000 to
10 . . . 001) from the ideal (–4 × VREF + 1 LSB) after Bipolar
Zero Error has been adjusted out.
Negative Full-Scale Error (AD7895-3)This is the deviation of the first code transition (10 . . . 000 to
10 . . . 001) from the ideal (–VREF + 1 LSB) after Bipolar Zero
Error has been adjusted out.
Track/Hold Acquisition TimeTrack/Hold acquisition time is the time required for the output
of the track/hold amplifier to reach its final value, within
±1/2LSB, after the end of conversion (the point at which the
track/hold returns to track mode). It also applies to situations
where there is a step input change on the input voltage applied
to the VIN input of the AD7895. This means that the user must
wait for the duration of the track/hold acquisition time after the
end of conversion or after a step input change to VIN before
starting another conversion to ensure that the part operates to
specification.
AD7895
CONVERTER DETAILSThe AD7895 is a fast, 12-bit single supply A/D converter. It
provides the user with signal scaling, track/hold, A/D converter
and serial interface logic functions on a single chip. The A/D
converter section of the AD7895 consists of a conventional
successive-approximation converter based around an R-2R
ladder structure. The signal scaling on the AD7895-10 and
AD7895-3 allows the part to handle ±10 V and ±2.5 V input
signals, respectively, while operating from a single +5V supply.
The AD7895-2 accepts an analog input range of 0 V to +2.5 V.
The part requires an external +2.5 V reference. The reference
input to the part is buffered on-chip. The AD7895 has two
operating modes, the high sampling mode and the auto sleep
mode, where the part automatically goes into sleep after the end of
conversion. These modes are discussed in more detail in the
“Timing and Control” section.
A major advantage of the AD7895 is that it provides all of the
above functions in an 8-pin package, either 8-pin mini-DIP or
SOIC. This offers the user considerable spacing saving advantages
over alternative solutions. The AD7895 consumes only 20mW
maximum, making it ideal for battery-powered applications.
Conversion is initiated on the AD7895 by pulsing the CONVST
input. On the falling edge of CONVST, the on-chip track/hold
goes from track to hold mode, and the conversion sequence is
started. The conversion clock for the part is generated internally
using a laser-trimmed clock oscillator circuit. Conversion time
for the AD7895 is 3.8μs in the high sampling mode (9.8 μs for
the auto sleep mode), and the track/hold acquisition time is
0.3μs. To obtain optimum performance from the part, the read
operation should not occur during the conversion or during
300ns prior to the next conversion. This allows the part to
operate at throughput rates up to 192 kHz and achieve data sheet
specifications.
CIRCUIT DESCRIPTION
Analog Input SectionThe AD7895 is offered as three part types: the AD7895-10,
which handles a ±10 V input voltage range; the AD7895-3,
which handles input voltage range ±2.5 V; and the AD7895-2,
which handles a 0V to +2.5V input voltage range.
AGND
VIN
REF INFigure 2.AD7895-10/AD7895-3 Analog Input Structure
Figure 2 shows the analog input section for the AD7895-10 and
AD7895-3. The analog input range of the AD7895-10 is ±10 V
ance stage of the track/hold amplifier. For the AD7895-10,
R1 = 30 kΩ, R2 = 7.5 kΩ and R3 = 10 kΩ. For the AD7895-3,
R1 = R2 = 6.5 kΩ and R3 is open circuit.
For the AD7895-10 and AD7895-3, the designed code transi-
tions occur on successive integer LSB values (i.e., 1 LSB, 2 LSBs,
3 LSBs . . .). Output coding is 2s complement binary with 1 LSB
= FS/4096. The ideal input/output transfer function for the
AD7895-10 and AD7895-3 is shown in Table I.
Table I.Ideal Input/Output Code Table for the AD7895-10/-3
Digital OutputNOTESFSR is full-scale range = 20 V (AD7895-10) and = 5 V (AD7895-3)
with REF IN = +2.5 V.1 LSB = FSR/4096 = 4.883 mV (AD7895-10) and 1.22 mV (AD7895-3)
with REF IN = +2.5 V.
The analog input section for the AD7895-2 contains no biasing
resistors, and the VIN pin drives the input to the track/hold
amplifier directly. The analog input range is 0 V to +2.5 V into
a high impedance stage with an input current of less than
500nA. This input is benign with no dynamic charging cur-
rents. Once again, the designed code transitions occur on succes-
sive integer LSB values. Output coding is straight (natural) binary
with 1 LSB = FS/4096 = 2.5 V/4096 = 0.61 mV. Table II shows
the ideal input/output transfer function for the AD7895-2.
Table II.Ideal Input/Output Code Table for AD7895-2NOTESFSR is full-scale range and is 2.5 V for AD7895-2 with VREF = +2.5 V.1 LSB = FSR/4096 and is 0.61 mV for AD7895-2 with VREF = +2.5 V.
Track/Hold SectionThe track/hold amplifier on the analog input of the AD7895
allows the ADC to accurately convert an input sine wave of full-
scale amplitude to 12-bit accuracy. The input bandwidth of the
