AD7755-AD7755AAN-AD7755AARS Fast Delivery |IC PHOENIX CO.,LIMITED

AD7755AAN ,Energy Metering IC with Pulse Outputspecifications surpass the accuracy requirements500 to 1 as quoted in the IEC1036 standard. See Ana ..
AD7755AARS ,Energy Metering IC with Pulse OutputSpecifications subject to change without notice.(AV = DV = 5 V 5%, AGND = DGND = 0 V, On-Chip Ref ..
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AD775JR ,8-Bit 20 MSPS, 60 mW Sampling A/D Converterapplications, includingtypical DNL of 0.3 LSBs, with a maximum limit of 0.5 LSBs.portable equipment ..
AD775JR ,8-Bit 20 MSPS, 60 mW Sampling A/D ConverterSPECIFICATIONSSignal-to-Noise and Distortion (S/(N + D))f = 1 MHz 47 dBINf = 5 MHz 41 dBINTotal Har ..
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AD7755-AD7755AAN-AD7755AARS
Energy Metering IC with Pulse Output
REV. B
Energy Metering IC
with Pulse Output
FUNCTIONAL BLOCK DIAGRAM
AC/DC
CLKOUT
V1P
V1N
V2PAVDDDVDD
CLKINREFIN/OUTF1F2CFREVPSCFS0S1
RESET
AGNDDGND
V2N
FEATURES
High Accuracy, Supports 50Hz/60 Hz IEC 687/1036
Less than 0.1% Error Over a Dynamic Range of
500 to 1
The AD7755 Supplies Average Real Power on the
Frequency Outputs F1 and F2
The High Frequency Output CF Is Intended for
Calibration and Supplies Instantaneous Real Power
The Logic Output REVP Can Be Used to Indicate a
Potential Miswiring or Negative Power
Direct Drive for Electromechanical Counters and
Two Phase Stepper Motors (F1 and F2)
A PGA in the Current Channel Allows the Use of Small
Values of Shunt and Burden Resistance
Proprietary ADCs and DSP Provide High Accuracy over
Large Variations in Environmental Conditions and
Time
On-Chip Power Supply Monitoring
On-Chip Creep Protection (No Load Threshold)
On-Chip Reference 2.5 V 6 8% (30 ppm/8C Typical)
with External Overdrive Capability
Single 5 V Supply, Low Power (15 mW Typical)
Low Cost CMOS Process
GENERAL DESCRIPTION
The AD7755 is a high accuracy electrical energy measurement
IC. The part specifications surpass the accuracy requirements
as quoted in the IEC1036 standard. See Analog Devices’
Application Note AN-559 for a description of an IEC1036
watt-hour meter reference design.
The only analog circuitry used in the AD7755 is in the ADCs
and reference circuit. All other signal processing (e.g., multipli-
cation and filtering) is carried out in the digital domain. This
approach provides superior stability and accuracy over extremes
in environmental conditions and over time.
The AD7755 supplies average real power information on the
low frequency outputs F1 and F2. These logic outputs may be
used to directly drive an electromechanical counter or interface
to an MCU. The CF logic output gives instantaneous real power
information. This output is intended to be used for calibration
purposes, or interfacing to an MCU.
The AD7755 includes a power supply monitoring circuit on the
AVDD supply pin. The AD7755 will remain in a reset condition
until the supply voltage on AVDD reaches 4V. If the supply falls
below 4V, the AD7755 will also be reset and no pulses will be
issued on F1, F2 and CF.
Internal phase matching circuitry ensures that the voltage and
current channels are phase matched whether the HPF in Chan-
nel 1 is on or off. An internal no-load threshold ensures that the
AD7755 does not exhibit any creep when there is no load.
The AD7755 is available in 24-lead DIP and SSOP packages.
*U.S. Patents 5,745,323, 5,760,617, 5,862,069, 5,872,469.
AD7755–SPECIFICATIONS
(AVDD = DVDD = 5 V � 5%, AGND = DGND = 0 V, On-Chip Reference, CLKIN = 3.58MHz,
TMIN to TMAX = –40�C to +85�C)
ANALOG INPUTS
REFERENCE INPUT
LOGIC INPUTS
LOGIC OUTPUTS
AD7755
NOTESSee Terminology section for explanation of specifications.See Plots in Typical Performance Graphs.Sample tested during initial release and after any redesign or process change that may affect this parameter.
Specifications subject to change without notice.
TIMING CHARACTERISTICS1, 2
NOTESSample tested during initial release and after any redesign or process change that may affect this parameter.See Figure 1.The pulsewidths of F1, F2 and CF are not fixed for higher output frequencies. See Frequency Outputs Section.The CF pulse is always 18 µs in the high frequency mode. See Frequency Outputs section and Table IV.
Specifications subject to change without notice.
ORDERING GUIDE
(AVDD = DVDD = 5 V � 5%, AGND = DGND = 0 V, On-Chip Reference, CLKIN = 3.58 MHz, TMIN to
TMAX = –40�C to +85�C)
Figure 1.Timing Diagram for Frequency Outputs
AD7755
ABSOLUTE MAXIMUM RATINGS*
(TA = +25°C unless otherwise noted)
AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +7V
DVDD to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +7V
DVDD to AVDD . . . . . . . . . . . . . . . . . . . . . . –0.3V to +0.3V
Analog Input Voltage to AGND
V1P, V1N, V2P and V2N . . . . . . . . . . . . . . . –6 V to +6 V
Reference Input Voltage to AGND . . –0.3 V to AVDD + 0.3V
Digital Input Voltage to DGND . . . –0.3 V to DVDD + 0.3 V
Digital Output Voltage to DGND . . –0.3 V to DVDD + 0.3 V
Operating Temperature Range
Industrial (A, B Versions) . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7755 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
24-Lead Plastic DIP, Power Dissipation . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 105°C/W
Lead Temperature, (Soldering 10 sec) . . . . . . . . . . . .260°C
24-Lead SSOP, Power Dissipation . . . . . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 112°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . .220°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
TERMINOLOGY
MEASUREMENT ERROR
The error associated with the energy measurement made by the
AD7755 is defined by the following formula:
PHASE ERROR BETWEEN CHANNELS
The HPF (High Pass Filter) in Channel 1 has a phase lead
response. To offset this phase response and equalize the phase
response between channels, a phase correction network is also
placed in Channel 1. The phase correction network matches the
phase to within ±0.1° over a range of 45 Hz to 65 Hz and ±0.2°
over a range 40 Hz to 1 kHz. See Figures 22 and 23.
POWER SUPPLY REJECTION
This quantifies the AD7755 measurement error as a percentage
of reading when the power supplies are varied.
For the ac PSR measurement a reading at nominal supplies
(5 V) is taken. A 200 mV rms/100 Hz signal is then introduced
onto the supplies and a second reading obtained under the same
input signal levels. Any error introduced is expressed as a per-
centage of reading—see Measurement Error definition.
For the dc PSR measurement a reading at nominal supplies
(5 V) is taken. The supplies are then varied ±5% and a second
reading is obtained with the same input signal levels. Any error
introduced is again expressed as a percentage of reading.
ADC OFFSET ERROR
This refers to the dc offset associated with the analog inputs to
the ADCs. It means that with the analog inputs connected to
AGND, the ADCs still see a small dc signal (offset). The offset
decreases with increasing gain in channel V1. This specification
is measured at a gain of 1. At a gain of 16, the dc offset is typi-
cally less than 1 mV. However, when the HPF is switched on,
the offset is removed from the current channel and the power
calculation is not affected by this offset.
GAIN ERROR
The gain error of the AD7755 is defined as the difference between
the measured output frequency (minus the offset) and the ideal
output frequency. It is measured with a gain of 1 in channel V1.
The difference is expressed as a percentage of the ideal frequency.
The ideal frequency is obtained from the AD7755 transfer func-
tion—see Transfer Function section.
GAIN ERROR MATCH
The gain error match is defined as the gain error (minus the
offset) obtained when switching between a gain of 1 and a
gain of 2, 8, or 16. It is expressed as a percentage of the out-
put frequency obtained under a gain of 1. This gives the gain
error observed when the gain selection is changed from 1 to 2,
8 or 16.
PIN FUNCTION DESCRIPTIONS
3AVDD
7, 8
AD7755
PIN CONFIGURATION
DIP and SSOP Packages
Amps
% ERROR
0.510100
Figure 2.Error as a % of Reading (Gain = 1)
Amps
% ERROR
0.510100
Figure 3.Error as a % of Reading (Gain = 2)
Amps
% ERROR
0.610100
Figure 4.Error as a % of Reading (Gain = 8)
Figure 5.Error as a % of Reading (Gain = 16)
Amps
% ERROR
0.610100
Figure 6.Error as a % of Reading (Gain = 1)
Figure 7.Error as a % of Reading (Gain = 2)
AD7755
Amps
% ERROR
–0.2
Figure 8.Error as a % of Reading (Gain = 8)
Amps
% ERROR
–1.0
Figure 9.Error as a % of Reading (Gain = 16)
Amps
% ERROR
0.3
Figure 10.Error as a % of Reading over Temperature with
Amps
% ERROR
0.410100
Figure 11.Error as a % of Reading over Temperature with
an External Reference (Gain = 16)
FREQUENCY – Hz
% ERROR
–0.6505560657075
Figure 12.Error as a % of Reading over Frequency
Figure 13.Test Circuit for Performance Curves

Partno	Mfg	Dc	Qty	Available	Descript
AD7755	AD	N/a	100	avai	Energy Metering IC with Pulse Output
AD7755AAN	AD	N/a	2530	avai	Energy Metering IC with Pulse Output
AD7755AARS	AD	N/a	2000	avai	Energy Metering IC with Pulse Output