AD7751AARS ,Energy Metering IC With On-Chip Fault DetectionSPECIFICATIONSMIN MAXParameter A Version B Version Unit Test Conditions/Comments3ACCURACY1Measureme ..
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AD7751AAN-AD7751AARS
Energy Metering IC With On-Chip Fault Detection
Energy Metering IC
With On-Chip Fault Detection
FEATURES
High Accuracy, Supports 50 Hz/60 Hz IEC 687/1036
Less than 0.1% Error Over a Dynamic Range of 500 to 1
Supplies Average Real Power on the Frequency
Outputs F1 and F2
High-Frequency Output CF Is Intended for Calibration
and Supplies Instantaneous Real Power
Continuous Monitoring of the Phase and Neutral
Current Allows Fault Detection in Two-Wire
Distribution Systems
AD7751 Uses the Larger of the Two Currents (Phase
or Neutral) to Bill—Even During a Fault Condition
Two Logic Outputs (FAULT and REVP) Can be Used to
Indicate a Potential Miswiring or Fault Condition
Direct Drive for Electromechanical Counters and
Two-Phase Stepper Motors (F1 and F2)
A PGA in the Current Channel Allows the Use of Small
Values of Shunt and Burden Resistance
Proprietary ADCs and DSP Provide High Accuracy Over
Large Variations in Environmental Conditions and Time
On-Chip Power Supply Monitoring
On-Chip Creep Protection (No Load Threshold)
On-Chip Reference 2.5 V � 8% (30 ppm/�C Typical)
with External Overdrive Capability
Single 5 V Supply, Low Power (15 mW Typical)
Low-Cost CMOS Process
GENERAL DESCRIPTIONThe AD7751 is a high-accuracy fault-tolerant electrical energy
measurement IC that is intended for use with 2-wire distribution
systems. The part specifications surpass the accuracy require-
ments as quoted in the IEC1036 standard.
FUNCTIONAL BLOCK DIAGRAM*US Patent 5,745,323; 5,760,617; 5,862,069; 5,872,469.
The only analog circuitry used in the AD7751 is in the ADCs
and reference circuit. All other signal processing (e.g., multipli-
cation and filtering) is carried out in the digital domain. This
approach provides superior stability and accuracy over extremes
in environmental conditions and over time.
The AD7751 incorporates a novel fault detection scheme that
warns of fault conditions and allows the AD7751 to continue
accurate billing during a fault event. The AD7751 does this
by continuously monitoring both the phase and neutral (re-
turn) currents. A fault is indicated when these currents differ by
more than 12.5%. Billing is continued using the larger of the
two currents.
The AD7751 supplies average real power information on the
low-frequency outputs F1 and F2. These logic outputs may be
used to directly drive an electromechanical counter or interface
to an MCU. The CF logic output gives instantaneous real power
information. This output is intended to be used for calibration
purposes.
The AD7751 includes a power supply monitoring circuit on the
AVDD supply pin. The AD7751 will remain in a reset condition
until the supply voltage on AVDD reaches 4 V. If the supply falls
below 4 V, the AD7751 will also be reset and no pulses will be
issued on F1, F2, and CF.
Internal phase matching circuitry ensures that the voltage and
current channels are matched whether the HPF in Channel 1 is
on or off. The AD7751 also has anticreep protection.
The AD7751 is available in 24-lead DIP and SSOP packages.
AD7751–SPECIFICATIONS1, 2(AVDD = DVDD = 5 V � 5%, AGND = DGND = 0 V, On-Chip Reference, CLKIN =
3.58MHz, TMIN to TMAX = –40�C to +85�C)FAULT DETECTION
REFERENCE INPUT
AD7751NOTESSee Terminology section for explanation of specifications.See plots in Typical Performance Characteristics graphs.See Fault Detection section of data sheet for explanation of fault detection functionality.Sample tested during initial release and after any redesign or process change that may affect this parameter.
Specifications subject to change without notice.
TIMING CHARACTERISTICS1, 2NOTESSample tested during initial release and after any redesign or process change that may affect this parameter.See Figure 1.The pulsewidths of F1, F2 and CF are not fixed for higher output frequencies. See Frequency Outputs section.
Specifications subject to change without notice.
Figure 1.Timing Diagram for Frequency Outputs
(AVDD = DVDD = 5 V � 5%, AGND = DGND = 0 V, On-Chip Reference, CLKIN = 3.58 MHz,
TMIN to TMAX = –40�C to +85�C)
ORDERING GUIDE
AD7751
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD7751 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS*(TA = 25°C unless otherwise noted)
AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +7V
DVDD to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +7V
DVDD to AVDD . . . . . . . . . . . . . . . . . . . . . . –0.3V to +0.3V
Analog Input Voltage to AGND
V1A, V1B, V1N, V2P, and V2N . . . . . . . . . . –6 V to +6 V
Reference Input Voltage to AGND . .–0.3 V to AVDD + 0.3V
Digital Input Voltage to DGND . . . .–0.3 V to DVDD + 0.3 V
Digital Output Voltage to DGND . . .–0.3 V to DVDD + 0.3 V
Operating Temperature Range
Industrial (A, B Versions) . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
24-Lead Plastic DIP, Power Dissipation . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 105°C/W
Lead Temperature, (Soldering 10 sec) . . . . . . . . . . . 260°C
24-Lead SSOP, Power Dissipation . . . . . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 112°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
TERMINOLOGY
MEASUREMENT ERRORThe error associated with the energy measurement made by the
AD7751 is defined by the following formula:
Percentage Error =
PHASE ERROR BETWEEN CHANNELSThe HPF (High-Pass Filter) in Channel 1 has a phase lead
response. To offset this phase response and equalize the phase
response between channels a phase correction network is also
placed in Channel 1. The phase correction network matches the
phase to within ±0.1° over a range of 45 Hz to 65 Hz and ±0.2°
over a range 40 Hz to 1 kHz (see Figures 10 and 11).
ADC OFFSET ERRORThis refers to the dc offset associated with the analog inputs to
the ADCs. It means that with the analog inputs connected to
AGND the ADCs still see an analog input signal of 1 mV to
10 mV. However, when the HPF is switched on the offset is
removed from the current channel and the power calculation is
not affected by this offset.
POWER SUPPLY REJECTIONThis quantifies the AD7751 measurement error as a percentage
of reading when the power supplies are varied.
For the ac PSR measurement a reading at nominal supplies
(5 V) is taken. A 200 mV rms/100 Hz signal is then introduced
onto the supplies and a second reading obtained under the same
input signal levels. Any error introduced is expressed as a per-
centage of reading—see Measurement Error definition.
For the dc PSR measurement a reading at nominal supplies
(5 V) is taken. The supplies are then varied ±5% and a second
reading is obtained with the same input signal levels. Any error
introduced is again expressed as a percentage of reading.
GAIN ERRORThe gain error of the AD7751 is defined as the difference between
the measured output frequency (minus the offset) and the ideal
output frequency. It is measured with a gain of 1 in Channel
V1A. The difference is expressed as a percentage of the ideal
frequency. The ideal frequency is obtained from the transfer
function—see Transfer Function section.
GAIN ERROR MATCHThe gain error match is defined as the gain error (minus the
offset) obtained when switching between a gain of 1 and a gain
of 2, 8, or 16. It is expressed as a percentage of the output
frequency obtained under a gain of 1. This gives the gain
error observed when the gain selection is changed from
1 to 2, 8, or 16.
PIN FUNCTION DESCRIPTIONS3AVDD
AD7751
PIN CONFIGURATION
DIP and SSOP Packages
AMPS
ERROR – %
0.50TPC 1.Error as a % of Reading (Gain = 1)
AMPS
ERROR
–0.05TPC 2.Error as a % of Reading (Gain = 2)
AMPS
ERROR
100TPC 3.Error as a % of Reading (Gain = 8)
AMPS
ERROR
100TPC 4.Error as a % of Reading (Gain = 16)
AMPS
ERROR
100TPC 5.Error as a % of Reading (PF = 0.5, Gain = 1)
AMPS
ERROR
–0.30TPC 6.Error as a % of Reading (PF = 0.5, Gain = 2)
AD7751
AMPS
ERROR
–0.60TPC 7.Error as a % of Reading (PF = 0.5, Gain = 8)
AMPS
ERROR
0.00TPC 8.Error as a % of Reading (PF = 0.5, Gain = 16)
AMPS
ERROR
–0.30TPC 9.Error as a % of Reading Over Temperature With
an External Reference (Gain = 2)
AMPS
ERROR
100TPC 10.Error as a % of Reading Over Temperature With
an External Reference (Gain = 8)
AMPS
ERROR
100TPC 11.Error as a % of Reading Over Temperature With
an External Reference (Gain = 16)
