AD7740YRT-REEL Fast Delivery |IC PHOENIX CO.,LIMITED

AD7740YRT-REEL ,3 V/5 V Low Power, Synchronous Voltage-to-Frequency ConverterCHARACTERISTICS (VDD = 3.0 V to 3.6 V, 4.75 V to 5.25 V, GND = O V, REFIN = 2.5 V)Limit at T , T Li ..
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AD7740YRT-REEL
3 V/5 V Low Power, Synchronous Voltage-to-Frequency Converter
FUNCTIONAL BLOCK DIAGRAM
REV. A
FEATURES
Synchronous Operation
Full-Scale Frequency Set by External System Clock
8-Lead SOT-23 and 8-Lead microSOIC Packages
3 V or 5 V Operation
Low Power: 3 mW (Typ)
Nominal Input Range: 0 to VREF
True –150 mV Capability Without Charge Pump
VREF Range: 2.5 V to VDD
Internal 2.5 V Reference
1 MHz Max Input Frequency
Selectable High Impedance Buffered Input
Minimal External Components Required
APPLICATIONS
Isolation of High Common-Mode Voltages
Low-Cost Analog-to-Digital Conversion
Battery Monitoring
Automotive Sensing
GENERAL DESCRIPTION
The AD7740 is a low-cost, ultrasmall synchronous Voltage-to-
Frequency Converter (VFC). It works from a single 3.0 V to
3.6 V or 4.75 V to 5.25 V supply consuming 0.9 mA. The AD7740
is available in an 8-lead SOT-23 and also in an 8-lead microSOIC
package. Small package, low cost and ease of use were major
design goals for this product. The part contains an on-chip 2.5 V
bandgap reference but the user may overdrive this using an
external reference. This external reference range includes VDD.
The full-scale output frequency is synchronous with the clock
signal on the CLKIN pin. This clock can be generated with the
addition of an external crystal (or resonator) or supplied from a
CMOS-compatible clock source. The part has a maximum
input frequency of 1 MHz.
For an analog input signal that goes from 0 V to VREF, the out-
put frequency goes from 10% to 90% of fCLKIN. In buffered mode,
the part provides a very high input impedance and accepts a
range of 0.1 V to VDD – 0.2 V on the VIN pin. There is also
an unbuffered mode of operation that allows VIN to go from
–0.15 V to VDD + 0.15 V. The modes are interchangeable using
the BUF pin.
The AD7740 (Y Grade) is guaranteed over the automotive
temperature range of –40°C to +105°C. The AD7740 (K Grade)
is guaranteed from 0°C to 85°C.
PRODUCT HIGHLIGHTSThe AD7740 is a single channel, single-ended VFC. It is
available in 8-lead SOT-23 and 8-lead microSOIC packages,
and is intended for low-cost applications. The AD7740 offers
considerable space saving over alternative solutions.The AD7740 operates from a single 3.0 V to 3.6 V or 4.75 V
to 5.25 V supply and consumes typically 0.9 mA when the
input is unbuffered. It also contains an automatic power-down
function.
3. The AD7740 does not require external resistors and capaci-
tors to set the output frequency. The maximum output
frequency is set by a crystal or a clock. No trimming or cali-
bration is required.
4. The analog input can be taken to 150 mV below GND for
true bipolar operation.
5. The speciﬁed voltage reference range on REFIN is from
2.5 V to the supply voltage, VDD.
3 V/5 V Low Power, Synchronous
Voltage-to-Frequency Converter
*Protected under U.S. Patent # 6,147,528.
AD7740 SPECIFICATIONS
ANALOG INPUT, VIN
REFERENCE VOLTAGE
FOUT OUTPUT
LOGIC OUTPUTS (FOUT, CLKOUT)
NOTESTemperature range: K Version, 0°C to +85°C; Y Version, –40°C to +105°C; typical speciﬁcations are at 25°C.See Terminology.Guaranteed by design and characterization, not production tested.Span = Max output frequency–Min output frequency.Because this pin is bidirectional, any external reference must be capable of sinking/sourcing 400 µA in order to overdrive the internal reference.
(VDD = 3.0 V to 3.6 V, 4.75 V to 5.25 V, GND = 0 V, REFIN = 2.5 V; CLKIN = 1 MHz; All
specifications TMIN to TMAX unless otherwise noted.)
(VDD = 3.0 V to 3.6 V, 4.75 V to 5.25 V, GND = O V, REFIN = 2.5V)
tHIGH:tLOW
NOTESGuaranteed by design and characterization, not production tested.All input signals are speciﬁed with tr = tf = 5 ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2.See Figure 1.
Speciﬁcations subject to change without notice.
Figure 1.Timing Diagram
TIMING CHARACTERISTICS1, 2, 3
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +7 V
Analog Input Voltage to GND . . . . . . . . –0.3V to VDD + 0.3 V
Reference Input Voltage to GND . . . . . –0.3 V to VDD + 0.3 V
Logic Input Voltage to GND . . . . . . . . –0.3 V to VDD + 0.3 V
FOUT Voltage to GND . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Operating Temperature Range
Commercial (K Version) . . . . . . . . . . . . . . . . 0°C to +85°C
Automotive (Y Version) . . . . . . . . . . . . . . –40°C to +105°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature (TJ Max) . . . . . . . . . . . . . . . . . . 150°C
SOT-23 Package
Power Dissipation . . . . . . . . . . . . . . . . . . (TJ Max – TA)/θJA
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 240°C/W
Lead Temperature (10 secs) . . . . . . . . . . . . . . . . . . 300°C
Reflow Soldering
Peak Temperature . . . . . . . . . . . . . . . . . . . . 220 + 5/0°C
Time at Peak Temperature . . . . . . . . . . . . 10 sec to 40 sec
microSOIC Package
Power Dissipation . . . . . . . . . . . . . . . . . (TJ Max – TA)/θJA
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W
θJC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44°C/W
Lead Temperature (10 secs) . . . . . . . . . . . . . . . . . . . 300°C
Reflow Soldering
Peak Temperature . . . . . . . . . . . . . . . . . . . . . . 220 +5/0°C
Time at Peak Temperature . . . . . . . . . . . . . 10 sec to 40 sec
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this speciﬁcation is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD7740 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
PIN FUNCTION DESCRIPTIONS
8-LEAD microSOIC PIN NUMBERS*
*Note that the SOT-23 and microSOIC packages have different pinouts.
ORDERING GUIDE
PIN CONFIGURATIONS
8-Lead microSOIC
8-Lead SOT-23
AD7740
TERMINOLOGY
INTEGRAL NONLINEARITY
For the VFC, Integral Nonlinearity (INL) is a measure of the maxi-
mum deviation from a straight line passing through the actual
endpoints of the VFC transfer function. The error is expressed in
% of the actual frequency span:
Frequency Span = FOUT(max) – FOUT(min)
OFFSET ERROR
Ideally, the output frequency for 0 V input voltage is 10% of
fCLKIN in unbuffered mode. The deviation from this value referred
to the input is the offset error at BUF = 0. In buffered mode the
minimum output frequency (corresponding to 0.10 V minimum
input voltage) is 13.2% of fCLKIN at VREF = 2.5 V. The deviation
from this value referred to the input is the offset error at BUF = 1.
Offset error is expressed in mV.
GAIN ERROR
This is a measure of the span error of the VFC. The gain is the
scale factor that relates the input VIN to the output FOUT.
The gain error is the deviation in slope of the actual VFC transfer
characteristic from the ideal expressed as a percentage of the full-
scale span. See Figure 2.
OFFSET ERROR DRIFT
This is a measure of the change in Offset Error with changes in
temperature. It is expressed in µV/°C.
GAIN ERROR DRIFT
This is a measure of the change in Gain Error with changes in
temperature. It is expressed in (ppm of span)/°C.
POWER SUPPLY REJECTION RATIO (PSRR)
This indicates how the apparent input voltage of the VFC is
affected by changes in the supply voltage. The input voltage is
kept constant at 2 V, VREF is 2.5 V and the VDD supply is varied
�10% at 3.3 V and ±5% at 5 V. The ratio of the apparent change
in input voltage to the change in VDD is measured in dBs.
Figure 2.Offset and Gain
TPC 1.INL vs. VIN (Buffered and
Unbuffered)
VDD – V
OFFSET ERROR
mV03645
GAIN ERROR
% Span
TPC 4.Offset and Gain Error vs. VDD
VDD – V
REFOUT
4.04.55.0
TPC 7.REFOUT vs. VDD
CLKIN FREQUENCY – kHz
OFFSET ERROR
mV02001000400
600800
TPC 2.Offset Error vs. CLKIN
(Buffered and Unbuffered)
VIN – V
PSRR
dB
–70
TPC 5.PSRR vs. VIN (Buffered and
Unbuffered)
TPC 8.Typical FOUT Pulse Train
(VIN = VREF/4)
CLKIN FREQUENCY – kHz
GAIN ERROR
% Span
TPC 3.Gain Error vs. CLKIN
(Buffered and Unbuffered)
CLKIN FREQUENCY – kHz
IDD
mA0200
1.25
TPC 6.IDD vs. CLKIN (Buffered and
Unbuffered)
AD7740–Typical Performance Characteristics

Partno	Mfg	Dc	Qty	Available	Descript
AD7740YRT-REEL \|AD7740YRTREEL	AD	N/a	9000	avai	3 V/5 V Low Power, Synchronous Voltage-to-Frequency Converter