AD767JN ,Microprocessor-Compatible 12-Bit D/A Converterspecifications are 100% tested at +25°C, and guaranteed but not tested over the full temperature ra ..
AD767JNZ , Microprocessor-Compatible 12-Bit D/A Converter
AD767JP ,Microprocessor-Compatible 12-Bit D/A Converterspecifications shown for information only. Consult Analog Devices Military Databook or contact fact ..
AD767KN ,Microprocessor-Compatible 12-Bit D/A ConverterFEATURESFUNCTIONAL BLOCK DIAGRAMComplete 12-Bit D/A FunctionOn-Chip Output AmplifierHigh Stability ..
AD767KP ,Microprocessor-Compatible 12-Bit D/A Converterspecifications.±1/2 LSB maximum linearity error and guaranteed monotonicityover the full temperatur ..
AD767SD/883B ,Microprocessor-Compatible 12-Bit D/A Converterspecifications are guaranteed, although only those shown in boldface are tested on all production u ..
ADM1014JRU ,Dual PCI Hot-PlugTM ControllerSpecifications are for each channel, 3.3VAUX=AUXINA=3.3V, V = 12VIN = +12V, -12VIN = -12V, Nominal ..
ADM101E ,Craft Port Tiny RS-232 Transceiver to Portable ApplicationsSpecifications subject to change without notice.ABSOLUTE MAXIMUM RATINGS* ORDERING GUIDE(T = 25°C u ..
ADM101EARM ,Craft PortTM Tiny RS-232 Transceiver for Portable ApplicationsSpecifications subject to change without notice.ABSOLUTE MAXIMUM RATINGS* ORDERING GUIDE(T = +25
AD767AD-AD767BD-AD767JN-AD767JP-AD767KN-AD767KP-AD767SD/883B
Microprocessor-Compatible 12-Bit D/A Converter
FUNCTIONAL BLOCK DIAGRAMREV.A
Microprocessor-Compatible
12-Bit D/A Converter
PRODUCT DESCRIPTIONThe AD767 is a complete voltage output 12-bit digital-to-
analog converter including a high stability buried Zener
reference and input latch on a single chip. The converter uses
12 precision high-speed bipolar current steering switches and a
laser-trimmed thin-film resistor network to provide high accuracy.
Microprocessor compatibility is achieved by the on-chip latch.
The design of the input latch allows direct interface to 12-bit
buses. The latch responds to strobe pulses as short as 40 ns,
allowing use with the fastest available microprocessors.
The functional completeness and high performance of the
AD767 result from a combination of advanced switch design,
high-speed bipolar manufacturing process, and the proven laser
wafer-trimming (LWT) technology.
The subsurface (buried) Zener diode on the chip provides a
low-noise voltage reference which has long-term stability and
temperature drift characteristics comparable to the best discrete
reference diodes. The laser trimming process which provides the
excellent linearity is also used to trim the absolute value of the
reference as well as its temperature coefficient. The AD767 is
thus well suited for wide temperature range performance with1/2 LSB maximum linearity error and guaranteed monotonicity
over the full temperature range. Typical full-scale gain T.C. is
5 ppm/°C.
*Protected by Patent Numbers 3,803,590; 3,890,611; 3,932,863; 3,978,473;
4,020,486; and others pending.
FEATURES
Complete 12-Bit D/A Function
On-Chip Output Amplifier
High Stability Buried Zener Reference
Fast 40 ns Write Pulse
0.3" Skinny DIP and PLCC Packages
Single Chip Construction
Monotonicity Guaranteed Over Temperature
Settling Time: 3 ms max to 1/2 LSB
Guaranteed for Operation with 612 V or 615 V Supplies
TTL/5 V CMOS Compatible Logic Inputs
MIL-STD-883 Compliant Versions Available
PRODUCT HIGHLIGHTSThe AD767 is a complete voltage output DAC with voltage
reference and digital latches on a single IC chip.The input latch responds to write pulse widths as short as
40 ns assuring direct interface with the industry’s fastest
microprocessors.The internal buried Zener reference is laser-trimmed to
10.00 volts with a ±1% maximum error. The reference
voltage is also available for external application.The gain setting and bipolar offset resistors are matched to
the internal ladder network to guarantee a low gain temperature
coefficient and are laser trimmed for minimum full-scale and
bipolar offset errors.The precision high-speed current steering switches and
on-board high-speed output amplifier settle within 1/2 LSB
for a 10 V full-scale transition in 3.0 μs when properly
compensated.The AD767 is available in versions compliant with
MIL-STD-883. Refer to the Analog Devices Military
Products Databook or current AD767/883B data sheet for
detailed specifications.
AD767–SPECIFICATIONS(TA = +258C, 615 volt power supplies, Unipolar Mode, unless otherwise noted.)NOTESAD767 “S” specifications shown for information only. Consult Analog Devices Military Databook or contact factory for a controlled specification sheet.AD767A Chips specifications are tested at +25°C and, when in boldface, at +85°C. They are typical at –25°C.The digital input specifications are 100% tested at +25°C, and guaranteed but not tested over the full temperature range.Adjustable to zero.FSR means “Full-Scale Range” and is 20 V for ±10 V range and 10 V for the ±5 V range.
6A minimum power supply of ±12.5 V is required for a ±10 V full-scale output and ±11.4 V is required for all other voltage ranges.
ABSOLUTE MAXIMUM RATINGS*VCC to Power Ground . . . . . . . . . . . . . . . . . . . . .0 V to +18 V
VEE to Power Ground . . . . . . . . . . . . . . . . . . . . .0 V to –18 V
Digital Inputs (Pins 11, 13–24)
to Power Ground . . . . . . . . . . . . . . . . . . . .–1.0 V to +7.0 V
Ref In to Reference Ground . . . . . . . . . . . . . . . . . . . . . .±12 V
Bipolar Offset to Reference Ground . . . . . . . . . . . . . . . .±12 V
10 V Span R to Reference Ground . . . . . . . . . . . . . . . . .±12 V
20 V Span R to Reference Ground . . . . . . . . . . . . . . . . .±24 V
Ref Out, VOUT (Pins 6, 9) . . .Indefinite short to power ground
Momentary Short to VCC
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . .1000 mW
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
TIMING SPECIFICATIONS(All Models, TA = 25°C, VCC = +12 V or +15 V,
VEE = –12 V or –15 V)
*tSETT is measured referenced to the leading edge of tCS. If tCS > tDS, then
tSETT is measured referenced to the beginning of Data Valid.
PIN CONFIGURATION
PLCCDIP
ORDERING GUIDE
AD767
THE AD767 OFFERS TRUE 12-BIT PERFORMANCE
OVER THE FULL TEMPERATURE RANGELINEARITY ERROR: Analog Devices defines linearity error as
the maximum deviation of the actual, adjusted DAC output
from the ideal analog output (a straight line drawn from 0 to
F.S. – 1 LSB) for any bit combination. This is also referred to as
relative accuracy. The AD767 is laser trimmed to typically
maintain linearity errors at less than ±1/8 LSB for the K and B
versions and ±1/2 LSB for the J, A and S versions. Linearity
over temperature is also held to ±1/2 LSB (K/B) or ±1 LSB
(J/A/S).
MONOTONICITY: A DAC is said to be monotonic if the
output either increases or remains constant for increasing digital
inputs such that the output will always be a nondecreasing
function of input. All versions of the AD767 are monotonic over
their full operating temperature range.
DIFFERENTIAL NONLINEARITY: Monotonic behavior
requires that the differential linearity error be less than 1 LSB
both at +25°C as well as over the temperature range of interest.
Differential nonlinearity is the measure of the variation in analog
value, normalized to full scale, associated with a 1 LSB change
in digital input code. For example, for a 10 volt full-scale
output, a change of 1 LSB in digital input code should result in
a 2.44 mV change in the analog output (1 LSB = 10 V 3
1/4096 = 2.44 mV). If in actual use, however, a 1 LSB change
in the input code results in a change of only 0.61 mV (1/4 LSB)
in analog output, the differential nonlinearity error would be
–1.83 mV, or –3/4 LSB.
GAIN ERROR: DAC gain error is a measure of the difference
between an ideal DAC and the actual device’s output span. All
grades of the AD767 have a maximum gain error of 0.2% FS.
However, if this is not sufficient, the error can easily be adjusted
to zero (see Figures 2 and 3).
UNIPOLAR OFFSET ERROR: Unipolar offset error is a
combination of the offset errors of the voltage-mode DAC and
the output amplifier and is measured when the AD767 is
configured for unipolar outputs. It is present for all codes and is
measured with all “0s” in the DAC latches. This is easily
adjustable to zero when required.
BIPOLAR ZERO ERROR: Bipolar zero errors result from
errors produced by the DAC and output amplifier when the
AD767 is configured for bipolar output. Again, as with unipolar
offset and gain errors, this is easily adjusted to zero when
required.
ANALOG CIRCUIT CONNECTIONSInternal scaling resistors provided in the AD767 may be connected
to produce bipolar output voltage ranges of ±10, ±5 or ±2.5 V
or unipolar output voltage ranges of 0 to +5 V or 0 to +10 V.
Gain and offset drift are minimized in the AD767 because of the
thermal tracking of the scaling resistors with other device
components. Connections for various output voltage ranges are
shown in Table I.
Figure 1.Output Amplifier Voltage Range Scaling Circuit
UNIPOLAR CONFIGURATION (Figure 2)This configuration will provide a unipolar 0 to +10 volt output
range. In this mode, the bipolar offset terminal, Pin 4, should be
grounded if not used for trimming.
STEP I … ZERO ADJUST
Turn all bits OFF and adjust zero trimmer R1, until the output
reads 0.000 volts (1 LSB = 2.44 mV). In most cases this trim is
not needed, and Pin 4 should be connected to Pin 5.
STEP II … GAIN ADJUST
Turn all bits ON and adjust 100 Ω gain trimmer R2 until the
output is 9.9976 volts. (Full scale is adjusted to 1 LSB less than
nominal full scale of 10.000 volts.)
Figure 2.0 to +10 V Unipolar Voltage Output
Table I. Output Voltage Range Connections
BIPOLAR CONFIGURATION (Figure 3)This configuration will provide a bipolar output voltage from
–5.000 to +4.9976 volts, with positive full scale occurring with
all bits ON (all 1s).
STEP I … OFFSET ADJUST
Turn OFF all bits. Adjust 100 Ω trimmer R1 to give –5.000
volts output.
STEP II … GAIN ADJUST
Turn ON all bits. Adjust 100 Ω gain trimmer R2 to give a
reading of +4.9976 volts.
STEP III … BIPOLAR ZERO ADJUST (Optional)
In applications where an accurate zero output is required, set
the MSB ON, all other bits OFF, and readjust R1 for zero volts
output.
Figure 3.±5 V Bipolar Voltage Output
INTERNAL/EXTERNAL REFERENCE USEThe AD767 has an internal low-noise buried Zener diode
reference which is trimmed for absolute accuracy and tempera-
ture coefficient. This reference is buffered and optimized for use
in a high-speed DAC and will give long-term stability equal or
superior to the best discrete Zener reference diodes. The per-
formance of the AD767 is specified with the internal reference
driving the DAC since all trimming and testing (especially for
full-scale error and bipolar offset) is done in this configuration.
The internal reference has sufficient buffering to drive external
circuitry in addition to the reference currents required for the
DAC (typically 0.5 mA to Ref In and 1.0 mA to Bipolar Offset).
A minimum of 0.1 mA is available for driving external loads.
The AD767 reference output should be buffered with an
external op amp if it is required to supply more than 0.1 mA
output current. The reference is typically trimmed to ±0.2%,
then tested and guaranteed to ±1.0% max error. The
temperature coefficient is comparable to that of the full-scale
TC for a particular grade.
If an external reference is used (10.000 V, for example),
additional trim range must be provided, since the internal
reference has a tolerance of ±1%, and the AD767 full-scale and
bipolar offset are both trimmed with the internal reference. The
gain and offset trim resistors give about ±0.25% adjustment
range, which is sufficient for the AD767 when used with the
internal reference.
It is also possible to use external references other than 10 volts.
The recommended range of reference voltage is from +8 to
+10.5 volts, which allows both 8.192 V and 10.24 V ranges to
be used. The AD767 is optimized for fixed-reference applications.
If the reference voltage is expected to vary over a wide range in
a particular application, a CMOS multiplying DAC is a better
choice.
Reduced values of reference voltage will also permit the ±12 volt
±5% power supply requirement to be relaxed to ±12 volts
±10%.
It is not recommended that the AD767 be used with external
feedback resistors to modify the scale factor. The internal
resistors are trimmed to ratio-match and temperature-track the
other resistors on the chip, even though their absolute tolerances
are ±20%, and absolute temperature coefficients are approximately
–50 ppm/°C. If external resistors are used, a wide trim range
(±20%) will be needed and temperature drift will be increased
to reflect the mismatch between the temperature coefficients of
the internal and external resistors.
Small resistors may be added to the feedback resistors in order
to accomplish small modifications in the scaling. For example, if
a 10.24 V full scale is desired, a 140 Ω 1% low-TC metal-film
resistor can be added in series with the internal (nominal) 5k
feedback resistor, and the gain trim potentiometer (between
Pins 6 and 7) should be increased to 200 Ω. In the bipolar
mode, increase the value of the bipolar offset trim potentiometer
also to 200 Ω.
AD767
USING THE AD767 WITH THE AD588 HIGH PRECISION
VOLTAGE REFERENCEThe AD767 is specified for gain drift from 15 ppm/°C to
30 ppm/°C (depending on grade) using its internal 10 volt
reference. Since the internal reference contributes the majority
of this drift, an external high-precision voltage reference will
greatly improve performance over temperature. As shown in
Figure 4, the 10 volt output from the AD588 is used as the
reference. With a 1.5 ppm/°C output voltage drift the AD588
contributes less than 1/2 LSB gain drift when used with the
AD767 over the industrial temperature range. Using this
combination may result in apparent increases in full-scale error
due to the differences between the internal reference by which
the device is laser trimmed and the external reference with
which the device is actually applied. The AD767 internal
reference is specified to be 10 volts ±100 mV whereas the
AD588 is specified as 10 volts ±1 mV. This may result in up to
101 mV of apparent full-scale error beyond the ±25 mV
specified AD767 gain error. The 500 Ω potentiometer in series
with the reference input allows adequate trim range to null this
error.
GROUNDING RULESThe AD767 brings out separate analog and power grounds to
allow optimum connections for low noise and high-speed
performance. These grounds should be tied together at one
point, usually the device power ground. The separate ground
returns are provided to minimize current flow in low-level signal
paths.
The analog ground at Pin 5 is the ground point for the output
amplifier and is thus the “high quality” ground for the AD767;
it should be connected directly to the analog reference point of
the system. The power ground at Pin 12 can be connected to
the most convenient ground point; analog power return is
preferred. If power ground contains high frequency noise
beyond 200 mV, this noise may feed through the converter, thus
some caution will be required in applying these grounds.
It is also important to apply decoupling capacitors properly on
the power supplies for the AD767. The correct method for
decoupling is to connect a capacitor from each power supply pin
of the AD767 to the analog ground pin of the AD767. Any load
driven by the output amplifier should also be referred to the
analog ground pin.
OPTIMIZING SETTLING TIMEThe dynamic performance of the AD767’s output amplifier can
be optimized by adding a small (20 pF) capacitor across the
feedback resistor. Figure 5 shows the improvement in both
large-signal and small-signal settling for the 10 V range. In
Figure 5a, the top trace shows the data inputs (DB11–DB0 tied
together), the second trace shows the CS pulse, and the lower
two traces show the analog outputs for CF = 0 and 20 pF
respectively.
Figure 5a.Large Scale Settling
Figures 5b and 5c show the settling time for the transition from
all bits on to all bits off. Note that the settling time to ±1/2 LSB
for the 10 V step is improved from 2.4 microseconds to 1.6
microseconds by the addition of the 20 pF capacitor.
Figure 5b.Fine-Scale Settling, CF = 0 pF
Figure 5c.Fine-Scale Settling, CF = 20 pF
Figures 5d and 5e show the settling time for the transition from
all bits off to all bits on. The improvement in settling time
gained by adding CC = 20 pF is similar.
