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AD7677AST
16-Bit, 1 LSB INL, 1 MSPS Differential ADC
REV.0
16-Bit, 1 LSB INL, 1 MSPS
Differential ADC
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Throughput: 1 MSPS
INL: �1 LSB Max (�0.0015% of Full-Scale)
16 Bits Resolution with No Missing Codes
S/(N+D): 94 dB Typ @ 45 kHz
THD: –110 dB Typ @ 45 kHz
Differential Input Range: �2.5 V
Both AC and DC Specifications
No Pipeline Delay
Parallel (8/16 Bits) and Serial 5 V/3 V Interface
Single 5 V Supply Operation
115 mW Typical Power Dissipation, 15 �W @ 100 SPS
Power-Down Mode: 7 �W Max
Package: 48-Lead Quad Flat Pack (LQFP)
Pin-to-Pin Compatible Upgrade of the AD7664/AD7675/
AD7676
APPLICATIONS
CT Scanners
Data Acquisition
Instrumentation
Spectrum Analysis
Medical Instruments
Battery-Powered Systems
Process Control
GENERAL DESCRIPTIONThe AD7677 is a 16-bit, 1 MSPS, charge redistribution SAR,
fully differential, analog-to-digital converter that operates from a
single 5 V power supply. The part contains a high-speed 16-bit
sampling ADC, an internal conversion clock, error correction
circuits, and both serial and parallel system interface ports.
The AD7677 is hardware factory calibrated and comprehen-
sively tested to ensure such ac parameters as signal-to-noise
ratio (SNR) and total harmonic distortion (THD), in addition
to the more traditional dc parameters of gain, offset, and linearity.
It features a very high sampling rate mode (Warp) and, for
asynchronous conversion rate applications, a fast mode (Normal)
and, for low power applications, a reduced power mode (Impulse)
where the power is scaled with the throughput.
It is available in a 48-lead LQFP with operation specified from
–40°C to +85°C.
PRODUCT HIGHLIGHTSExcellent INL
The AD7677 has a maximum integral nonlinearity of 1 LSB
with a no missing 16-bit code.Superior AC Performances
The AD7677 has a minimum dynamic of 92 dB, 94 dB typical.Fast Throughput
The AD7677 is a 1 MSPS, charge redistribution, 16-bit SAR
ADC with internal error correction circuitry.Single-Supply Operation
The AD7677 operates from a single 5 V supply and typically
dissipates only 115mW. Its power dissipation decreases
with the throughput. It consumes 7 µW maximum when in
power-down.Serial or Parallel Interface
Versatile parallel (8 or 16 bits) or 2-wire serial interface
arrangement compatible with both 3 V or 5 V logic.
*Patent pending
AD7677–SPECIFICATIONS(–40�C to +85�C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise stated.)DIGITAL INPUTS
DIGITAL OUTPUTS
AD7677TEMPERATURE RANGE
NOTESLSB means Least Significant Bit. With the ±2.5 V input range, one LSB is 76.3 µV.In Warp Mode.Tested with VREF = 2.5 V. See Definition of Specifications section. These specifications do not include the error contribution from the external reference.All specifications in dB are referred to a full-scale input FS. Tested with an input signal at 0.5 dB below full scale unless otherwise specified.Tested in parallel reading mode.In Impulse Mode.With all digital inputs forced to OVDD or OGND respectively.Contact factory for extended temperature range.
Specifications subject to change without notice.
AD7677
TIMING SPECIFICATIONSRefer to Figures 11 and 12
Refer to Figures 19 and 20 (Slave Serial Interface Modes)
NOTESIn warp mode only, the maximum time between conversions is 1 ms, otherwise, there is no required maximum time.In serial interface modes, the SYNC, SCLK, and SDOUT timings are defined with a maximum load CL of 10 pF; otherwise, the load is 60 pF maximum.In serial master read during convert mode. See Table I for serial master read after convert mode.
Specifications subject to change without notice.
(–40�C to +85�C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise stated.)
ORDERING GUIDENOTESThis board can be used as a stand-alone evaluation board or in conjunction with the EVAL-CONTROL BRD2 for evaluation/
demonstration purposes.This board allows a PC to control and communicate with all Analog Devices evaluation boards ending in the CB designators.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
ABSOLUTE MAXIMUM RATINGS1Analog Inputs
IN+2, IN–2, REF, REFGND . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . .AVDD + 0.3 V to AGND – 0.3 V
Ground Voltage Differences
AGND, DGND, OGND . . . . . . . . . . . . . . . . . . . . .±0.3 V
SupplyVoltages
AVDD,DVDD, OVDD . . . . . . . . . . . . . . . . . . . . . . . . .7 V
AVDD to DVDD, AVDD to OVDD . . . . . . . . . . . . . .±7 V
DVDD to OVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±7 V
Digital Inputs . . . . . . . . . . . . . . . . .–0.3 V to DVDD + 0.3 V
InternalPowerDissipation3 . . . . . . . . . . . . . . . . . . . . 700 mW
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .150°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range
(Soldering10sec) . . . . . . . . . . . . . . . . . . . . . . . . . . .300°C
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.See Analog Input section.Specification is for device in free air: 48-Lead LQFP: �JA = 91°C/W, �JC = 30°C/W.
Figure 1.Load Circuit for Digital Interface Timing,
SDOUT, SYNC, SCLK Outputs, CL=10pF
Figure 2.Voltage Reference Levels for Timings
Table I.Serial Clock Timings in Master Read after Convert
AD7677
PIN FUNCTION DESCRIPTIONS5OB/2C
PIN FUNCTION DESCRIPTIONS (continued)NOTES
AI = Analog Input
DI = Digital Input
DI/O = Bidirectional Digital
DO = Digital Output
AD7677
DEFINITION OF SPECIFICATIONS
INTEGRAL NONLINEARITY ERROR (INL)Linearity error refers to the deviation of each individual code from
a best-fit line drawn from “negative full scale” through “positive
full scale.” The point used as “negative full scale” occurs 1/2 LSB
before the first code transition. “Positive full scale” is defined as a
level 1 1/2 LSB beyond the last code transition.
DIFFERENTIAL NONLINEARITY ERROR (DNL)In an ideal ADC, code transitions are 1 LSB apart. Differential
nonlinearity is the maximum deviation from this ideal value. It
is often specified in terms of resolution for which no missing
codes are guaranteed.
+FULL-SCALE ERRORThe last transition (from 011...10 to 011...11 in two’s
complement coding) should occur for an analog voltage 1 1/2 LSB
below the nominal +full scale (2.499886 V for the ±2.5 V range).
The +full-scale error is the deviation of the actual level of the
last transition from the ideal level.
–FULL-SCALE ERRORThe first transition (from 100...00 to 100...01 in two’s
complement coding) should occur for an analog voltage 1/2 LSB
above the nominal –full scale (–2.499962 V for the ±2.5 V range).
The –full-scale error is the deviation of the actual level of the
first transition from the ideal level.
ZERO ERRORThe zero error is the difference between the ideal midscale input
voltage (0 V) and the actual voltage producing the midscale
output code.
EFFECTIVE NUMBER OF BITS (ENOB)ENOB is a measurement of the resolution with a sine wave
input. It is related to S/(N+D) by the following formula:
and is expressed in bits.
TOTAL HARMONIC DISTORTION (THD)THD is the ratio of the rms sum of the first five harmonic
components to the rms value of a full-scale input signal and is
expressed in decibels.
SIGNAL-TO-NOISE RATIO (SNR)SNR is the ratio of the rms value of the actual input signal to
the rms sum of all other spectral components below the Nyquist
frequency, excluding harmonics and dc. The value for SNR is
expressed in decibels.
SIGNAL-TO-(NOISE + DISTORTION) RATIO (S/[N+D])S/(N+D) is the ratio of the rms value of the actual input signal
to the rms sum of all other spectral components below the
Nyquist frequency, including harmonics but excluding dc. The
value for S/(N+D) is expressed in decibels.
APERTURE DELAYAperture delay is a measure of the acquisition performance and
is measured from the falling edge of the CNVST input to when
the input signal is held for a conversion.
TRANSIENT RESPONSEThe time required for the AD7677 to achieve its rated accuracy
after a full-scale step function is applied to its input.
PIN CONFIGURATION
48-Lead LQFP
(ST-48)
AGND
CNVST
RESET
DGND
AGND
AVDD
BYTESWAP
OB/2C
WARP
IMPULSE
NC = NO CONNECT
SER/PAR
D2/DIVSCLK[0]
BUSY
D15
D14
D13
D3/DIVSCLK[1]D12NCNCNCNCIN+NCNCNCIN
REFGNDREF
D4/EXT/
INT
D5/INVSYNCD6/INVSCLK
D7/RDC/SDIN
OGND
DGND
D8/SDOUT
D9/SCLK
D10/SYNC
D11/RDERR
TPC 1.Integral Nonlinearity vs. Code
TPC 2.Histogram of 16,384 Conversions of a
DC Input at the Code Transition
TPC 3.Typical Positive INL Distribution (199 Units)
TPC 4.Differential Nonlinearity vs. Code
TPC 5.Histogram of 16,384 Conversions of a
DC Input at the Code Center
TPC 6.Typical Negative INL Distribution (199 Units)
AD7677TPC 7.FFT Plot
TPC 8.SNR, S/(N+D), and ENOB vs. Frequency
TPC 9.SNR and S/(N+D) vs. Input Level
TPC 10.SNR, THD vs. Temperature
TPC 11.Typical Delay vs. Load Capacitance CL
TPC 12.Operating Currents vs. Sample Rate