AD7674ACP ,18-Bit, 800 kSPS PulSAR® A/D ConverterCharacteristics ....... 12 Microprocessor Interfacing. 25 Circuit Information 16 Application Hints ..
AD7674ACP ,18-Bit, 800 kSPS PulSAR® A/D ConverterSpecifications subject to change without notice. No license is granted by implication www.analog.c ..
AD7674ACPZ , 18-Bit, 2.5 LSB INL, 800 kSPS SAR ADC
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AD7674ACP-AD7674AST-AD7674ASTZ
18-Bit, 800 kSPS PulSAR® A/D Converter
18-Bit, 2.5 LSB INL, 800 kSPS SAR ADCRev. 0
FEATURES
18-bit resolution with no missing codes
No pipeline delay (SAR architecture)
Differential input range: ±VREF (VREF up to 5 V)
Throughput: 800 kSPS (Warp mode)
666 kSPS (Normal mode)
570 kSPS (Impulse mode)
INL: ±2.5 LSB max (±9.5 ppm of full scale)
Dynamic range : 103 dB typ (VREF = 5 V)
S/(N+D): 100 dB typ @ 2 kHz (VREF = 5 V)
Parallel (18-,16-, or 8-bit bus) and serial 5 V/3 V interface
SPI®/QSPI™/MICROWIRE™/DSP compatible
On-board reference buffer
Single 5 V supply operation
Power dissipation: 98 mW typ @ 800 kSPS
78 mW typ@ 500 kSPS (Impulse mode)
160 µW @ 1 kSPS (Impulse mode)
48-lead LQFP or 48-lead LFCSP package
Pin-to-pin compatible upgrade of AD7676/AD7678/AD7679
APPLICATIONS
CT scanners
High dynamic data acquisition
Geophone and hydrophone sensors Σ-∆ replacement (low power, multichannel)
Instrumentation
Spectrum analysis
Medical instruments
GENERAL DESCRIPTION The AD7674 is an 18-bit, 800 kSPS, charge redistribution SAR,
fully differential analog-to-digital converter that operates on a
single 5 V power supply. The part contains a high speed 18-bit
sampling ADC, an internal conversion clock, an internal
reference buffer, error correction circuits, and both serial and
parallel system interface ports.
The part is available in 48-lead LQFP or 48-lead LFCSP
packages with operation specified from –40°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
D[17:0]
BUSY
MODE0
OGND
OVDD
DGNDDVDD
AVDD
AGND
REFREFGND
IN+
IN–
RESET
CNVST
PDBUF
REFBUFIN
WARPIMPULSE
MODE103083–0–001
Figure 1. Functional Block Diagram
Table 1. PulSARTM Selection
PRODUCT HIGHLIGHTS 1. High Resolution, Fast Throughput.
The AD7674 is an 800 kSPS, charge redistribution, 18-bit
SAR ADC (no latency).
2. Excellent Accuracy.
The AD7674 has a maximum integral nonlinearity of
2.5 LSB with no missing 18-bit codes.
3. Serial or Parallel Interface.
Versatile parallel (18-, 16- or 8-bit bus) or 3-wire serial
interface arrangement compatible with both 3 V and
5 V logic.
TABLE OF CONTENTS Specifications.....................................................................................3
Timing Specifications.......................................................................5
Absolute Maximum Ratings............................................................7
Pin Configuration and Function Descriptions.............................8
Definitions of Specifications.........................................................11
Typical Performance Characteristics...........................................12
Circuit Information........................................................................16
Converter Operation..................................................................16
Typical Connection Diagram...................................................18
Power Dissipation versus Throughput....................................20
Conversion Control....................................................................20
Digital Interface..........................................................................21
Parallel Interface.........................................................................21
Serial Interface............................................................................21
Master Serial Interface...............................................................22
Slave Serial Interface..................................................................23
Microprocessor Interfacing.......................................................25
Application Hints...........................................................................26
Layout..........................................................................................26
Evaluating the AD7674’s Performance....................................26
Outline Dimensions.......................................................................27
Ordering Guide..........................................................................27
REVISION HISTORY Revision 0: Initial Version
SPECIFICATIONS
Table 2. –40°C to +85°C, VREF = 4.096 V, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.
1 See section. Analog Inputs LSB means Least Significant Bit. With the ±4.096 V input range, 1 LSB is 31.25 µV.
3 See section. These parameters are centered on nominal values, which depend on the mode. In Warp mode, nominal zero error and
nominal gain error are centered around 0 LSB. In Normal and Impulse modes, nominal zero error is +375 LSB, and nominal gain error is +0.273% of FSR. These
specifications are the deviation from these nominal values. These specifications do not include the error contribution from the external reference but do include the
error contribution from the reference buffer, if used.
Definitions of Specifications
4 All specifications in dB are referred to a full-scale input, FS. Tested with an input signal at 0.5 dB below full scale unless otherwise specified. Data Format Parallel or Serial 18-Bit.
6 Conversion results are available immediately after completed conversion. The max should be the minimum of 5.25 V and DVDD + 0.3 V.
8 In Warp mode. Tested in Parallel Reading mode.
10 In Impulse mode. Contact factory for extended temperature range.
TIMING SPECIFICATIONS
Table 3. –40°C to +85°C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted. In Warp mode only, the maximum time between conversions is 1 ms; otherwise, there is no required maximum time.
2In serial interface modes, the SYNC, SCLK, and SDOUT timings are defined with a maximum load CL of 10 pF; otherwise, the load is 60 pF maximum. In Serial Master Read during Convert mode. See for Serial Master Read after Convert mode. Table 4
