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AD7672CQ05-AD7672KN03-AD7672KN05-AD7672KN10-AD7672KP03-AD7672KP05-AD7672KP10
LC2MOS HIGH-SPEED 12-BIT ADC
ANALOG
DEVICES
tthios
High-Speed 12-BitADc
A07672
FEATURES
12-Bit Resolution and Accuracy
Fast Conversion Time
AD7672XX03 - 3ps
AD7672XX05 - tips
AD7672XX10 - 10ps
Unipolar or Bipolar Input Ranges
Low Power: 110mW
Fast Bus Access Times: 90ns
Small, 0.3", 24-Pin Package and 28-Terminal
Surface Mount Packages
GENERAL DESCRIPTION
The AD7672 is a high-speed 12-bit ADC, fabricated in an ad-
vanced, mixed technology, Linear-Compatible CMOS (LCZMOS)
process, which combines precision bipolar components with
low-power, high-speed CMOS logic. The AD7672 uses an accurate
high-speed DAC and comparator in an otherwise conventional
successive-approximation loop to achieve conversion times as
low as 3ws while dissipating only 110mW of power.
To allow maximum flexibility the AD7672 is designed for use
with an external reference voltage. This allows the user to choose
a reference whose performance suits the application or to drive
many AD7672s from a single system reference, since the reference
input of the AD7672 is buffered and draws little current. For
digital signal processing applications where absolute accuracy
and temperature coefficients may be unimportant, a low-cost
reference can be used. For maximum precision, the AD7672
can be used with a high-accuracy reference, such as the AD588,
when absolute 12-bit accuracy can be obtained over a wide
temperature range.
An on-chip clock-circuit is provided which may be used with a
crystal for accurate definition of conversion time. Alternatively,
the clock input may be driven from an external source such as a
microprocessor clock.
The AD7672 also offers flexibility in its analog input ranges,
with a choice of 0 to + 5V, 0 to + 10V and t 5V.
The AD7672 is also designed to operate from nominal supply
voltages of + 5V and - 12V. This makes it an ideal choice for
data acquisition cards in personal computers where the negative
supply is generally -12V.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FUNCTIONAL BLOCK DIAGRAM
Vnss Aim MN:
1bBtT DAC Vss
AD7672
SUCCESSIVE
APPROXIMATION
REGISTER
12-BIT LATCH E
THREE,STATE E
OUTPUT
DRIVERS
CLK OUT
OSCILLATOR " CLK IN
3 4 -- , 2
AGND nan DB4 DGND DB3 Duo
The AD7672 has a high-speed digital interface with three-state
data outputs and standard microprocessor control inputs (Chip
Select and Read). Bus access time of only 90ns allows the AD7672
to be interfaced to most modern microprocessors.
The AD7672 is available in a variety of space-saving packages;
plastic and hermetic 24-pin "skinny" DIP and 28-pin ceramic
and plastic chip carrier.
PRODUCT HIGHLIGHTS
1. Fast, 3p.s, 5ps and lows conversion speeds make the AD7672
ideal for a wide range of applications in telecommunications,
sonar and radar signal processing or any high-speed data
acquisition system.
2. LCZMOS circuitry gives high precision with low power drain
(110mW typ).
3. Choice of 0 to + 5V, 0 to + 10V or t 5V input ranges, accom-
plished by pin-strapping.
4. Fast, simple, digital interface has a bus access time of 90ns
allowing easy connection to most microprocessors.
5. Available in space-saving 24-pin, 0.3" DIP or surface mount
package.
One Technology Way, P.0. Box 9106, Norwood, MA 02062-9106. U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703 wa: 710/394-6577
Telex: 924491 Cable: ANALOG NORWOODMASS
M787b-SPECllFliyfrl0lG
th, = 5ll 1 5%, Ilss = -1tll t 10%, Van = -511 unless otherwise noted.
G.. 4MH2 tor AD7672XXD3, 2.5MHz for AD7672XXO§, 1.25MH2 for AD'IGTZXXIU.
All Specifications u, to u, unless otherwise noted. Specifications apply to Slow
Memory Mode.)
Parameter K Versionl L Version' B Version1 C Version1 Units Test Conditions/Commcnts
ACCURACY2
Resolution 12 12 12 12 Bits
Integral Nonlinearity © + 25°C t 1 t 1/2 t 1 t 1/2 LSB max Tested Range 1 5V
Tmin [on tl 11/2 tl 11/2 LSB max
Differential Nonlinearity 1 0.9 t 0.9 t 0.9 t 0.9 LSB max No Missing Codes Guaranteed
Unipolar Offset Error Ci, + 25°C t 5 t 3 _ S t 3 LSB max Input Range: 0 mW or 0 to 10V
Tmin to Tm t 6 t 4 t 6 t 4 LSB max Typical TC is 2ppm/°C
Unipolar Gain Error g + 25°C t 5 t 4 t 5 t 4 LSB max Input Range: 0 to 5V or 0 to 10V
Tu,, to T,,., t 7 1 6 + 7 1 6 LSB max Typical TC is 2pprnf'C
Bipolar Zero Error Ca + 25''C 1 5 t 3 + 5 t 3 LSB max Input Range: t 5V
Tm to TL, t 6 t 4 t 6 t 4 LSB max Typical TC is 2ppm/°C
Bipolar Gain Error @ + 25°C t 5 t 4 + 5 t 4 LSB max Input Range: t 5V
Tmin to Tm t 7 t 6 + 7 t 6 LSB max Typical TC is 2ppm/“C
ANALOG INPUT
Unipolar Input Current 3.5 3.5 3.5 3.5 mA max InputRanges: 0to 5V orOto 10V
Bipolar Input Current t 1.75 t 1.75 t 1.75 t 1.75 mA max Input Range: t 5V
REFERENCE INPUT
VREF (For Specified Performance) - 5 - 5 - 5 - 5 Volts t 1%
Input Reference Current - 3 - 3 - 3 - 3 " max
POWER SUPPLY REJECTION
VDD Only,(FS Change) tl tl tl t LSBtyp Vss= --12V,VDD-- +4.75Vlo +5.25V
Vss Only, (FS Change) tl 11 11 t LSB typ Von: + 5V, Vss= -10.8VIo -13,2V
LOGIC INPUTS
E, km, CLK IN
VINL, Input Low Voltage + 0.8 + 0.8 + 0.8 + 0.8 V max VDD = 5V t 5%
VIN", Input High Voltage + 2.4 + 2.4 + 2.4 + 2.4 V min
Cm,31nputCapacitancc 10 10 10 10 pF max
loo Input Current 110 + 10 110 110 " max VIN = 0to Von
CLK IN
Im, Input Current t 20 t 20 t 20 t 20 WA max Vm = 0 to VDD
LOGIC OUTPUTS
DB 1 l-DBO, BUSY, CLK OUT
VOL, Output Low Voltage + 0.4 + 0.4 + 0.4 + 0.4 V max Iwo: = 1.6mA
Voro Output High Voltage + 4.0 + 4.0 + 4.0 + 4.0 V min Isounce = 200wh
Floating-State Leakage Current
DBll-DBO 110 110 110 110 Whmax
Floating-State Output Capacitance' 15 15 15 15 pF max
CONVERSION TIME
AD7672XX03 Applies to K and B Grades Only
Synchronous Clock 3. 125 - 3. 125 - us max fax = 4MHz. See Under
Asynchronous Clock 313.25 - 3/3.25 - us min/max Control Inputs Synchronization
AD7672XX05
Synchronous Clock 5 5 5 5 us max {CLK = 2.5MH2
Asynchronous Clock 4.8/5.2 4.8/5.2 4.8/5.2 4.8/5.2 us min/max
AD7672XX10
Synchronous Clock 10 10 10 10 us max {CLK = 1.25MHz
Asynchronous Clock 9.6/ 10.4 9.6/10.4 9. 6/ 10.4 9.6/10.4 ps min/max
POWER REQUIREMENTS _
Vor, + 5 + S + 5 + 5 VNOM t 5% for Specified Performance
Vss - 12 - 12 - 12 - 12 VNOM t 10% for Specified Performance
inn' 7 7 7 7 mA max E; --W5--voo,Arm---AIN2 = SV
Iss' -12 -12 -12 -12 mAmax C-s-iD-vor:---------"
Power Dissipation 110 1 10 l 10 110 mW typ
179 179 179 179 mW max
'Temperature rang: as follows: K, L Versions; 0 to , 70°C.
B, C Versions; - 25°C to+ M'C.
'vor, = 5hl, vss = -12V, ILSB-- FS/4096
lSample tested to ensure compliance.
'Power supply current is measured when AD7672 is inactive, i.c., a = R-D-- BUSY--, HIGH.
Specifications subject to change without notice.
REV. A
AD7672
Parameter T Version' U Version' Units Test Conditions/Comments
ACCURACY'
Resolution 12 12 Bits
Integral Nonlinearity (Li + 25'C t l t 1/2 LSB max Tested Range t w
Tm to TM t 1 t 3/4 LSB max
Differential Nonlinearity t 0.9 t 0.9 LSB max No Missing Codes Guaranteed
Unipolar Offset Error (g + 25''C + 5 t 3 LSB max Input Range: 0 to 5V or0 to 10V
Tmin to T,,,,, * 6 1 4 LSB max Typical TC is 2ppm/"C
Unipolar Gain Error (1 + 25°C + 5 i 4 LSB max Input Range: 0 to 5V or O to 10V
TU,, to TM t 7 t 6 LSB max Typical TC is 2ppm/°C
Bipolar Zero Error (u + 25°C + 5 t 3 LSB max Input Range: t 5V
Tu,, to Tu,, t 6 t 4 LSB max Typical TC is 2ppm/°C
Bipolar Gain Error Ca + 25°C + 5 t 4 LSB max Input Range: ' 5V
Tu,, to Tma, t 7 t 6 LSB max Typical TC is 2ppm/°C
ANALOG INPUT
Unipolar Input Current 3,5 3.5 mA max Input Ranges: 0 to 5V or 0to 10V
Bipolar Input Current t 1.75 t 1.75 mA max Input Range: t 5V
REFERENCE INPUT
VREF (For Specified Performance) - 5 - 5 Volts , 1%
Input Reference Current - 3 - 3 pA max
POWER SUPPLY REJECTION
vno0nly,(FSChange) tl tl LSBtyp Vss= -12V,Von-- +4.75V to +5.25V
V55 Only, (FS Change) t 1 t 1 LSB typ VDD = + 5V, Vss = - 10.8V to -13.2V
LOGIC INPUTS
a, RE, CLK IN
VINL, Input Low Voltage + 0.8 + 0.8 V.rnax VDD = 5V t 5%
Vom, Input High Voltage + 2.4 + 2.4 V min
Cm,' Input Capacitance 10 10 pF max
hN,InputCurrent t 10 t 10 - WA max VIN = 0to Von
CLK IN
lm, Input Current t 20 t 20 11A max VIN = 0 to VDD
LOGIC OUTPUTS
DBl l-DBO, BUSY, CLK OUT
VOL) Output Low Voltage + 0.4 + 0.4 V max Ismx = 1.6mA
Von, Output High Voltage + 4.0 + 4.0 V min Isounca = 200WA
Floating-State Leakage Current
DBl l-DBO t 10 t 10 “A max
Floating-State Output Capacitance' 15 15 pF max
CONVERSION TIME
AD7672XX05
Synchronous Clock 5 5 us max fax = 2. SMHz. See Under
Asynchronous Clock 4.8/5 .2 4.8/5 .2 us min/max Control Inputs Synchronization
AD7672XX10
Synchronous Clock 10 10 us max {CLK = 1.25MB:
Asynchronous Clock 9. 6/ 1 0.4 9.6/ 10.4 as min/max
POWER REQUIREMENTS
Vm, + 5 + 5 VNOM t 5% for Specified Performance
Vss - 12 - 12 VNOM :_10%i)r Specified Performance
Iorf 7 7 mA max §=Q=VDmAINl =A1N2=SV
Iss' - 12 - 12 mA max CS--RD--Voo,AIN1=AiN2---5V
Power Dissipation l 10 1 10 mW typ
179 179 mW max
'Temperature range " follows: T, U Versions; - 55°C to +125''C.
ZVDD = SV, Vss = - 12V, ILSB = FS/4096
3Sample tested to ensure compliance.
'Power supply current ismeasured when AD7672 is inactive, Le. ,3 -- E = BUSY = HIGH.
Specifications subject to change without notice.
REV. A
AD7672
TIMING CHARACTERISTIIIS1 (vm=sv.v§= -12V)
Limitat + 25''C Limit at Tm,Tm, Limit at T,,,o,,r,,,a,
Parameter (All Grades) (K, L, B, C Grades) (T, U Grades) Units Conditions/Comments
t] 0 0 0 ns min 3 toR-Iy Setup Time
t2 190 230 270 ns max E to BUSY Propagation Delay
ts2 90 l 10 120 ns max Data Access Time after E, G, = 20pF
125 150 170 nsmax Data AccessTimeafter@,CL= lOOpF
u t3 ts ts ns min R-ly Pulse Width
ts 0 0 0 ns min CT; tom Hold Time
(62 70 90 100 ns max Data Setup Time after BU SY
t73 20 20 20 ns min Bus Relinquish Time
75 85 90 ns max
ts 200 200 200 ns min Delay Between Successive
Read Operations
'Timing Specifications are sample tested at + 25°C to ensure compliance. All input control signals are specified with tr = If = 5ns (10% to 90% of + 5V)
and timed from a voltage level of 1.6V.
h, and tg are measured with the load circuits of Figure l and defined as the time required for an output to cross 0.8V or 2.4V.
h, is defined " the time required for the data lines to change 0. w when loaded with the circuits of Figure 2.
Sixcifications subject to change without notice.
DBN DBN
DGND g
a. High-Z to V0,, (ts)
and VOL to Van (ts)
goon“:
b. High-Z to VOL (ta)
and V0,, to VDL (ts)
Figure I. Load Circuits for Access Time
ABSOLUTE MAXIMUM RATINGS'
b. Vat to High-Z
DGND I
a. Vo,, to High-Z
Figure 2. Load Circuits for Output Float Delay
Operating Temperature Range
(TA = + 25°C unless otherwise noted) K, L ...................... 0 to + 70°C
B, C ................... -25''C to + 85°C
VDD t0 DGND ................ -0.3V to +7V T, U ................... - 55°C to + 125"C
Vss to DGND ................. +0.3V to - 17V Storage Temperature ............ - 65°C to + 150°C
AGND to DGND ........... -0.3V to Vor, +0.3V Lead Temperature (Soldering, lOsec) ......... + 300°C
AINI, AIN2 to AGND ............ - 15V to + 15V Power Dissipation (Any Package) to +75°C 1,000mW
VREF to AGND .......... Vss -0.3V to VDD +0.3V Derates above + 75°C by .............. 10mW/°C
Digital Input Voltage to DGND * . " . . " T
(fT5, IN, CS, RD) .......... -0.3V to Vor, +0.3V 3:222:223‘::21.:::::[,;:S::;;:‘:::::‘2u:::::1 onp'Cyact'iC:''tehr'e'1''vei'c'et
Digital Output Voltage to DGND at these or any other condition above those indicated in the operational sections of
(DBI l-DBO, BUSY, CLK OUT) . . . - 0.3V to VDD + 0.3V this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. The digital control inputs are diode protect-
ed; however, permanent damage may occur on unconnected devices subject to high energy
electrostatic fields. Unused devices must be stored in conductive foam or shunts. The protective
foam should be discharged to the destination socket before devices are removed.
ME SENSITIV DEVICE
-4- REV. A
