AD7590DIKP ,DI CMOS ANALOG SWITCHES WITH DATA LATCHES
AD7592DIKN ,DI CMOS ANALOG SWITCHES WITH DATA LATCHES
AD7609BSTZ , 8-Channel Differential DAS with 18-Bit
AD760AQ ,16/18-Bit Self-Calibrating Serial/Byte DACPORTapplications.The CALOK pin indicates when calibration has been success-The AD760 is available in a ..
AD7612BSTZ , 16-Bit, 750 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC
AD7621ACP ,16-Bit, 1 LSB INL, 3 MSPS PulSAR ADCSPECIFICATIONSParameter Conditions Min Typ Max UnitRESOLUTION 16 BitsANALOG INPUTVoltage Range V – ..
ADG884BCBZ-500RL7 ,DUAL 2:1 MUX/SPDT AUDIO SWITCHapplications. Logic (IN1/IN2) Switch 1A/2A Switch 1B/2B When on, each switch conducts equally well ..
ADG884BCBZ-REEL ,DUAL 2:1 MUX/SPDT AUDIO SWITCHapplications that require minimal distortion 3. 1.8 V logic-compatible. through the switch. The ADG ..
ADG884BCBZ-REEL7 ,DUAL 2:1 MUX/SPDT AUDIO SWITCHSPECIFICATIONS 1VDD = 5 V ± 10%, GND = 0 V, unless otherwise noted.Table 2. Parameter 25°C −40°C to ..
ADG884BCPZ-REEL ,0.5 Ω CMOS Dual 2:1 MUX/SPDT Audio SwitchSPECIFICATIONS 1VDD = 5 V ± 10%, GND = 0 V, unless otherwise noted.Table 2. Parameter 25°C −40°C t ..
ADG884BCPZ-REEL7 ,0.5 Ω CMOS Dual 2:1 MUX/SPDT Audio SwitchFEATURES 1.8 V to 5.5 V operation ADG884Ultralow on resistance: S1AD10.34 Ω typical S1B0.38 Ω max a ..
ADG884BRMZ ,0.5 Ω CMOS Dual 2:1 MUX/SPDT Audio SwitchSpecifications subject to change without notice. No license is granted by implication www.analog.c ..
AD7590DIKP-AD7592DIKN
DI CMOS ANALOG SWITCHES WITH DATA LATCHES
ANALOG
DEVICES
ill CMDS
Analog Switches with Data Latches
gll75Nill/liil758101/M75$20l
FEATURES
SCH Luch-Pmof
tNemrohage4'tttof: :25V
Low ttem: 60mm
Buffered Switch Logic
TTL. CMOS Compatible
Monomhic t_icaltrootaud CMOS
pm Compatible with AD75100I Series
GENERAL DESCRIPTION
The AD7590DI, AD759IDI and AD7592DI ate a funily of
protected (1ateh-prtrof) dielectrically isolated CMOS switches
featuring ovenoluge protection up to t 25V Above the power
mpplics. Microprocessor interfacing is facilitated by the provision
of on-ctu'p data Inches.
The AD7590D1 Ind AD7S9IDI consist of four independent
SPST mnlog twitches packaged in I IGpin DIP, They differ
only in that the switch comm! logic is inverted. The AD7S92DI
has two independent SPDT switches packaged in I 14-pin DIP.
REV. A
Information wmnhld bymbg Dovicu I: believed to be accurate and
reliable. However. no trt-itat' is assumed by Analog Dawes; for
Its use; nor tor any MMW of plum! or other rights of third
puma: Whlch mly mun (rum in on. No license is granted by impli-
cation or otherwise under my Mint orpmm rights 01 Analog Dtevituts.
FUNCTIONAL BLOCK DIAGRAMS
16.Pin DIP
ADTS9OOI
AD75tttm
WE "T"w--1C' " St
GNDE r’ " Dt
MEH’ - 0.. n S2
"a:---" 'ic " Dt
"CC-w "'---. _- o- " so
“Ebd‘ SL'
'rRlr--l x
70 VIEW
Plot to Scale)
l4-Pin DIP
AD7SBZDI
WE LATCH C " SI
GNDE " X” " oun
AED-r" 'L, 12 so
".l.Er-rc,. 6-- n Sa
NCE "rs, IC no out:
ire-), Elm
VDDE ENC
YOPVIIW
lNano Sum
NC : NO CONNF.CT
CONTROL LOGIC (WE HELD LOW)
AD7S90DI: Switch "ON" for Address "HIGH"
AD7S9lDI: Switch "ON" for Address "LOW"
AD7592DI: Address "HIGH" makes S] tD Out 1 and S3 ttt
On. Tochnology Way. PO. Box M06. Norwood, MA 02062-9106. USA.
Tcl: 61713294700 Fax: 517/326-3703 wa: 710/394-6577
TIMI: 906491 Cable: ANALOG NORWOODMASS
wn=15v.v5= -15t m
M75illlly/h075$1ly/M75$Nl-4Plitlirltyl'l' memmnu)
ra- t2S'C cu: HM)
hunch! Model (K. 8,1') - 25'Clo +£51.13) -SYC " + IIS‘QT) Unit: TestCtmditioainmtttt'
ANALOG SWITCH
Amk‘Sipnl Ring: All :10 , I0 , lo Volu
Rm/ All so am; - 10YaVsai rltNdos-lraA;
An 90 120 150 it mu 'restCtrcuitl
RON Matehl All l n lyp Vs - 0.19: - tmA
Rote Much Drift' All thot m1: lyp Vs 10,19, - IM
to OFF' AD7590DI 0.5 " WP Test Cissuit 2
AD7S9IDX S 30 an Mm
IsOFF1 All " nA lyp Test Circuits 2 & 6
S 50 200 M mu
tu(ts)ON' All 0.5 nA lyp Test Cinuzd
S 50 IN nA mu
Iour' AD759tDt l nA lyp Test Circuit 4
lo tin 400 Man:
CsiCrgDFF' All to PF WP
cstCtootc' A11 Mt pFlyp
Cm(Cmm) All I pFtyp
Cubicss)’ All 0.5 pFtyp
Qm’ AD7S9IDI 40 pFtyp
DlGlTALCONTROL
vm. ' M " 0.3 " an
trms/ Alt 2.4 2.4 b4 Vmin
Co/ All 7 , 7 ppr
' mm.” All I I l ish mu " .001 Vou
DYNhMICCHARACrtiRJSTttS
Io". AD7S90DX 250 380 580 mm TestCircuit5
AD7S9IDI wo foo mo m mu
lonl AD7590DI 400 $00 500 mm TcuCitcuitS
AD7S9lDl 250 380 m a: mu
”WWW: AD7592DI 350 ‘so 450 nsmax TestCircuit6
Write Pulse-Widlhon)‘ All 250 100 400 mm See Figural
Address Setup Time (Us)1 All 300 300 400 m min See Figure l
Address Hold Timett,rdl All 20 30 40 mmin See Figure 1
Offlsolmm’
(Analog InputtoArulogOutput) M - 85 dB lyp ILWR -o.sv; Vs - 10v (PK-Pk);
r= ikHa, KL: 10m
Crossulk’
(Digitrl1npurm AnxiogOutput) All , mVpeak,lyp RL- 1Mn,ccu--lSprt;
Vmu = w, Vrm. w. (W;
t i''-'' (nu. = 20nr,
held HIGH
( Injection) All 55 pC typ Test Circuit 7
POWER SUPPLY
qu' All l L5 2 mA mu Digital Inputs " Voa. or Vom
Iss M I I I um um
'tam laid.
'Gmnaucd, not pmdudlon ruled.
'rr-has torirthmrurkxtttaty, not mbiun In test.
'hpuum MOS prawn] mmntlcumu INA.
"Sitka-ttNet-ttee Iimnm nntire
TIMING AND CONTROL SEQUENCE
Figure I shows the timing mum“: for irtching the twitch
Iddrms inputs. The Inches m: level sensitive and, therefore,
while W1 is held low the Inches u: mxpamm and the switcha
respond to the uddxm inputs. The digital inputs at latched on
therisirtgerigeo_.
NOTE: All digiul input signals rise and fall times measured
from 10% lo 90% of 3V. (K‘IF'ZODS.
" " “1 n) CDCCCCCC)C
t i'----', I... Po-
m I l ,1
---ua---t
u.. An.“ mum to M "out mi
tas' AI-Al nun IO M - 1w:
luv Wh
MS! WIDYH
Figure h Timing and Control Sequence
REV. A
M75Nill/li0ml10l/h0RWi1l
ABSOLUTE MAXIMUM RATINGS"
tr, - + 2$'Ctmkmtrttterviserttxgd)
vDD to GND ...................... + 17V
Vss to GND ....................... - 17V
Overvolugc qu (Vs), One Switch Only
(Inc surge) ................... Van +25V
or Vss - 25V
(Continuous) .................. kv, + 20V
Gr Vss - 20V
or20rnA, Whichever thxurs Fiat
Switch Current Jos, Continuous) ............ 50mh
Switch Current (IDS, Surge)
Inn Duration. 10% Duty Crele ........... lSOmA
Digital Input Voltage Range ..... -0.3V to VDD +0.3V
Power Dissipation (Any Package)
Up to +75'C .................... 4somw
Dams atxrve +75'C by .............. 6:1:ch
Stung: Immune ............ - tBY to +150’C
Operating Temperature
Find: (KN Vcnions) .............. 0 to +70“C
Ctrdip (BQ Versions) ........... - 25°C to + 85°C
Cadip cm Versions) ........... - 55°C to +125%
'Sm lbw: those listed under “Abteiutc Maximum Rump" my
cmaepemmtentdartugettstttedevke.Tttisi-ratiagorily,aud
fursct'xxlpemkattafthede6zatthmeormrodterrnsiitiortsatxwe
tttoitrtdiatMiatheopentitxul'ectioeuofthisqxrificntitmistmt
implied. hymn: lo Mum maximum rating conditions far extended
Txxiodstturdhrtdevimrdiabititr.
CAUTION:
ORDERING GUIDE
Temperature Package
Model' Range Option'
AD7590MKN trc tu + 70°C N-16
AD759ODIKP 0'C TO + NT P-20A
AD7590DIBQ - 25°C to + 85"C Q46
AD7590DITQ - 55°C to + 125°C Q-16
AD7S9IDIKN trc to + 70''C N-16
AD759IDIKP or, to + 70°C P-20A
AD7591DIBQ - 25'C to + 85''C Q-lo
AD7591DITQ - 55''Cto + 125'C Q-16
AD7592DIKN irc to + 70°C N-l4
AD7592DIKP 0°C to + hrc P.20A
AD759ZDIBQ - 25'C to + 85°C (144
AD7592DIT Q - 55°C to f 125°C QH4
'Toortter MILSTD-HSC, Class B pruned puma“ $838 to pan
number. Refer to the Analog Devices Military Product: Dcubook ( 1990) for
ttiiary dau meet.
'N " NutmrNsticDiP,P ' PusticLadaiChipCamirQ - Cerdip.For
Hermetic Surface Mount package, count! yourloul nits ediire.
ESD (electrostatic discharge) sensitive device. The digital control inputs are diode protected;
however, permanent damage may occur on unconnected devices subject to high energy clcctro-
static fields. Unused devices must be stored in conductive foam or shunts. The protective foam
should be discharged to the destination socket before devices are inserted.
i'tiiiriiel,1tgFiri; m u
Mm in hie)
PIN CONFIGURATIONS
16-5.an 14-5an
th En V- t Eu
aunE Em omE EM:
At ' Aomom 3):: “E 40mm: 5ilsa
u a nomm Eu: "tE: mrmw t "
"ct Jeu'.'.',., n u mE ””th m cm
ME " In FEE En
a: Eu van TPe
ME ' u
wc-uocomn
S i It : a
a a I to "
All " In: An u "
u l Ammo: u " mu "NC £5,332,923
HC ' $22323! u "c n ' " u m',',','.'',':
n1 M""'" an new uuc
u I u a: we a n 0012
' " " II " ' " " " "
Egga; nc-uocomatcr ggggz
REV. A -3-
M7lM0l/liN5$1 Dl/AD75QZDI
ave, HSV
rrro- serv,,')
WT'OL nmvm
INPUT: mi
NYE: CIRCLE!) DEVICES IN "PARA" IEOLAYED POCKETS.
a vss-tw
Figure 2. Typical Output Switch Circuitry of A0759001 Series
CIRCUIT DESCRIPTION
CMOS devices make excellent m.tlog switches; however, problems
with ovet'voluse and htch-up phenomenon necessitated protection
circuitry. These protection circuits, however, either caused
degradation of impomnt switch parameters such as Ros
or leakage, or provided only limited protection in the event of
overvoltage.
The AD7S9ODI series switches utilize a dielectrimlly-isolated
CMOS fabrication process to eliminate the four-layer substrate
found in junction-isolated CMOS, thus providing latch-free
operation.
A typical switch channel is shown in Figure 2. The output
switching element is comprised of device numbers 4 Ind 5.
Operation is u follows: for in "ON" switch, (in+) is Vpp and
(in-) is Vss from the driver circuits. Device numbers I and 2
m "OFF" and number 3 in "ON''. Hence, the backgates of the
P- and N-chumel output devices (numbers 4 and S) are tied
together Ind floating. The circled devices u-e located in aepante
diekcuically isolated pockets. Floating the output twitch backptes
with the sign! input incense: the effective threshold voltage for
In applied analog signal, thus providing a tlatter RON versus Vs
Por In "OFF" switch, device number 3 is "OFF," and the
hecksates of devises 4 and 5 are tied through Ikft resistors (RI
and R2) to the respective supply voltages through the "ON"
devices l and 2.
If I voltage is applied to the S or D (OUT) terminal which
mud; VDD or Vss, the s. or D-lo-bntckgnte diode is forward
biased; however, R1 md R2 provide current limiting action to
the supplies.
An equivalent circuit of the output switch element in Figure 3
thowx that, indeed, the IN) limiting resistor: m in series with
the backptee of the P- and N-chhnnd output devices - not in
setieswiththetigrulpathbetmenthesutdDtermisuls.
It is possible to tum on " "OFF" switch by applying a voltage
in excess of van or Vss to the S or D terminal. If I positive
stress voluge is applied to the S or D termini which exceeds
VDD by a thrmhold, then the P-chnmd (device S) will turn on
creating a low impedance path between the S and D terminals.
A similar situation exists for negative stress voltages which
exceed Vss. In this case the N-channel provides the low impedance
path between the S and D terminals. The limiting factor on the
overvoltsge protection is the power dissipation of the package
and is t2011 continuous (or 2hnh whichever occurs first) above
the supply voltages.
Figure 3. A075900I Series Output Switch Diode-Equivalent.
Circuit
REV. A
