AD7538JR ,LC2MOS uP-Compatible 14-Bit DACspecifications T to T unless otherwise noted.)SS MIN MAXJ, K A, BParameter Versions Versions S Vers ..
AD7538KN ,LC2MOS uP-Compatible 14-Bit DACSpecifications subject to change without notice.ABSOLUTE MAXIMUM RATINGS*Operating Temperature Rang ..
AD7538KR ,LC2MOS uP-Compatible 14-Bit DACCHARACTERISTICSO V or –300 mV, Output Amplifier is AD711 except where noted.)Parameter T = +258C T ..
AD7538KRZ , LC2MOS Microprocessor-Compatible 14-Bit DAC
AD7538TQ ,LC2MOS uP-Compatible 14-Bit DACFEATURESAll Grades 14-Bit Monotonic Over the Full TemperatureRangeLow Cost 14-Bit Upgrade for 12-Bi ..
AD7541 ,12-Bit/ Multiplying D/A ConverterAD7541August 1997 12-Bit, Multiplying D/A Converter
ADG509FBN ,4/8 Channel Fault-Protected Analog MultiplexersFEATURESLow On Resistance (300 V typ)Fast Switching TimesADG508F/ADG528FADG509Ft 250 ns maxONS1 S1A ..
ADG509FBRN ,4/8 Channel Fault-Protected Analog MultiplexersApplications (Both Fault-ProtectedA0 A1 A2 ENA0 A1 ENand Nonfault-Protected)New Designs Requiring M ..
ADG509FBRN ,4/8 Channel Fault-Protected Analog MultiplexersSPECIFICATIONSDual Supply (V = +15 V 6 10%, V = –15 V 6 10%, GND = 0 V, unless otherwise noted)DD S ..
ADG509FBRNZ-REEL7 , 8-Channel/4-Channel Fault-Protected Analog Multiplexers
ADG509FBRNZ-REEL7 , 8-Channel/4-Channel Fault-Protected Analog Multiplexers
ADG509FBRW ,4/8 Channel Fault-Protected Analog Multiplexers4/8 Channel Fault-ProtectedaAnalog MultiplexersADG508F/ADG509F/ADG528F*FUNCTIONAL BLOCK DIAGRAMS
AD7538AQ-AD7538BQ-AD7538JN-AD7538JR-AD7538KN-AD7538KR-AD7538TQ
LC2MOS uP-Compatible 14-Bit DAC
FUNCTIONAL BLOCK DIAGRAMREV.A
LC2MOSmP-Compatible 14-Bit DAC
FEATURES
All Grades 14-Bit Monotonic Over the Full Temperature
Range
Low Cost 14-Bit Upgrade for 12-Bit Systems
14-Bit Parallel Load with Double Buffered Inputs
Small 24-Pin, 0.30 DIP and SOIC
Low Output Leakage (<20 nA) Over the Full
Temperature Range
APPLICATIONS
Microprocessor Based Control Systems
Digital Audio
Precision Servo Control
Control and Measurement in High Temperature
Environments
GENERAL DESCRIPTIONThe AD7538 is a 14-bit monolithic CMOS D/A converter
which uses laser trimmed thin-film resistors to achieve excellent
linearity.
The DAC is loaded by a single 14-bit wide word using standard
Chip Select and Memory Write Logic. Double buffering, which
is optional using LDAC, allows simultaneous update in a sys-
tem containing multiple AD7538s.
A novel low leakage configuration (U.S. Patent No. 4,590,456)
enables the AD7538 to exhibit excellent output leakage current
characteristics over the specified temperature range.
The AD7538 is manufactured using the Linear Compatible
CMOS (LC2MOS) process. It is speed compatible with most
microprocessors and accepts TTL or CMOS logic level inputs.
PRODUCT HIGHLIGHTSGuaranteed Monotonicity
The AD7538 is guaranteed monotonic to 14-bits over the
full temperature range for all grades.Low Cost
The AD7538, with its 14-bit dynamic range, affords a low
cost solution for 12-bit system upgrades.Small Package Size
The AD7538 is packaged in a small 24-pin, 0.3" DIP and a
24-pin SOIC.Low Output Leakage
By tying VSS (Pin 24) to a negative voltage, it is possible to
achieve a low output leakage current at high temperatures.Wide Power Supply Tolerance
The device operates on a +12 V to +15 V VDD, with a ±5%
tolerance on this nominal figure. All specifications are
guaranteed over this range.
AD7538–SPECIFICATIONS1
AC PERFORMANCE CHARACTERISTICSPower Supply Rejection
Output Capacitance
Output Noise Voltage Density
NOTES
Temperature range as follows:J, K Versions:0°C to +70°C
A, B Versions:–25°C to +85°C
S, T Versions:–55°C to +125°C
These characteristics are included for Design Guidance only and are not sub-
ject to test. (VDD = +11.4 V to +15.75 V, VREF = +10 V, VPIN3 = VPIN4 = O V, VSS =
O V or –300 mV, Output Amplifier is AD711 except where noted.)
(VDD = +11.4 V to +15.75 V2, VREF = +10 V; VPIN3 = VPIN4 = 0 V,
VSS = –300 mV. All specifications TMIN to TMAX unless otherwise noted.)
AD7538
TERMINOLOGY
RELATIVE ACCURACYRelative accuracy or endpoint nonlinearity is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after ad-
justing for zero error and full-scale error and is normally ex-
pressed in Least Significant Bits or as a percentage of full-scale
reading.
DIFFERENTIAL NONLINEARITYDifferential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of ±1 LSB max over
the operating temperature range ensures monotonicity.
GAIN ERRORGain error is a measure of the output error between an ideal
DAC and the actual device output. It is measured with all 1s in
the DAC after offset error has been adjusted out and is expressed
in Least Significant Bits. Gain error is adjustable to zero with an
external potentiometer.
DIGITAL-TO-ANALOG GLITCH IMPULSEThe amount of charge injected from the digital inputs to the
analog output when the inputs change state is called Digital-
to-Analog Glitch Impulse. This is normally specified as the area
of the glitch in either pA-secs or nV-secs depending upon
whether the glitch is measured as a current or voltage. It is mea-
sured with VREF = AGND.
OUTPUT CAPACITANCEThis is the capacitance from IOUT to AGND.
OUTPUT LEAKAGE CURRENTOutput Leakage Current is current which appears at IOUT with
the DAC register loaded to all 0s.
MULTIPLYING FEEDTHROUGH ERRORThis is the ac error due to capacitive feedthrough from VREF
terminal to IOUT with DAC register loaded to all zeros.
ORDERING GUIDE*N = Plastic DIP; Q = Cerdip; R = SOIC.
PIN FUNCTION DESCRIPTION
EQUIVALENT CIRCUIT ANALYSISFigure 3 shows an equivalent circuit for the analog section of
the AD7538 D/A converter. The current source ILEAKAGE is
composed of surface and junction leakages. The resistor RO
denotes the equivalent output resistance of the DAC which
varies with input code. COUT is the capacitance due to the cur-
rent steering switches and varies from about 90 pF to 180 pF
(typical values) depending upon the digital input. g(VREF, N) is
the Thevenin equivalent voltage generator due to the reference
input voltage, VREF, and the transfer function of the DAC
ladder, N.
Figure 3.AD7538 Equivalent Analog Output Circuit
DIGITAL SECTIONThe digital inputs are designed to be both TTL and 5 V CMOS
compatible. All logic inputs are static protected MOS gates with
typical input currents of less than 1 nA. To minimize power
supply currents, it is recommended that the digital input volt-
ages be driven as close as possible to 0 V and 5 V logic levels.
UNIPOLAR BINARY OPERATION (2-QUADRANT
MULTIPLICATION)Figure 4 shows the circuit diagram for unipolar binary opera-
tion. With an ac input, the circuit performs 2 quadrant multipli-
cation. The code table for Figure 4 is given in Table I.
Capacitor C1 provides phase compensation and helps prevent
overshoot and ringing when high-speed op amps are used.
The R-2R ladder current is 1/8 of the total reference input cur-
rent. 7/8 I flows in the parallel ladder structure. Switches A-G
steer equally weighted currents between IOUT and AGND.
Since the input resistance at VREF is constant, it may be driven
by a voltage source or a current source of positive or negative
polarity.
CIRCUIT INFORMATIONFigure 2.Simplified Circuit Diagram for the AD7538 D/A Section
Figure 4.Unipolar Binary Operation
Table I.Unipolar Binary Code Table for AD7538
D/A SECTIONFigure 2 shows a simplified circuit diagram for the AD7538
D/A section. The three MSBs of the 14-bit Data Word are de-
coded to drive the seven switches A-G. The 11 LSBs of the
Data Word consist of an R-2R ladder operated in a current
steering configuration.
AD7538For zero offset adjustment, the DAC register is loaded with all
0s and amplifier offset (VOS) adjusted so that VOUT is 0 V. Ad-
justing VOUT to 0 V is not necessary in many applications, but it
is recommended that VOS be no greater than (25 × 10–6) (VREF)
to maintain specified DAC accuracy (see Applications Hints).
Full-scale trimming is accomplished by loading the DAC register
with all 1s and adjusting R1 so that VOUTA = –VIN (16383/16384).
For high temperature operation, resistors and potentiometers
should have a low Temperature Coefficient. In many applica-
tions, because of the excellent Gain T.C. and Gain Error speci-
fications of the AD7538, Gain Error trimming is not necessary.
In fixed reference applications, full scale can also be adjusted
by omitting R1 and R2 and trimming the reference voltage
magnitude.
BIPOLAR OPERATION
(4-QUADRANT MULTIPLICATION)The recommended circuit diagram for bipolar operation is
shown in Figure 5. Offset binary coding is used. The code table
for Figure 5 is given in Table II.
With the DAC loaded to 10 0000 0000 0000, adjust R1 for
VO = 0 V. Alternatively, one can omit R1 and R2 and adjust the
ratio of R5 and R6 for VO = 0 V. Full-scale trimming can be
accomplished by adjusting the amplitude of VIN or by varying
the value of R7.
The values given for R1, R2 are the minimum necessary to cali-
brate the system for resistors, R5, R6, R7 ratio matched to 0.1%.
System linearity error is independent of resistor ratio matching
and is affected by DAC linearity error only.
When operating over a wide temperature range, it is important
that the resistors be of the same type so that their temperature
coefficients match.
For further information sec “CMOS DAC Application Guide”,
3rd Edition, Publication Number G872b-8-1/89 available from
Analog Devices.
Figure 5.Bipolar Operation
LOW LEAKAGE CONFIGURATIONFor CMOS Multiplying D/A converters, as the device is oper-
ated at higher temperatures, the output leakage current in-
creases. For a 14-bit resolution system, this can be a significant
source of error. The AD7538 features a leakage reduction con-
Table II. Bipolar Code Table for Offset Binary Circuit of
Figure 5.VSS should be tied to a voltage of approximately –0.3 V as in
Figures 4 and 5. A simple resistor divider (R3, R4) produces ap-
proximately –300 mV from –15 V. The capacitor C2 in parallel
with R3 is an integral part of the low leakage configuration and
must be 4.7 μF or greater. Figure 6 is a plot of leakage current
versus temperature for both conditions. It clearly shows the im-
provement gained by using the low leakage configuration.
Figure 6.Graph of Typical Leakage Current vs.
Temperature for AD7538
PROGRAMMABLE GAIN AMPLIFIERThe circuit shown in Figure 7 provides a programmable gain
amplifier (PGA). In it the DAC behaves as a programmable
resistance and thus allows the circuit gain to be digitally
controlled.
