AD7535KN ,LC2MOS uP-COMPATIBLE 14-BIT DACSpecifications subject to change without notice.
--2-- REV. 'h07535
(Van: +11.4llttt +15.75ll ..
AD7535SQ ,LC2MOS uP-COMPATIBLE 14-BIT DACGENERAL DESCRIPTION
The AD7535 is a 14-bit monolithic CMOS D/A converter which
uses laser trimm ..
AD7535TQ ,LC2MOS uP-COMPATIBLE 14-BIT DACCharacteristics are included for Design Guidance only and are not subject to test
(h, = + 11.4V to ..
AD7536JN ,LC2MOS 14-BIT uP-COMPATIBLE DACCHARACTERISTICS
(h, = +11.4ll to +15.75ll,llar = + lihl, b, = vas = thl, Ilss = IN OR - 300mV,
..
AD7536JP ,LC2MOS 14-BIT uP-COMPATIBLE DACcharacteristics also ensure exceptional
stability of linearity and gain error over the full temper ..
AD7536KN ,LC2MOS 14-BIT uP-COMPATIBLE DACspecifications u, to u, unless otherwise stated. See Figure ti
for Suggested Specification Circuit ..
ADG508AKP ,CMOS 4/8 CHAANNEL ANALOG MULTIPLEXERSSpecifications
Wide Supply Ranges (10.8V to 16.5V)
Extended Plastic Temperature Range
( --40oC t ..
ADG508AKP-REEL , CMOS 4-/8-Channel Analog Multiplexers
ADG508AKR ,CMOS 4/8 CHAANNEL ANALOG MULTIPLEXERSSpecifications
Wide Supply Ranges (10.8V to 16.5V)
Extended Plastic Temperature Range
( --40oC t ..
ADG508ATQ ,CMOS 4/8 CHAANNEL ANALOG MULTIPLEXERSGENERAL DESCRIPTION
The ADG508A and ADG509A are CMOS monolithic analog
multiplexers with 8 chan ..
ADG508FBN ,4/8 Channel Fault-Protected Analog MultiplexersGENERAL DESCRIPTIONThe ADG508F, ADG509F and ADG528F are CMOS analog3. Low RON.multiplexers, the AD ..
ADG508FBNZ , 8-Channel/4-Channel Fault-Protected Analog Multiplexers
AD7535AQ-AD7535BQ-AD7535JN-AD7535JP-AD7535KN-AD7535SQ-AD7535TQ
LC2MOS uP-COMPATIBLE 14-BIT DAC
ANALOG
DEVICES
pp Compatible 14-Bit DAG
AD7535
FEATURES
All Grades 14-Bit Monotonic over the Full
Temperature Range
Full 4 Quadrant Multiplication
Microprocessor Compatible with Double Buffered
Inputs
Exceptionally Low Gain Temperature Coefficient,
0.5ppm/°C typ
Low Output Leakage (<20nA) over the Full
Temperature Range
APPLICATIONS
Microprocessor Based Control Systems
Digital Audio
Precision Servo Control
Control and Measurement in High Temperature
Environments
GENERAL DESCRIPTION
The AD7535 is a 14-bit monolithic CMOS D/A converter which
uses laser trimmed thin-film resistors to achieve excellent
linearity.
Standard Chip Select and Memory Write logic is used to access
the DAC.
A novel low leakage configuration (patent pending) enables the
AD7535 to exhibit excellent output leakage current characteristics
over the specified temperature range.
The device is fully protected against CMOS "latch up" phenomena
and does not require the use of external Schottky diodes or the
use of a FET Input op-amp. The AD7535 is manufactured
using the Linear Compatible CMOS (LCZMOS) process. It is
speed compatible with most microprocessors and accepts TTL
or CMOS logic level inputs.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FUNCTIONAL BLOCK DIAGRAM
N.c, Voo
AD7535 3 Ro
Vans 1 Ia-al'r DAC 4 louv
Vasrs 2 5 AGNDS
6 AGNDF
DAC REGISTER 23 L076
MS LS -
INPUT INPUT 24 CSLSB
REGISTER REGISTER
22 c'SMSB
25 Wrt
o ------- " 7 27
0313- -- nso DGND Vss
PRODUCT HIGHLIGHTS
1. Guaranteed Monotonicity
The AD7535 is guaranteed monotonic t0 l4-bits over the full
temperature range for all grades.
2. Low Output Leakage
By tying Vss (Pin 27) to a negative voltage, it is possible to
achieve a low output leakage current at high temperatures.
3. Microprocessor Compatibility
High speed input control (TTL/SV CMOS compatible) allows
direct interfacing to most of the popular 8-bit and 16-bit
microprocessors. When interfacing to 8-bit processors CSMSB
and CSLSB are separate and the 8-bit data bus is connected
to both the MS Input Register and the LS Input Register.
For straight 14-bit parallel loading CSMSB and CSLSB are
tied together giving one chip select to load the 14-bit word.
One Technology Way, P.O. Box 9106, Norwood, MA 02052-9106
Tel: 617/329-4700 Fax: 617/326-8703 wa: 710/394-6577
West Coast Central Atlantic
714/641-9391 214/231-5094 215/643-7790
M7535-SPEClF
tymasl
(v.19: + 11.4ll to +15.15V2, hrs-- +10V; vm=vm5=0v, hs-- -Nilmll
All specifications u, to Tum unless otherwise stated.)
Parameter J, A Versions K, B Versions S Version T Version Units Test Conditions/Comments
ACCURACY
Resolution 14 14 l4 14 Bits
Relative Accuracy Cr 2 t l 2 t I LSB max All grades guaranteed monotonic
Differential Nonlinearity "_- I t 1 - 1 t 1 LSB max over temperature.
F ull Scale Error ' _ 4 7 8 4 LSB max Measured using internal Rm, and
includes effects ofleakage
current and gainT.C.
Gain Temperature Coefrrcienr';
AGainaTemperature ' 5 I 2.5 I 5 7 2.5 ppmf'C max Typical value isO.Sppm/°C
Output Leakage Current Iotrr (Pin 4)
+ 25°C t 5 t S t 5 M max All digital inputs 0V
Tmmto'l‘mIx :10 :10 :20 :20 nAmax Vss-- -300mV
Tm," to Tm" : 25 ' 150 = 150 nA max Vss = 0V
REFERENCE INPUT
Input resistance, pin 1 3.5 3 . 5 3.5 3.5 kn min Typical Input Resistance = 6kfl
10 10 10 10 kn max
DIGITAL INPUTS
vm(InputHighVoltage) 2.4 2.4 2.4 2.4 Vmin
V1L(Input Low Voltage) 0.8 0.8 0.8 0.8 Vmax
1m (Input Current)
+ 25''C tl e l 1 I wh max 1% = 0V or VDD
Tmto'l'm tlt) :10 :10 +10 pAmax
Cm (Input Capacitance)' 7 7 7 pF max
POWER SUPPLY
VDDRangc 11.4/15.75 11.4/15.75 11.4/15.7S 1].4/15.75 vxnjn/Vmu Specificationguaranteedover
Vss Range 200/ - 500 _ 200/ - 500 - 200/ - 500 - 200/ 500 mV min/mV max this range
101) 4 4 4 4 mA max All digital inputs Vn, or Vm
500 500 500 500 WA max All digital inputs 0V or Hoo
M PERFORMANCE CHARACTERISTICS
These characteristics are included for Design Guidance only and are not subject to test
ill, = + 11.4V to +15.75V, hsr = + 10V, 1lne, = bas = W, Ilss = illl UR - 3llilmY,
Output Amplifier is A0544 except where stated.)
Parameter Ta = 25''C TA = Tm, Tm, Units Test Conditions/Comments
Output Current Settling Time 1.5 - us max To 0.003% of full scale range.
IOUT load = 1000,
CEx-r = 13pF. DAC register alternately
loaded with all I's and all O's.
Typical value of Settling Time
is 0.8ps.
Digital to Analog Glitch Impulse 50 - nv-sec typ Measured with VREF = 0V. IouT load
=1000, Cmcr = l3pF. DAC
register alternately loaded with all
I's and all O's.
Multiplying Feedthrough Error' 3 5 mV p-p typ Wrist = t 10V, lOkHz sine wave
DAC register loaded with all 0's.
Power Supply Rejection
AGain/AVDD t0.01 t0.02 %per%max AVDD= ce5%
Output Capacitance
Com' (Pin 4) 260 260 pF max DAC register loaded with all I's
Covr (Pin 4) 130 130 pF max DAC register loaded with all 0's
Output Noise Voltage Density
(10Hz-100kHz) 15 - nvx/E typ Measured between Rm, and Iour
"Temperature range as follows: J, K Versions: 0 to + 70''C
A, B Versions:
S. T Versions:
- 25°C to + 85''C
- 55°C to + 125°C
'Specifications are guaranteed for a Ku, of + 11.4V to + 15. 75V. At VDD - 5V, the device is fully functional with degraded specifications.
'Guaranteed by Product Assurance testing.
'Feedrhrough can be further reduced by connecting the metal lid on the ceramic package to DGND.
Specifications subject to change without notice.
REV. A»
A07535
(Van: +1141! to +15.75ll, hsr-= +10V, me=Vm5=0V, llssraW or -300mV
All specifiratitms u, to u, unless otherwise stated. See Figure 1 for Timing Diagram.)
Limit at
Limit at TA=0to +70°C Limit at
Parameter TA = 25''C T, = - 25°C to + 85'C TA = - 55°C to + 125°C Units Test Conditions/Comments
tl o o o nsmin CSMSB orCSLSB tokTisetup Time
t2 0 0 0 ns min CSMSB or CSLSB to WR Hold Time
ts 170 200 240 ns min LDAC Pulse Width
u 170 200 240 ns min Write Pulse Width
ts 140 160 180 ns min Data Setup Time
tg 20 20 30 ns min Data Hold Time
JN, KN Versions:
AQ, BQ Versions:
SQ, TQ Versions:
Specifications subject to change without notice.
'Temperature range as follows:
ABSOLUTE MAXIMUM RATINGS
(T A = 25°C unless otherwise stated)
V01) (pin 26) to DGND ...........
Vss (pin 27) to AGND
VREFS (pin I) to AGND ...........
VREFF (pin 2) to AGND
VRFB (pin 3) to AGND ...........
Digital Input Voltage (pins 8-25) to DGND
VPrro, to DGND ...............
AGND to DGND ..............
Power Dissipation (Any Package)
To + 75°C ..................
Derates above + 75°C ............
0to +70°C
-25oCto + 85°C
- 55°Cw +125°C
. . -0.3V, +17V
. . -15V, +0.3V
-0.3V, Vor,
-0.3V, VDD
- 0.3V, Vor,
..... 1000mW
10mW/°C
Operating Temperature Range
Commercial Plastic (J, K Versions) ....... 0 to +70°C
Industrial Ceramic (A, B Versions) . . . . - 25°C to + 85°C
Extended Ceramic (S, T Versions) . - 55°C to + 125°C
Storage Temperature ........... - 65°C to + 150°C
Lead Temperature (Soldering, 10 secs) ........ + 300°C
*Stresses above those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect
device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. The digital control inputs are diode
protected; however, permanent damage may occur on unconnected devices subject
to high energy electrostatic fields. Unused devices must be stored in conductive foam
or shunts. The protective foam should be discharged to the destination socket before
devices are removed.
ORDERING GUIDE
Temperature Relative Full-Scale Package
Model Range Accuracy Error Option'
AD7535JN 0°C to + 70°C t 2LSB t 8LSB N-28
AD7535KN 0°C to + 70°C t ILSB t 4LSB N-28
AD7535JP 0°C to + 70°C t 2LSB t 8LSB P-28A
AD7535KP 0°C to + 70°C t ILSB t 4LSB P-28A
AD7535AQ - 25°C to + 85°C t 2LSB t 8LSB Q-28
AD7535BQ - 25°C to + 85°C t ILSB 1 4LSB Q-28
AD75358Q -55oC to +125°C t 2LSB 18LSB Q-28
AD7535TQ - 55°C to + 125°C 11LSB 14LSB Q-28
AD7535SE -5VC to +125°C 12LSB 18LSB E-28A
AD7535TE -55T to + 125°C 11LSB 14LSB E-28A
*E = Leadless Ceramic Chip Carrier; N = Plastic DIP; P - Plastic Leaded Chip
Carrier; Q = Cerdip.
AD7535
TERMINOLOGY
RELATIVE ACCURACY
Relative accuracy or end-point nonlinearity is a measure of
the maximum deviation from a straight line passing through
the end-points of the DAC transfer function. It is measured
after adjusting for zero error and full scale error and is normally
expressed in Least Significant Bits or as a percentage of full
scale reading.
DIFFERENTIAL NONLINEARITY
Differential nonlinearity is the difference between the measured
change and the ideal lLSB change between any two adjacent
codes, A specified differential nonlinearity of t ILSB max
over the operating temperature range ensures monotonicity.
FULL-SCALE ERROR
Full scale error or gain error is a measure of the output
error between an ideal DAC and the actual device output.
Full scale error is adjustable to zero with an external
potentiometer.
PIN CONFIGURATIONS
DIGITAL-TO-ANALOG GLITCH IMPULSE
The amount of charge injected from the digital inputs to the
analog output when the inputs change state is called Digital-to-
Analog Glitch Impulse. This is normally specified as the area
of the glitch in either pA-secs or nV-secs depending upon
whether the glitch is measured as a current or voltage. It is
measured with VREF=AGND.
OUTPUT CAPACITANCE
This is the capacitance from lov, to AGND.
OUTPUT LEAKAGE CURRENT
Output Leakage Current is current which appears at [our
with the DAC register loaded to all O's.
MULTIPLYING FEEDTHROUGH ERROR
This is the ac error due to capacitive feedthrough from VREF
terminal to Iom- with DAC register loaded to all zeros.
DIP LCCC PLCC
vms C, I El NC D n a g o A a
i 1 o m I K cr. a
Rug 3 ZSIVoo 4 3 2 128 27 26 uaanm a
Iow 4 25 W m
- AGNDS wn
AGNDS 5 " CSLSB AGNDS 5 25 WR
G 23 LroaT: AGNDF s 24 C-SGI, AGNDF t m CSLSB
A NDF a L AC --
AD7535 DGND 7 23 LDAC DGND AD7535 El LDAC
DGND 7 22 csmsa AD7535 - Top VIEW -
MS 0513 csmsa
TOP VIEW (MSBlDB13 8 TOP VIEW 22 CSMSB ( Bl a worm Scalel m
(M53) 0813 e anlmSc-Ia) 21 DBOlLSB) 0312 9 lNollo Scale) 21 DBOILSB) 0312 a DBOILSB)
0312 Li El DB1 0011 10 20 DBI 0311 m m DBI
0311 10 El DB2 DB10 11 IS 032 0510 m m DB2
0310 E, E] DB3
" " 14 15 1s 17 "
009 12 El DB6 g g E g g It g m m m m 1tt'
NC = NO CONNECT a D D D D D Cl tn D Ps . ID V n
DB8 FE E DM NC=NOCONNECT g 8 8 g g , E
DB7 " " Des
NC = NOCONNECY
REV. A
Pin Function ihsscriihiim---h07535
O‘UI-AUJ
REV. A
Function
Description
Voltage Reference sense pin
Voltage Reference force pin. If a remote voltage reference is being used VREFF and VREFS can be used in a Kelvin
configuration to compensate for IR drop along the VREF line. See Figure 7.
Feedback resistor. Used to close the loop around an external op-amp.
Current Output Terminal.
Analog ground sense line. Reference point for external circuitry. This pin should carry minimal current.
Analog ground force line; carries current from internal analog ground connections. AGNDF and AGNDS are tied
together internally.
Digital Ground
Data Bit 13. DAC MSB
Data Bit 12
Data Bit 1 1
Data Bit 10
Data Bit 9
Data Bit 8
Data Bit 7
Data Bit 6
Data Bit 5
Data Bit 4
Data Bit 3
Data Bit 2
Data Bit 1
Data Bit 0. DAC LSB
Chip Select Most Significant (MS) Byte. Active LOW input.
Asynchronous Load DAC input. Active LOW.
Chip Select Least Significant (LS) Byte. Active LOW input.
Write input. Active LOW.
c-tnits-B Em E67RT WE Operation
0 l l 0 Load MS Input Register
1 0 1 0 Load LS Input Register
0 0 1 0 Load MS and LS Input Registers
l l 0 X Load DAC Register from Input Registers
0 0 0 0 All Registers are transparent
1 l 1 X No operation
X X l 1 No operation
NOTE X = Don'tCare
+ 12V to + 15V supply input
Bias pin for High Temperature Low Leakage configuration. To implement low leakage system, the pin should
be at a negative voltage. See Figure 4, 5, 6 or 7 for recommended circuitry.
No connection
