AD7533KR ,CMOS LOW COST 10-BIT MULTIPLYING DACGENERAL DESCRIPTION
The AD7533 js a low cost lO-bit 4-quadrant multiplying DAC
manufactured usi ..
AD7533KR ,CMOS LOW COST 10-BIT MULTIPLYING DACAPPLICATIONS
Digitally Controlled Attenuators
Programmable Gain Amplifiers
Function Generation ..
AD7533LN ,CMOS LOW COST 10-BIT MULTIPLYING DACFEATURES
Lowest Cost 10-Bit DAC
Low Cost AD7520 Replacement
Linearity: 1/2, 1 or 2LSB
L ..
AD7533LN ,CMOS LOW COST 10-BIT MULTIPLYING DACAD7523, AD7533August 1997 8-Bit, Multiplying D/A Converters
AD7533LN ,CMOS LOW COST 10-BIT MULTIPLYING DACANALOG
DEVICES
CMUS Low Cost
lil-Bit Multiplying Mt
AD7533
AD7533LP ,CMOS LOW COST 10-BIT MULTIPLYING DACGENERAL DESCRIPTION
The AD7533 js a low cost lO-bit 4-quadrant multiplying DAC
manufactured usi ..
ADG506ATQ ,CMOS 8-/16-Channel Analog MultiplexersFEATURES44 V Supply Maximum RatingV to V Analog Signal RangeSS DDSingle/Dual Supply
ADG507AKN ,CMOS 8-/16-Channel Analog MultiplexersCMOSa8-/16-Channel Analog MultiplexersADG506A/ADG507AFUNCTIONAL BLOCK DIAGRAM
ADG507AKN ,CMOS 8-/16-Channel Analog MultiplexersGENERAL DESCRIPTIONORDERING GUIDEThe ADG506A and ADG507A are CMOS monolithic analogmultiplexers wit ..
ADG507AKN/+ ,CMOS 8-/16-Channel Analog MultiplexersSpecifications with a Wide ToleranceThe devices are specified in the 10.8 V to 16.5 V range forNOTE ..
ADG507AKN/+ ,CMOS 8-/16-Channel Analog MultiplexersCHARACTERISTICS1t 200 200 200 ns typ V1 = – 10 V, V2 = +10 V; Test Circuit 6TRANSITION300 400 300 4 ..
ADG507AKP ,CMOS 8-/16-Channel Analog MultiplexersSpecifications subject to change without notice.REV. C–2–ADG506A/ADG507ASingle Supply (V = +10.8 V ..
AD7533AQ-AD7533BQ-AD7533CQ-AD7533JN-AD7533KN-AD7533KN.-AD7533KP-AD7533KR-AD7533LN-AD7533LP-AD7533SQ-AD7533UQ
CMOS LOW COST 10-BIT MULTIPLYING DAC
ANALOG
DEVICES
CMOS Low Cost
10-Bit Multiplying Mt
FEATURES
Lowest Cost 10-Bit DAC
Low Cost AD7520 Replacement
Linearity: 1/2, 1 or 2LSB
Low Power Dissipation
Full Four-Ouadrant Multiplying DAC
CMOS/TT L Direct Interface
Latch Free (Protection Schottky not Required)
End-Point Linearity
APPLICATIONS
Digitally Controlled Attenuators
Programmable Gain Amplifiers
Function Generation
Linear Automatic Gain Control
GENERAL DESCRIPTION
The AD7533 js a low cost 10-bit 4-quadrant multiplying DAC
manufactured using an advanced thin-film-on-monolithic-CMOS
wafer fabrication process.
Pin and function equivalent to the industry standard AD7520,
the AD7533 is recommended as a lower cost alternative for old
AD7520 sockets or new 10-bit DAC designs.
AD7533 application flexibility is demonstrated by its ability to
interface to TTL or CMOS, operate on + 5V to + 15V power,
and provide proper binary scaling for reference inputs of either
positive or negative polarity.
REV. A
Information furnished by Analog Devices is believed to be accurate
and reliable. However, no responsibility is assumed by Analog Devices
for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implica-
tion or otherwise under any patent or patent rights of Analog Devices.
Functional Block Diagram
vREF 10k 10k 10k
20k 20k 20k 20k 20k
3-1 sa sa S-N
J J J J
I I I I
" l I l
I ', t v t Okwr2
I I l I
l I l I - olour,
I I I " I RFEEDBACK
O O O O
BIT 1 (MSB) BIT 2 BIT 3 BIT 10 (L58)
DIGITAL INPUTS (DTL/TTL/CMOS COMPATIBLE)
Logic: A switch is closed to IOU-n for its digital input in a
"HIGH" state.
ORDERING GUIDEl
Temperature Nonlinearity Package
Model2 Range (% FSR max) Option3
AD7533JN -40oCto = 85°C t0.2 N-16
AD7533KN - 40°C to + 85°C t 0.1 N- 16
AD7533LN -40oCto +85°C t0.05 N-16
AD7533JP -40oC to = 85°C t0.2 P-20A
AD7533KP - 40°C to I 85°C t 0.1 P-20A
AD7533LP - 40°C to ". 85°C t 0.05 P-20A
AD7533JR -4tyCto + 85°C t0.2 R-16
AD7533KR -40'Cto +85°C 10.1 R-16
AD7533LR -40oC to + 85°C 10.05 R-16
AD7533AQ -40oCto +85°C t0.2 Q-16
AD7533BQ -40oCto +85°C t0.l Q-l6
AD7533CQ - 40°C to + 85°C t 0.05 Q-16
AD7533SQ - 55°C to + 125°C t 0.2 Q-16
AD7533TQ - 55°C to + 125°C t 0.1 Q-l6
AD7533UQ - 55°C to + 125°C t 0.05 Q-16
AD7533SE - 55°C to + 125°C t 0.2 E-20A
AD7533TE - 55°C to + 125°C t 0.1 E-20A
AD7533UE - 55°C to + 125°C t 0.05 E-20A
'Analog Devices reserves the right to ship ceramic tpackage outline D- 16 I
packages in lieu ofcerdip (package outline Q-16)packages.
2T0 order MIL-STD-883, Class B processed parts, add M83B to part number.
Contact your local sales office for military data sheet.
'E - Leadless Ceramic Chip Carrier; N - Plastic DIP; P = Plastic
Leaded Chip Carrier; Q = Cerdip; R - SOIC.
One Technology Way; P. O. Box 9106; Norwood, MA 02062-9106 U.S.A.
Twx: 71 0/394-6577
Tel: 617/329-4700
Telex: 174059
Cables: ANALOG NORWOODMASS
M7533 -SPEiyFlWlT10lG (Van = +15ll, hm, = Vom = ihl; VREF = +lihl unless otherwise noted)
PARAMETER TA = 25°C TA = Operating Range Test Conditions
STATIC ACCURACY
Resolution 10 Bits 10 Bits
Relative Accuracyl
AD7533]N,AD, SD,AQ, SQ t0.2% FSR max t0.2% FSR max
AD7S33KN,BD,TD,BQ,TQ t0.1% FSRmax 10.1% FSRmax
AD7533LN, CD, UD, CQ, UQ t 0.05% FSR max t 0.05% FSR max
Gain Error“ t 1.4% FS max t 1.5% FSmax Digitallnputs= va
Supply Rejection'
AGain/AVDD 0.005%/% 0.008%/% Digital Inputs = Vom; Voz, = + 14V to + 17V
Output Leakage Current
Iovau t 50nA max t zoom max Digital Inputs = Vrsr; VREF = t 10V
10m t 50nA max t 200nA max Digital Inputs = VIN“; VREF = A 10V
DYNAMIC ACCURACY
Output Current Settling Time 600ns max4 800nsS To 0.05% FSR; RLOAD = 1000; Digital
Inputs = VIN“ to Vrsr or Vom to VIN"
Feedthrough Error :0.05%FSR max5 t0.1% FSR maxs Digitallnputs=VmL;VREF= t 10v,
100kHz sine wave.
REFERENCE INPUT
Input Resistance (Pin 15) 5kn min, 20kn max 5kf2 min, 20kn max6
ANALOG OUTPUTS
Output Capacitance 5 s
COUTI 100pF max 100pF max . . -
Com 35pF max5 35pF maxs Digital Inputs - VIN"
Conn 35pF maxs 3SpF maxs . b _
C0017 lOOpF maxs 100pF maxs Digital Inputs - me.
DIGITAL INPUTS
Input High Voltage
Vrrm 2.4V min 2.4V min
Input Low Voltage
Vom 0.8V max 0.8V max
Input Leakage Current
In; t luAmax tlwAmax Vm=0VaDdVDD
Input Capacitance
Cm 8pF max5 8pF max5
POWER REQUIREMENTS
VDD + 15V t 10% +15V 110% RatedAccuracy
Vor: Ranges + 5V to + 16V + 5V to + 16V Functionality with Degraded Performance
IDD 2mA max 2mA max Digital Inputs = VINL or Wm
l“FSR” is Full-Scale Range.
2Full Scale (FS) = (VREF)
'Max gain change from TA = + 25°C to Tu, or Tu, is t 0.1% FSR.
'AC parameter, sample tested to ensure specification compliance.
'Guaranteed, not tested,
6Absolute: temperature coefficient is approximately - 300ppmf'C.
Specifications subject to change without notice.
REV. A
AD7533
ABSOLUTE MAXIMUM RATINGS'
(TA = +25°C unless otherwise noted)
vm, to GND .................. -0.3V, +17V
Rm to GND ...................... t 25V
VREF to GND ...................... t 25V
Digital Input Voltage Range ..... -0.3V to Voo +0.3V
OUT l, OUT 2 to GND ........... -0.3V to Vor,
Power Dissipation ( Any Package)
To + 75°C ..................... 450mW
Derates above + 75°C by .............. 6mW/°C
Operating Temperature Range
Plastic ON, KN, LN versions) ......... O to + 70°C
Hermetic (AD, BD, CD,
AQ, BQ, CQ versions)
Hermetic (SD, TD, UD,
SQ, TQ, UQ versions) .......... - 55°C to + 125°C
Storage Temperature ............ -65''C to + 150°C
Lead Temperature (Soldering, 10sec) ......... + 300°C
*Stresses above those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device " these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device
reliability.
- LPC to + 85°C /
CAUTION ..
ESD (Electro-Static-Discharge) sensitive device. The digital control inputs are diode protected;
however, permanent damage may occur on unconnected devices subjected to high energy electrosta-
tic fields. Unused devices must be stored in conductive foam or shunts. The foam should be
discharged to the destination socket before devices are removed.
TERMINOLOGY
RELATIVE ACCURACY: Relative accuracy or end-point
nonlinearity is a measure of the maximum deviation from a
straight line passing through the endpoints of the DAC transfer
function. It is measured after adjusting for ideal zero and full
scale and is expressed in % of full-scale range or (sub) multiples
of ILSB.
RESOLUTION: Value of the LSB. For example, a unipolar
converter with n bits has a resolution of (2-'') (VREF). A bipolar
converter of 11 bits has a resolution fo [2 "r 1)] (VREFL Resolution
in no way implies linearity.
SE'I'I'LING TIME: Time required for the output function of
the DAC to settle to within 1/2LSB for a given digital input
stimulus, i.e., 0 to Full Scale.
PIN CONFIGURATIONS
Lil RFB
15 I VREF
OUT1 ,
OUT I 2
”OUT‘I
E'é Vans
GAIN ERROR: Gain error is a measure of the output error
between an ideal DAC and the actual device output. It is measured
with all Is in the DAC after offset error has been adjusted out
and is expressed in Least Significant Bits. Gain error is adjustble
to zero with an external potentiometer.
FEEDTHROUGH ERROR: Error caused by capacitive coupling
from VREF to output with all switches OFF.
OUTPUT CAPACITANCE: Capacity from low, and Iotrr2
terminals to ground.
OUTPUT LEAKAGE CURRENT: Current which appears on
Iovau terminal with all digital inputs LOW or on Iourz terminal
when all inputs are HIGH. '
GNDI 3 " I VDD l '
GND 4 LJ
arr 1 (MSNE AD7533 El BIT 10(LSBI an’ 1 (M53) 5
TOP VIEW Me. 6 $2733,-
BIT C: (NOT TO SCALE) EB” 9 Bin 7 (Notto Seal.)
BIT a a
BIT3|5 11I8IT8
" 1foo
" arr 10(LSB) AD7533'
TOP VIEW
16 MC. (Not to Scale)
15 BIT 9
" MT l
BIT d 7 10 IBIT 7 9 10 " 12
C In o o
t t: a t
in El m
BITS 8
9|BlT6
REV. A
.N.C. ARE NO CONNECT PINS
.N.C. ARE NO CONNECT PINS
AD7533
CIRCUIT DESCRIPTION
GENERAL CIRCUIT INFORMATION
The AD7533, a 10-bit multiplying D/A converter, consists of a
highly stable thin film R-2R ladder and ten CMOS current
switches on a monolithic chip. Most applications require the
addition of only an output operational amplifier and a voltage or
current reference.
The simplified D/A circuit is shown in Figure 1. An inverted R-
2R ladder structure is used - that is, the binarily weighted
currents are switched between the lou-ri and Iotrr2 bus lines,
thus maintaining a constant current in each ladder leg independent
of the switch state.
vREF 10k 10k 10k
20k 20k 20k
sa S-N
I I I I
" I .T l
I I t v , £'ou72
I I I I
l I I I 0 low:
I l L... - __.I 10k
I I I ( I “FEEDBACK
BIT 1 (MSB) BIT 2 BIT 3 BIT10(LSB)
DIGITAL INPUTS (DTL/TTL/CMOS COMPATIBLE)
Figure 1. AD7533 Functional Diagram
One of the CMOS current switches is shown in Figure 2. The
geometries of devices 1, 2 and 3 are optimized to make the
digital control inputs DTL/TTL/CMOS compatible over the full
military temperature range. The input stage drives two inverters
(devices 4, S, 6 and 7) which in turn drive the two output N
channels. The "ON" resistances of the switches are binarily
sealed so the voltage drop across each switch is the same. For
example, switch 1 of Figure 2 was designed for an "ON" resistance
of 200, switch 2 for 400., and so on. For a 10V reference input,
the current through switch 1 is 0.5mA, the current through
switch 2 is 0.25mA, and so on, thus maintaining a constant
10mV drop across each switch. It is essential that each switch
voltage drop be equal if the binarily weighted current division
property of the ladder is to be maintained.
1 TO LADDER
EQUIVALENT CIRCUIT ANALYSIS
The equivalent circuits for all digital inputs high and all digital
inputs low are shown in Figures 3 and 4. In Figure 3 with all
digital inputs low, the reference current is switched to 10m.
The current source [LEAKAGE is composed of surface and junc-
tion leakages to the substrate while the 1%- current source
represents a constant 1-bit current drain through the termination
resistor on the R-2R ladder. The "ON'' capacitance of the output
N channel switch is lOOpF, as shown on the 10m terminal.
The "OFF" switch capacitance is 35pF, as shown on the Ioun
terminal. Analysis of the circuit for all digital inputs high, as
shown in Figure 4, is similar to Figure 3; however, the "ON"
switches are now on terminal Iotrm, hence the 100pF at that
terminal.
'r-"' “FEEDBACK
L-os,,,
Ft a 10m f [LEAKAGE
'FIEF E
- O'oun
VREFC NNN- - -
R i""' iglmmucs imam:
Figure 3. AD7533 Equivalent Circuit - All Digital Inputs
RFEEDBACK
R us. 10hf2
VREFC "te. _ - l I 4)me
l mo“ +$ILEAKAGE (r'''
l 'LEAKAGE 6
Figure 4. AD7533 Equivalent Circuit - All Digital Inputs
DTLTTL, 250it
CMOS . l
Hes 457i
' j 'our,
Figure 2. CMOS Switch
REV. A
AD7533
OPERATION
UNIPOLAR BINARY OPERATION
(2-QUADRANT MULTIPLICATION)
BIPOLAR OPERATION
(4-QUADRANT MULTIPLICATION)
DIGITALINPUT ANALOG OUTPUT DIGITALINPUT ANALOG OUTPUT
MSB LSB (Vova. as showninFigure 5) MSB LSB (Vour as showninFigure 6)
1023 511
1111111111 VREF(m) 1111111111 +VREF(m)
1000000001 -vREr(-il-34) 1000000001 +VREF(W)
512 _v F
1000000000 -vREF(u54ij---vR-2EF 1000000000 0
0111111111 -V & 0111111111 -V i)
REF 1024 REF 512
0000000001 -VREF(fo-24) 0000000001 -vREr(i-1121-)
o _ 512
0000000000 -VRE/d-'24)---0 0000000000 -vREr(i1m2)
1. Nominal LSB magnitude for the circuit of
Figure 5 is given by LSB = VREF ($4)
Table I. Unipolar Binary Code Table
BIPOLAR ANALOG INPUT
UNIPOLAR t
DIGITAL
INPUT ,
:LSE [
NOTES:
I. RI AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
2. C1 PHASE COMPENSATION (5 -t5PF)MAY BE REQUIRED WHEN
USING HIGH SPEED AMPLIFIER.
Figure 5. Unipolar Binary Operation (2-0uadrant
Multiplication)
1. Nominal LSB magnitude for the circuit of
Figure 6 is given by LSB = VREF (T12)
Table II. Bipolar (Offset Binary) Code Table
BIPOLAR
ANALOG
t 10V 'ho
swouxa H.
DIGITAL l LSB
INPUT Je'-' 13
1. R3, H4 AND R5 SELECTED FOR MATCHING AND TRACKING,
2, R1, R2 USED ONLY IF GAIN ANUSTMENT IS REQUIRED.
3, C1 PHASE COMPENSATION (5-15pF) MAY BE REQUIRED WHEN
USING HIGH SPEED AMPLIFIERS,
Figure 6. Bipolar Operation (4-0uadrant Multiplication)
APPLICATIONS
lO-BIT AND SIGN MULTIPLYING DAC
BIPOLAR
ANALOG INPUT
MSB F'-' u l R” 1a m
' 's oun
l - IQ ADISIZDIJN
AD7533 , ADSI 5k r
l LSB 2 OUT2 o m 12,is.itn Vow
Y-tae'---- HI
MAonnuDEt
'" ans
DlGl'Al 3
INPUT l GNU
SIGN mr
REV. A
PROGRAMMABLE FUNCTION GENERATOR
CALIBRATE
f ' WAVE
'MN 121 Im u. 10e t%
V90 NC
M58 15 u -
C, [RVANGULAR
DIGITAL I
rnwumcv l
' L55 H WAVE
CONTROL
