AD7524 Fast Delivery |IC PHOENIX CO.,LIMITED

AD7524 ,CMOS 8-Bit Buffered Multiplying DACSPECIFICATIONS1 Limit, T = +258C Limit, T , TA MIN MAXParameter V = +5 V V = +15 V V ..
AD7524AQ ,CMOS 8-Bit Buffered Multiplying DACSPECIFICATIONS1 Limit, T = +258C Limit, T , TA MIN MAXParameter V = +5 V V = +15 V V ..
AD7524AQ ,CMOS 8-Bit Buffered Multiplying DACapplications. AD7524TQ –55°C to +125°C ±1/4 LSB Q-16AD7524UQ –55°C to +125°C ±1/8 LSB Q-16AD7524SE ..
AD7524AQ ,CMOS 8-Bit Buffered Multiplying DACcharacteristics (2- or 4-quadrant) make AD7524CQ –40°C to +85°C ±1/8 LSB Q-16the AD7524 an ideal ch ..
AD7524BQ ,CMOS 8-Bit Buffered Multiplying DACSpecifications subject to change without notice.–2– REV. BAD7524ABSOLUTE MAXIMUM RATINGS* Power Dis ..
AD7524JN ,CMOS 8-Bit Buffered Multiplying DACGENERAL DESCRIPTIONThe AD7524 is a low cost, 8-bit monolithic CMOS DACdesigned for direct interface ..
ADG419BN ,LC2MOS Precision Mini-DIP Analog SwitchSpecifications subject to change without notice.REV. A–2–ADG419Single Supply (V = +12 V 6 10%, V = ..
ADG419BR ,LC2MOS Precision Mini-DIP Analog SwitchSpecifications subject to change without notice.REV. A–2–ADG419Single Supply (V = +12 V 6 10%, V = ..
ADG419BRM ,LC2MOS Precision Mini-DIP Analog SwitchGENERAL DESCRIPTION PRODUCT HIGHLIGHTSThe ADG419 is a monolithic CMOS SPDT switch. This 1. Extende ..
ADG419TQ ,LC2MOS Precision Mini-DIP Analog Switchapplications where the analog signal is unipolar, thetion, making the parts ideally suited for port ..
ADG419TQ ,LC2MOS Precision Mini-DIP Analog SwitchSPECIFICATIONS(V = +15 V 6 10%, V = –15 V 6 10%, V = +5 V 6 10%, GND = 0 V, unless otherwise noted) ..
ADG419TQ. ,LC2MOS Precision Mini-DIP Analog SwitchFEATURESFUNCTIONAL BLOCK DIAGRAM44 V Supply Maximum RatingsV to V Analog Signal RangeSS DDLow On Re ..

AD7524
CMOS 8-Bit Buffered Multiplying DAC
REV.BCMOS
8-Bit Buffered Multiplying DAC
FEATURES
Microprocessor Compatible (6800, 8085, Z80, Etc.)
TTL/CMOS Compatible Inputs
On-Chip Data Latches
Endpoint Linearity
Low Power Consumption
Monotonicity Guaranteed (Full Temperature Range)
Latch Free (No Protection Schottky Required)
APPLICATIONS
Microprocessor Controlled Gain Circuits
Microprocessor Controlled Attenuator Circuits
Microprocessor Controlled Function Generation
Precision AGC Circuits
Bus Structured Instruments
GENERAL DESCRIPTION
The AD7524 is a low cost, 8-bit monolithic CMOS DAC
designed for direct interface to most microprocessors.
Basically an 8-bit DAC with input latches, the AD7524’s load
cycle is similar to the “write” cycle of a random access
memory. Using an advanced thin-film on CMOS fabrication
process, the AD7524 provides accuracy to 1/8 LSB with a typi-
cal power dissipation of less than 10 milliwatts.
A newly improved design eliminates the protection Schottky
previously required and guarantees TTL compatibility when
using a +5 V supply. Loading speed has been increased for
compatibility with most microprocessors.
Featuring operation from +5 V to +15 V, the AD7524 inter-
faces directly to most microprocessor buses or output ports.
Excellent multiplying characteristics (2- or 4-quadrant) make
the AD7524 an ideal choice for many microprocessor con-
trolled gain setting and signal control applications.
FUNCTIONAL BLOCK DIAGRAM
ORDERING GUIDE
NOTESTo order MIL-STD-883, Class B processed parts, add/883B to part number.
Contact your local sales office for military data sheet. For U.S. Standard
Military Drawing (SMD) see DESC drawing #5962-87700.E = Leadless Ceramic Chip Carrier: N = Plastic DIP; P = Plastic Leaded Chip
Carrier; Q = Cerdip; R = SOIC.
AD7524–SPECIFICATIONS
NOTES
1Temperature ranges as follows:J, K, L versions: –40°C to +85°C
A, B, C versions: –40°C to +85°C
S, T, U versions: –55°C to +125°C
2Gain error is measured using internal feedback resistor. Full-Scale Range (FSR) = VREF.
3Guaranteed not tested.
4DAC thin-film resistor temperature coefficient is approximately –300 ppm/°C.
(VREF = +10 V, VOUT1 = VOUT2 = 0 V, unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS*
(TA = +25°C, unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +17 V
VRFB to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±25 V
VREF to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±25 V
Digital Input Voltage to GND . . . . . . . .–0.3 V to VDD +0.3 V
OUT1, OUT2 to GND . . . . . . . . . . . . .–0.3 V to VDD +0.3 V
Power Dissipation (Any Package)
To +75°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .450 mWDerates above 75°C by . . . . . . . . . . . . . . . . . . . .6 mW/°C
Operating Temperature
Commercial (J, K, L) . . . . . . . . . . . . . . . . .–40°C to +85°C
Industrial (A, B, C) . . . . . . . . . . . . . . . . . .–40°C to +85°C
Extended (S, T, U) . . . . . . . . . . . . . . . . .–55°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . .+300°C*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7524 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
TERMINOLOGY
RELATIVE ACCURACY:A measure of the deviation from a
straight line through the end points of the DAC transfer function.
Normally expressed as a percentage of full scale range. For the
AD7524 DAC, this holds true over the entire VREF range.
RESOLUTION: Value of the LSB. For example, a unipolar con-
verter with n bits has a resolution of (2–n) (VREF). A bipolar con-
verter of n bits has a resolution of [2–(n–1)] [VREF]. Resolution in no
way implies linearity.
GAIN ERROR:Gain Error is a measure of the output error be-
tween an ideal DAC and the actual device output. It is measured
with all 1s in the DAC after offset error has been adjusted out
and is expressed in LSBs. Gain Error is adjustable to zero with
an external potentiometer.
FEEDTHROUGH ERROR:Error caused by capacitive cou-
pling from VREF to output with all switches OFF.
OUTPUT CAPACITANCE: Capacity from OUT1 and
OUT2 terminals to ground.
OUTPUT LEAKAGE CURRENT:Current which appears
on OUT1 terminal with all digital inputs LOW or on OUT2
terminal when all inputs are HIGH. This is an error current
which contributes an offset voltage at the amplifier output.
PIN CONFIGURATIONS
DIP, SOICPLCCLCCC
AD7524
WRITE MODE
When CS and WR are both LOW, the AD7524 is in the
WRITE mode, and the AD7524 analog output responds to data
activity at the DB0–DB7 data bus inputs. In this mode, the
AD7524 acts like a nonlatched input D/A converter.
HOLD MODE
When either CS or WR is HIGH, the AD7524 is in the HOLD
mode. The AD7524 analog output holds the value correspond-
ing to the last digital input present at DB0–DB7 prior to WR or
CS assuming the HIGH state.
MODE SELECTION TABLE
L = Low State, H = High State, X = Don't Care.
WRITE CYCLE TIMING DIAGRAM
CIRCUIT DESCRIPTION
CIRCUIT INFORMATION
The AD7524, an 8-bit multiplying D/A converter, consists of a
highly stable thin film R-2R ladder and eight N-channel current
switches on a monolithic chip. Most applications require the
addition of only an output operational amplifier and a voltage
or current reference.
The simplified D/A circuit is shown in Figure 1. An inverted
R-2R ladder structure is used—that is, the binarily weighted
currents are switched between the OUT1 and OUT2 bus lines,
thus maintaining a constant current in each ladder leg indepen-
dent of the switch state.
Figure 1.Functional Diagram
EQUIVALENT CIRCUIT ANALYSIS
The equivalent circuit for all digital inputs LOW is shown in
Figures 2. In Figure 2 with all digital inputs LOW, the refer-
ence current is switched to OUT2. The current source ILEAKAGE
is composed of surface and junction leakages to the substrate
while the
256 current source represents a constant 1-bit cur-
rent drain through the termination resistor on the R-2R ladder.
The “ON” capacitance of the output N-channel switches is
120 pF, as shown on the OUT2 terminal. The “OFF” switch
capacitance is 30 pF, as shown on the OUT1 terminal. Analysis
of the circuit for all digital inputs high is similar to Figure 2
however, the “ON” switches are now on terminal OUT1, hence
the 120 pF appears at that terminal.
Figure 2.AD7524 DAC Equivalent Circuit—All Digital
Inputs Low
ANALOG CIRCUIT CONNECTIONS
Figure 4.Unipolar Binary Operation
(2-Quadrant Multiplication)
Table I.Unipolar Binary Code Table
Note: 1 LSB = (2–8)(VREF) = 1/256 (VREF)
MICROPROCESSOR INTERFACE
Figure 6.AD7524/8085A Interface
Figure 5.Bipolar (4-Quadrant) Operation
Table II.Bipolar (Offset Binary) Code Table
Note: 1 LSB = (2–7)(VREF) = 1/128 (VREF)
Figure 7.AD7524/MC6800 Interface
AD7524AD7524
AD7524
POWER GENERATION
Figure 8.

Partno	Mfg	Dc	Qty	Available	Descript
AD7524	AD	N/a	2	avai	CMOS 8-Bit Buffered Multiplying DAC