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AD745JN-AD745JR-16
Ultralow Noise, High Speed, BiFET Op Amp
CONNECTION DIAGRAMS
Ultralow Noise,
High Speed, BiFET Op Amp
PRODUCT DESCRIPTIONThe AD745 is an ultralow noise, high speed, FET input
operational amplifier. It offers both the ultralow voltage noise
and high speed generally associated with bipolar input op amps
and the very low input currents of FET input devices. Its 20
MHz bandwidth and 12.5 V/μs slew rate makes the AD745 an
ideal amplifier for high speed applications demanding low noise
and high dc precision. Furthermore, the AD745 does not
exhibit an output phase reversal.
REV.C
Information furnished by Analog Devices is believed to be accurate and
The AD745’s guaranteed, tested maximum input voltage noise
of 4 nV/√Hz at 10 kHz is unsurpassed for a FET-input mono-
lithic op amp, as is its maximum 1.0 μV p-p noise in a 0.1 Hz to
10 Hz bandwidth. The AD745 also has excellent dc perfor-
mance with 250 pA maximum input bias current and 0.5 mV
maximum offset voltage.
The internal compensation of the AD745 is optimized for
higher gains, providing a much higher bandwidth and a faster
slew rate. This makes the AD745 especially useful as a
preamplifier where low level signals require an amplifier that
provides both high amplification and wide bandwidth at these
higher gains. The AD745 is available in five performance
grades. The AD745J and AD745K are rated over the
commercial temperature range of 0°C to +70°C. The AD745A
and AD745B are rated over the industrial temperature range of
–40°C to +85°C. The AD745S is rated over the military
temperature range of –55°C to +125°C and is available
processed to MIL-STD-883B, Rev. C.
The AD745 is available in 8-pin plastic mini-DIP, 8-pin cerdip,
16-pin SOIC, or in chip form.
FEATURES
ULTRALOW NOISE PERFORMANCE
2.9 nV/ÏHz at 10 kHz
0.38 mV p-p, 0.1 Hz to 10 Hz
6.9 fA/ÏHz Current Noise at 1 kHz
EXCELLENT AC PERFORMANCE
12.5 V/ms Slew Rate
20 MHz Gain Bandwidth Product
THD = 0.0002% @ 1 kHz
Internally Compensated for Gains of +5 (or –4) or
Greater
EXCELLENT DC PERFORMANCE
0.5 mV max Offset Voltage
250 pA max Input Bias Current
2000 V/mV min Open Loop Gain
Available in Tape and Reel in Accordance with
EIA-481A Standard
APPLICATIONS
Sonar
Photodiode and IR Detector Amplifiers
Accelerometers
Low Noise Preamplifiers
High Performance Audio
16-Pin SOIC (R) Package
8-Pin Plastic Mini-DIP (N) &
AD745–SPECIFICATIONS(@ +258C and 615 V dc, unless otherwise noted)INPUT OFFSET VOLTAGE
INPUT BIAS CURRENT
INPUT IMPEDANCE
INPUT VOLTAGE RANGE
INPUT VOLTAGE NOISE
OPEN LOOP GAIN
OUTPUT CHARACTERISTICS
POWER SUPPLY
NOTESInput offset voltage specifications are guaranteed after 5 minutes of operations at TA = +25°C.Test conditions: +VS = 15 V, –VS = 12 V to 18 V and +VS = 12 V to +18 V, –VS = 15 V.Bias current specifications are guaranteed maximum at either input after 5 minutes of operation at TA = +25°C. For higher temperature, the current doubles every 10°C.Gain = –4, RL = 2 kΩ, CL = 10 pF.
ORDERING GUIDE*N = Plastic DIP; R = Small Outline IC.
ABSOLUTE MAXIMUM RATINGS1Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Internal Power Dissipation2
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 W
Cerdip Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 W
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 W
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Differential Input Voltage . . . . . . . . . . . . . . . . . . +VS and –VS
Storage Temperature Range (Q) . . . . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C
Operating Temperature Range
AD745J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
AD745A/B . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
AD745S . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . .+300°C
NOTESStresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.8-Pin Plastic Package: θJA = 100°C/W, θJC = 50°C/W
8-Pin Cerdip Package: θJA = 110°C/W, θJC = 30°C/W
8-Pin Plastic SOIC Package: θJA = 100°C/W, θJC = 30°C/W
ESD SUSCEPTIBILITYAn ESD classification per method 3015.6 of MIL-STD-883C
has been performed on the AD745, which is a class 1 device.
Using an IMCS 5000 automated ESD tester, the two null pins
will pass at voltages up to 1000 volts, while all other pins will
pass at voltages exceeding 2500 volts.
METALIZATION PHOTOGRAPHDimensions shown in inches and (mm).
AD745
–Typical Characteristics(@ + 258C, VS = 615 V unless otherwise noted)Figure 1.Input Voltage Swing vs.
Supply Voltage
5101520
QUIESCENT CURRENT – mA
SUPPLY VOLTAGE – VOLTSFigure 4.Quiescent Current vs.
Supply Voltage
–1212
COMMON-MODE VOLTAGE – Volts–6–3369
INPUT BIAS CURRENT – pA
100Figure 7.Input Bias Current vs.
Common-Mode Voltage
Figure 2.Output Voltage Swing vs.
Supply Voltage
TEMPERATURE – °C–9
INPUT BIAS CURRENT – AmpsFigure 5.Input Bias Current vs.
Temperature
Figure 8.Short Circuit Current Limit
vs. Temperature
Figure 10.Open-Loop Gain and
Phase vs. Frequency
Figure 13.Common-Mode Rejection
vs. Frequency
Figure 16.Total Harmonic Distortion
vs. Frequency
Figure 11.Slew Rate vs.
Temperature
Figure 14. Power Supply Rejection
vs. Frequency
Figure 17.Input Noise Voltage
Spectral Density
AD745
–Typical CharacteristicsFigure 19.Distribution of Offset
Voltage Drift. TA = +25°C to +125°C
F
+VS
10pF
20pF
499W
SQUARE
WAVE
INPUT
VIN
VOUTFigure 22a.Gain of 5 Follower,
8-Pin Package Pinout
F
+VS
–VS
499W
SQUARE
WAVE
INPUTIN
20pFFigure 23a.Gain of 4 Inverter,
8-Pin Package Pinout
Figure 20.Typical Input Noise
Voltage Distribution @ 10 kHz
Figure 22b. Gain of 5 Follower
Large Signal Pulse Response
Figure 23b.Gain of 4 Inverter Large
Signal Pulse Response
F0.1mF
0.1mF1mF
+VS
–VSFigure 21.Offset Null Configuration,
8-Pin Package Pinout
Figure 22c. Gain of 5 Follower Small
Signal Pulse Response
Figure 23c.Gain of 4 Inverter Small
Signal Pulse Response
