AD7248JP ,LC2MOS 12-Bit DACPORTSPECIFICATIONS
=+15ll s-ssl. G-- - -15ll t5tgl. AGND= BEND: w,. Ik-- - 2knto END; tk-- - IUOtho ..
AD7248JP ,LC2MOS 12-Bit DACPORTspecifications Tmin to u, unless oiheneise stated.)
Parameter J, A Version2 Units Test Condition ..
AD7249AR ,LC2MOS Dual 12-Bit Serial DACPORT
AD7249AR ,LC2MOS Dual 12-Bit Serial DACPORT
AD724JR ,RGB to NTSC/PAL EncoderSPECIFICATIONSParameter Conditions Min Typ Max UnitsSIGNAL INPUTS (RIN, GIN, BIN)Input Amplitude Fu ..
AD724JR- ,RGB to NTSC/PAL EncoderSpecifications are subject to change without notice.–2– REV. BAD724ABSOLUTE MAXIMUM RATINGS*PIN CON ..
ADD8754ACPZ-REEL , LCD Panel Power, VCOM, and Gate Modulation
ADD8754ACPZ-REEL , LCD Panel Power, VCOM, and Gate Modulation
ADDAC80-CBI-I ,COMPLETE LOW COST 12-BIT D/A CONVERTERSapplications where reliability and cost are of paramount
importance.
Advanced circuit design an ..
ADDAC80-CBI-V ,COMPLETE LOW COST 12-BIT D/A CONVERTERSFEATURES
Single Chip Construction
On-Board Output Amplifier
Low Power Dissipation: 300mW mm”
..
ADDAC80CBI-V ,COMPLETE LOW COST 12-BIT D/A CONVERTERSCHARACTERISTICS
ACCURACY
Linearity Error Ca, + 25%
CBI LS B 1
CCD LS B
TA 6? Trninto Tm" LSB
..
ADDAC80-CCD-V ,COMPLETE LOW COST 12-BIT D/A CONVERTERSCHARACTERISTICS
ACCURACY
Linearity Error Ca, + 25%
CBI LS B 1
CCD LS B
TA 6? Trninto Tm" LSB
..
AD7245AQ-AD7245JN-AD7245JP-AD7248JN-AD7248JP
LC2MOS 12-Bit DACPORT
ANALOG
DEVICES
Ill-Bit DACPORTS
A07245/h07248
FEATURES
12-Bit CMOS DAC with Output Amplifier and
Reference
Parallel Loading Structure: AD7245
(8+4) Loading Structure: AD7248
Single or Dual Supply Operation
Fast Digital Interface (80ns th-tit" Pulse)
Low Power (65mW typ)
th3", Skinny, 20- and 24-Pin DIP
20- and 28-Terminal Surface Mount Packages
NOTE: AD7245A/AD7248A IS RECOMMENDED FOR
NEW DESIGNS
GENERAL DESCRIPTION
The AD724S/AD7248 is a complete 12-bit, voltage-output,
digital-to-analog converter with output amplifier and Zener
voltage reference on a monolithic CMOS chip. No external
trims are required to achieve full specified performance for the
The part features double-buffered interface logic with a 12-bit
input latch and 12-bit DAC latch. The data held in the DAC
latch determines the analog output of the converter. The AD7245
accepts 12-bit parallel data which is latched into the input latch
on the rising edge of E or W. The AD7248 has an 8-bit-wide
data bus, and data is loaded to the input latch in two write
operations, an 8-bit LSB load and a 4-bit MSB loud. The input
data must be right justified. For both parts, an asynchronous
LDAC signal transfers data from the input latch to the DAC
latch. The AD7245 also has a CLR signal on the DAC latch
which allows features such as power-on reset to be implemented.
All logic inputs are level triggered and are TTL and CMOS
(5V) level compatible, while the control logic is speed compatible
with most microprocessors.
The on-chip 5V buried Zener diode provides a low-noise, tem-
perature compensated reference for the DAC, The gain setting
resistors allow a number of ranges at the output: 0 to + 5V, 0 to
+ 10V when using single supply and 0 to + 5V, - 5V to + 5V
when operated in dual supplies. The output amplifier is capable
of developing + 10V across a 2kn load to GND.
The AD7245/AD7248 is fabricated in an all ion-implanted,
high-speed linear, compatible CMOS (LC2MOS) process. The
AD7245 is packaged in a small, 0.3"-wide, 24-pin DIP and 28-
terminal surface mount packages. The AD7248 is available in a
0.3"-wide, 20-pin DIP and 20-terminal surface mount
packages.
REV. A
Information furnished by Analog Devices is believed to be accurate
and reliable. However, no responsibility is assumed by Analog Devices
for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implica-
tion or otherwise under any patent or patent rights of Analog Devices.
FUNCTIONAL BLOCK DIAGRAMS
ke, REF our Ron
CONTROL
AD7245
Von Vnu Ron
DAC LATCH
WR . CONTROL
- LOGIC
AD7248
DB7 -a, DGND
PRODUCT HIGHLIGHTS
1. Complete 12-Bit DACPORTTM
The AD724S/AD7248 is a complete, voltage output, lZ-bit
DAC on one chip. This single-chip design of the DAC reference
and output amplifier is inherently more reliable than multichip
designs.
2, Microprocessor Compatibility
The parallel loading structure of the AD7245 allows connection
to microprocessors with a 16-bit-wide data bus. The AD7248
is aimed at microprocessors which have an 8-bit-wide data
bus structure. The high-speed logic of both parts allows
direct interfacing to most modern microprocessors. Addition-
ally, the double buffered interface enables simultaneous
update of the AD7245/AD7248 in multiple DAC systems.
DACPORT is a trademark of Analog Devices, Inc.
One Technology Way; P. O. Box 9106; Norwood, MA 02062-9106
Tel: 617/329-4700 TWX: 710/394-6577
West Coast Atta ntic
714/641-9391 215/643-7790
Central
214/231 -5094
SPECIFICATIONS
(ll = + 15ll s-5%1. ll = AGND = DGND --W; R = 2kn to Mil; c = 101]me END; REF OUT unloaded
S I N G LE so PPLY 2U, otherwise stated. ssl, sptsifieatitms u, to u, 2Li', otheneise stgted.)
Parameter J, A Version' s Version2 Units Test Conditions/Comments
STATIC PERFORMANCE
Resolution 12 12 Bits
Relative Accuracy , 1 LSB max
tl LSBmax Vor, = +11.4V(o +14.25V
tl.5 LSBmax V00: +14.25Vlo +15.75V
Differential Nonlinearity' t 1 z 1 LSB max Guaranteed Monotonic
Unipolar Offset Errors '
at + 25°C t 3 3 LSB max
Tu, to Tu, t 5 t 5 LSB max Typical Tempco is t Sppm of FSRV'C
DAC Gain Error"5 t 2 _ 2 LSB max
Full-Scale Output Voltage Errors
TA = +25T t0.2 ue0.2 ''/oofFSRmax Voo = +15Vfor],AGrades;
VDD f +12V& +15VforSGrade
Tm". (on tih6 %ofFSRmax Voo-- 1 12V& +15V
AFull Scalc/AVDD
TA = + 25°C t 0.12 , 0.12 % ofFSR/Vmax AVDD = + 5%
Full-Scale Temperature
Coefficient' : 30 ppm of FSR/°C max
AOffsct/AVDD t 1 - 2 mV max AVDD = , 5%
REFERENCE
Reference Outpuuu + 25°C 4.99/5.01 4.99/5.01 VmintoVmax VDD = + 15V for],AGrades;
Voo t + 12V & 1 15V forSGrade
AReference/AVor,
TA = + 25°C 6 6 mV/V max AVDD = : 5%
Reference Temperature Coefficient : 30 t 40 ppm ofFSR/T typ FSR = 5V
Reference Load Sensitivity
(AReferenceal) t 1 + 1.5 mV max Reference Load Current Change (0- lOOplA)
DIGITAL INPUTS
Input High Voltage, VIN“ 2.4 2.4 V min
Input Low Voltage, VINL 0.8 0.8 V max
Input Current
hs (Data Inputs) VIN = 0V or Von
at F 25''C : l 1 " max
Tm," to Tmax t 10 _ 10 " max
Iem(controunputs)8 Ve; = Vor,
at _ 25°C t l t wh max
Tm". to Tma, t 10 t 10 " max
IINL (Control Inputs)8 VIN = 0V
at + 25°C 150 150 " max
Tu, to Tu, 200 200 wh max
InputCapacitance9 (AD7245) 8 8 pF max
Input Capacilance9(AD7248) l6 16 pF max
ANALOG OUTPUT
Output Range Resistors 15/30 15/30 kn min/kf2 max
Ranges _ 5, + 10 + 5, + 10 V Pin Strappable. Min Load Resistance is 2kit to GND
dc Output Impedance 0.5 0.5 n typ
Short-Circuit Current 40 40 mA typ
DYNAMIC PERFORMANCES"
Output Voltage Settling Time Settling Timeto 1 ILSB. RL = 5kn,Cr. - 100pF
Positive Full-Scale Change 5 g #5 max DAC Register all Os to all Is
Negative Full-Scale Change 10 10 us typ DAC Register all Is to all Os
Output Voltage Slew Rate 2 1.5 V/ws min
Digital Fecdthrough"lo IO 10 nV secs typ
Digital-to-Analog Glilch Impulse 30 30 nV secs typ Major Carry Transition
POWER SUPPLIES
Vor, Range 14.25/15.75 l 1.4/15.75 V min/V max For Specified Performance
Iran Output Unleaded
at t 25''C 9 9 mA max Typically4.5mA
Tmln to me 12 12 mA max
lForth: S Vetesiononlr Vm, = o 12V , 5%to + l5V ' 5%
'Temperature ranges are " follows:
JVersion,0to y 70°C
A Version, - 25"C to - 85“C
SVemon, - 55°Cto o 125"C,
' Terminology.
'FSR means Full-Scale Range and IS 5V with Ross connected m Res, Vot-r and 10V with Raps connected IO GND and RH; connected to Von-
'This error is calculated with respect to the reference voltage and is measured after the offset error has been allowed for.
"This error is calculated w.r.1. an ideal 4.9988V (on the 5V range) or 9S976Wonthe IOV range).
ll includes the effects ofintemal voltage reference, gain and offset errors,
7Full-scale TC. = AFSJAT. where AFS is the {ull-scale change from TA = + 25°C [on or Tmax.
“Comm: inputs areC_S, V11, LDAC mam for AD7245 and CSMSB, csisB,trrt and LDAC for AD7248.
'Sample tested at + 25"C Ioensurccompliance.
"The metal lid on the AD7245 (only)ccramic (D-24A) package is connected m Pin 12 (DGND).
Srmciiicaans subject [0 change without noucc.
AD7245/AD7248
SPECIFICATIONS
DUAL SUPPLY
(lla, = +15ll sm','. hs = -158 :5%'.AGND = DGND=0V; R; = 2knto END; tk = Mprto Mit. ilEFWrtmloaded
unless otherwise stated. All specifications u, to u, unless othelwise stated.)
Parameter J, A Version2 s Version2 Units Test Conditions/Comments
STATIC PERFORMANCE
Resolution 12 12 Bits
Relative Accuracy' ut 1 LSB max
tl LSB max Voo/Vss - tll.4Vto :14.25V
21.5 LSBmax VooNss = : 14.25N' lo 215.7SV
Differential Nonlinearity' t I It 1 LSB max Guaranteed Monotonic
Bipolar Zero Offset Errors ROFS Connected to REF OUT
at + 25''C t 3 - 3 LSB max
Tm,,, lo Tma, t 5 t 5 LSB max Typical Tempco is Le 3ppm ofFSR4/oc
DAC Gain Error'" I 2 - 2 LSB max
Full-Scale Output Voltage Errors
TA = +2Y'C :0.2 20.2 %ofFSRmax Voo/Vss = tl5VforJ,AGrades;
VDD/VSS = : 12V& : 15V forSGrade
Tmsn to Tma,, - 0.6 % ofFSR max VDDNSS = ; 12V & _ 15V
AFull Scale/AVoo
TA = f 25°C t 0.12 t 0.12 %ofFSR/V max AVDD = Lt 5%
AFull Scale/AVss
TA = ' 25°C "c 0.01 ue 0.01 %ofFSWVmax AVss = t 5%
Full-Scale Temperature
Coemcient7 t 30 ppm of FSR/“C max
A0ffset/AVon Lt 1 ec mV max AVDD = t 5%
AOffset/AVss t 1 t 1 mV max AVss = t 5%
REFERENCE
ReferenceOurpur (u + 25°C 4.99/5.01 4.99/5.01 Vmin Ionax VDDIVSS = : 15V forJ,AGrades;
VDD/Vss = t12V& :15VforSGrade
AReference/AVDD
TA = F 25"C 6 6 mVN max Avon = r 5%
Reference Temperature Coefficient t 30 - 40 ppm of FSR/T typ FSR = 5V
Reference Load Sensitivity Reference Load Current Change
(AReferencc/AI) - 1 - 1.5 mV max (0~100uA)(Notlnc1uding ROFS Current)
DIGITAL INPUTS
Input High Voltage, VIN” 2.4 2.4 V min
Input Low Voltage, le, 0.8 0.8 V max
Input Current
lm, (Data Inputs) VIN - 0V or Von
at + 25''C t 1 xl MA max
Tm... to Tmax : 10 t 10 " max
Imr, (Control Inputs)' VIN - Vor,
at + 25°C t 1 1 " max
Tu, to Tu, t 10 10 wh max
IINL (Control Inputs)a VIN = 0V
at , 25°C 150 150 " max
Tmin to Tmax 200 200 " max
Input Capacitance' (AD7245) 8 8 pF max
Inputcapacitance''(AD7248) 16 16 pF max
ANALOG OUTPUT
Output Range Resistors 15/30 15/30 kn min/kn max
Ranges , 5, + 5 t 5, + 5 V Pin Strappable. Min Load Resistance is 2kft io GND
dc Output impedance 0.5 0.5 ft lyp
Short-Circuit Current 40 40 mA typ
DYNAMIC PERFORMANCE'
Output Voltage SeulingTime Settling Time to _ 1LSB. R17 5kft, Cr. = IOOpF
Positive Full-Scale Change 5 10 us max DAC Register all0sto all ls
Negative Full-Scale Change 10 10 us max DAC Register all ls loall Os
Output Voltage Slew Rate 2 1.5 Wes min
Digital Feetithroughv0 10 10 nV secs typ
Digital-to-Analog Glitch Impulse 30 30 nV secs wp Major Carry Transition
POWER SUPPLIES
VDpRange 14.25/15.7S 11.4/15.7S VminN max For Specified Performance
Vss Range -l4.25/-15.75 - 11.4/ - 15.75 V min/V max For Specified Performance
lon Output Unleaded
at + 25''C 9 9 mA max Typically SmA
Tm“ to Tmax 12 12 mA max
Iss Output Unloaded
at + 25°C 3 3 mA max Typically 2mA
Tmu, to Tu, S 5 mA max
'Forthe SVersiononly: Vor, = +12V t 5%t0 + 15V t 5%; Vss = -12V t 5% to -15V t 5%.
'Temperature ranges are as follows:
J Version,010 A- 70°C
A Version, - 25°C to + 85°C
SVersion. 55“C to + 125°C.
'see Terminology.
'FSR means Full-Scale Range and is 5V with Rops connected to RFB, VOL'T and 10V with Rors connected to GND and Riris connected to Vour.
5This error is calculated with respect to the reference voltage and is measured after the offset error has been allowed for.
'This error is calculated w.r.t. an ideal 4.9988V (0n the 5V range) or9.9976V (0n the 10V range).
It includes the effects of internal voltage reference, gain and offset errors.
Yumscaie T.C. = a-FS/ir, where AFS is the full-scale change from TA = f 25°92 Tm," or Tma,.
8Control inputs are CS, WR, LDAC and CLR for AD7245 and CSMSB, CSLSB, WR and LDAC for AD7248.
9Sample tested at + 25°C to ensure compliance.
"'rhe metal lid on the AD7245 (only) ceramic (D-24A) package is connected to Pin 12 (DGND).
Specifications subject to change without notice.
SWITCHING CHARACTERISTICS1 (lla, = +15ll sss2,urss = Ill! or -15ll 15%2;See Figures5aad 7)
Parameter I Grade A Grade S Grade Units Conditions
(it ' 25°C 80 80 105 ns min Chip Select Pulse Width
Tmin to Tmax 100 100 135 ns min
(u + 25°C 80 80 105 ns min Write Pulse Width
Tmm to Tmax 100 100 135 ns min
(a + 25°C 0 0 0 ns min Chip Select to Write Setup Time
Tmu, to Tmax 0 0 0 ns min
(a + 25°C 0 0 0 ns min Chip Select to Write Hold Time
Tmin to Tmax 0 0 0 ns min
ts (AD7245 Only)
(tt f 25°C 100 100 155 ns min Data Valid to Write Setup Time
Tmin to Tmax 110 130 250 ns min
t5 (AD7248 Only)
(a + 25°C 110 110 180 ns min Data Valid to Write Setup Time
Tmin to Tmax 130 130 270 ns min
(u ' 25°C 10 10 10 ns min Data Valid to Write Hold Time
Tmm to Tmax 10 10 10 ns min
(u 1 25°C 80 80 90 ns min Load DAC Pulse Width
Tmin lo Tmax 100 100 120 ns min
te (AD7245 Only)
(a + 25°C 80 80 140 ns min Clear Pulse Width
Tmin to Tmax 100 100 200 ns min
lSample tested at + 25°C to ensure compliance.
Yor the S Version only: Voo= +12V t 5% to +15V t 5%; Vss = 0V or
Specifications subject to change without notice.
12V t-5% to -15V t5%.
ABSOLUTE MAXIMUM RATINGS"
VDD to AGND ................. -0.3V, + 17V Industrial ................. -25''C to + 85°C
Vor, to DGND ................. -0.3V, + 17V Extended ................. - 55°C to + 125°C
Voo to Vss ................... -0.3V, + 34V Storage Temperature ............ -65'C to + 150°C
AGND to DGND ................ -0.3V, VDD Lead Temperature (Soldering, 10secs) ........ + 300°C
Digital Input Voltage to DGND -0.3V, Voo +0.3V NOTE
VOLT to AGNDl .................. Vss, VDD 'The output maybeshorted to voltagesinthis range provided the
Voc, to Vssl .p......-.......... 0V, + 24V power dissipation of the package is not exceeded.
VOLT to 1rryol .................... - 32V, 0V
REF OUT1 to AGND ................. 0V, Voto *Stresses above those listed under "Absolute Maximum Ratings" may
Power Dissipation (Any Package) to +75°C ..... 450mW cause permanent damage to the device. This is a stress rating only and
D t bo 75°C b 6 WPC functional operation of the device at these or any other conditions above
em, es a ve y ............... m those indicated in the operational sections of this specification is not
Operating Temperature implied. Exposure to absolute maximum rating conditions for extended
Commercial ................... O to + 70°C periods mzyaffectdevice reliability.
CAUTION
ESD (electrostatic-discharge) sensitive device. The digital control inputs are diode protect-
ed; however, permanent damage may occur on unconnected devices subject to high energy
electrostatic fields. Unused devices must be stored in conductive foam or shunts. The pro-
tective foam should be discharged to the destination socket before devices are removed.
ililMIilIIiBl
