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AD722JR-16 |AD722JR16ADN/a958avaiRGB to NTSC/PAL Encoder
AD722JR-16-REEL |AD722JR16REELADN/a1913avaiRGB to NTSC/PAL Encoder


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AD722JR-16-AD722JR-16-REEL
RGB to NTSC/PAL Encoder
RGB to NTSC/PAL EncoderFEATURES
Low Cost, Integrated Solution
+5 V Operation
Accepts FSC Clock or Crystal, or 4FSC Clock
Composite Video and Separate Y/C (S-Video) Outputs
Minimal External Components:
No External Filters or Delay Lines Required
Onboard DC Restoration
Accepts Either HSYNC & VSYNC or CSYNC
Phase Lock to External Subcarrier
Drives 75 Ω Reverse-Terminated Loads
Logic Selectable NTSC or PAL Encoding Modes
Compact 16-Pin SOIC
APPLICATIONS
RGB to NTSC or PAL Encoding
PRODUCT DESCRIPTION

The AD722 is a low cost RGB to NTSC/PAL Encoder that
converts red, green and blue color component signals into their
corresponding luminance (baseband amplitude) and chromi-
nance (subcarrier amplitude and phase) signals in accordance
with either NTSC or PAL standards. These two outputs are
also combined to provide composite video output. All three out-
puts can simultaneously drive 75 Ω, reverse-terminated cables.
All logical inputs are CMOS compatible. The chip operates
from a single +5 V supply. No external delay lines or filters are
required. The AD722 may be powered down when not in use.
The AD722 accepts either FSC or 4FSC clock. When a clock is
not available, a low cost parallel-resonant crystal (3.58 MHz
(NTSC) or 4.43 MHz (PAL)) and the AD722’s on-chip oscilla-
tor generate the necessary subcarrier clock. The AD722 also ac-
cepts the subcarrier clock from an external video source.
The interface to VGA Controllers and MPEG Video Decoders
is simple: an on-chip logic “XNOR” accepts the available verti-
cal (VSYNC) and horizontal sync (HSYNC) signals and creates
the composite sync (CSYNC) signal on-chip. If available, the
AD722 will also accept a standard CSYNC signal by connecting
VSYNC to +5 V and applying CSYNC to HSYNC pin. The
AD722 contains decoding logic to identify valid HSYNC pulses
for correct burst insertion.
Delays in the U and V chroma filters are matched by an on-chip
sampled-data delay line in the Y signal path. To prevent
aliasing, a prefilter at 5 MHz is included ahead of the delay line
and a post-filter at 5 MHz is added after the delay line to sup-
press harmonics in the output. These low-pass filters are opti-
mized for minimum pulse overshoot. The overall luma delay,
relative to chroma, has been designed to be 170 ns, which
precompensates for delays in the filters used in the IF section of
a television receiver. This precompensation delay is already
present in TV broadcasts. The AD722 comes in a space-saving
SOIC and is specified for the 0°C to +70°C commercial tem-
perature range.
FUNCTIONAL BLOCK DIAGRAMSUB-
CARRIER
NTSC/PAL
HSYNC
VSYNC
RED
GREEN
BLUE
BURST
BALANCED
NTSC/PAL
LUMINANCE
OUTPUT
COMPOSITE
OUTPUT
CHROMINANCE
OUTPUT
NTSC/PAL
CLOCK
AT 4FSC

REV.0
AD722–SPECIFICATIONS
(Unless otherwise noted, VS = +5, TA = +25°C, using FSC synchronous clock. All loads are
150 Ω ± 5% at the IC pins. Outputs are measured at the 75 Ω reverse terminated load.)

LOGIC INPUTS (SYNC, FSC, ENCD, NTSC)
VIDEO OUTPUTS
POWER SUPPLIES
NOTESR, G, and B signals are inputted to an on-chip AC coupling capacitor.All outputs measured at a 75 Ω reverse-terminated load; voltages at the IC output pins are twice those specified here.Difference between ideal color-bar phases and the actual values.
Specifications are subject to change without notice.
ORDERING GUIDE
ABSOLUTE MAXIMUM RATINGS*

SupplyVoltage VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+6V
InternalPowerDissipation . . . . . . . . . . . . . . . . . . . . . .600 mW
Operating Temperature Range . . . . . . . . . . . . . .0°C to +70°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +125°C
Lead Temperature Range (Soldering60sec) . . . . . . . .+300°C
NOTE
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics: 16-Pin SOIC Package: θJA = 100°C/W.
PIN CONFIGURATION
16-Pin Small Outline Package (Wide Body)
(R-16)
AGND
ENCD
RIN
GIN
FIN
APOS
BIN
STNDHSYNC
VSYNC
SELECT
LUMA
COMP
DPOS
DGND
CRMA
CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD722 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
AD722
PIN DESCRIPTIONS

*The Luminance, Chrominance, and Composite Outputs are at twice normal levels for driving 75 Ω reverse-terminated lines.
DPOS
VBIAS
APOS
APOS
VCLAMP
APOS

Circuit CCircuit A
IRE
VOLTS

Figure 4.100% Color Bars, NTSC
VOLTS

Figure 5.100% Color Bars, PAL
COMPOSITE
VIDEO
COMPOSITE

Figure 1.Evaluation Setup
VOLTS
IRE
–50

Figure 2.Modulated Pulse and Bar, NTSC
VOLTS

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