AD7225 ,LC2MOS Quad 8-Bit DAC with Separate Reference InputsGENERAL DESCRIPTIONThe AD7225 contains four 8-bit voltage output digital-to-analog converters, with ..
AD7225BQ ,LC2MOS Quad 8-Bit DAC with Separate Reference InputsGENERAL DESCRIPTIONThe AD7225 contains four 8-bit voltage output digital-to-analog converters, with ..
AD7225KN ,LC2MOS Quad 8-Bit DAC with Separate Reference Inputsspecifications T to T unless otherwise noted.)MIN MAXK, B L, C2 2Parameter Versions Versions T Vers ..
AD7225KP ,LC2MOS Quad 8-Bit DAC with Separate Reference InputsGENERAL DESCRIPTIONThe AD7225 contains four 8-bit voltage output digital-to-analog converters, with ..
AD7225KR ,LC2MOS Quad 8-Bit DAC with Separate Reference Inputsspecifications T to T unless otherwise noted.)MIN MAXK, B L, C2 2Parameter Versions Versions T Vers ..
AD7225LN ,LC2MOS Quad 8-Bit DAC with Separate Reference InputsSPECIFICATIONS1(V = 11.4 V to 16.5 V, V = –5 V 6 10%; AGND = DGND = O V; V = +2 V to (V – 4 V) unle ..
ADC912A ,CMOS Microprocessor-Compatible 12-Bit A/D ConverterSPECIFICATIONSDD SS REFIN10 V; External f = 1.25 MHz; –40C to +85C applies to ADC912A/F unless ot ..
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ADC-ET12BC , MONOLITHIC A/D CONVERTERS WITH THREE- STATE OUTPUTS
ADC-ET8BC , MONOLITHIC A/D CONVERTERS WITH THREE- STATE OUTPUTS
ADC-HX12BGC , 12-Bit, 8 and 20μsec Analog-to-Digital Converters
ADC-HX12BGC , 12-Bit, 8 and 20μsec Analog-to-Digital Converters
AD7225
LC2MOS Quad 8-Bit DAC with Separate Reference Inputs
REV.B
LC2MOS Quad 8-Bit DAC
with Separate Reference Inputs
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTIONThe AD7225 contains four 8-bit voltage output digital-to-
analog converters, with output buffer amplifiers and interface
logic on a single monolithic chip. Each D/A converter has a
separate reference input terminal. No external trims are re-
quired to achieve full specified performance for the part.
The double-buffered interface logic consists of two 8-bit regis-
ters per channel–an input register and a DAC register. Control
inputs A0 and A1 determine which input register is loaded when
WR goes low. Only the data held in the DAC registers deter-
mines the analog outputs of the converters. The double-
buffering allows simultaneous update of all four outputs under
control of LDAC. All logic inputs are TTL and CMOS (5 V)
level compatible and the control logic is speed compatible with
most 8-bit microprocessors.
Specified performance is guaranteed for input reference voltages
from +2 V to +12.5 V when using dual supplies. The part is also
specified for single supply operation using a reference of +10 V.
Each output buffer amplifier is capable of developing +10 V
across a 2 kΩ load.
The AD7225 is fabricated on an all ion-implanted high-speed
Linear Compatible CMOS (LC2MOS) process which has been
specifically developed to integrate high speed digital logic cir-
cuits and precision analog circuitry on the same chip.
FEATURES
Four 8-Bit DACs with Output Amplifiers
Separate Reference Input for Each DACmP Compatible with Double-Buffered Inputs
Simultaneous Update of All Four Outputs
Operates with Single or Dual Supplies
Extended Temperature Range Operation
No User Trims Required
Skinny 24-Pin DIP, SOIC and 28-Terminal Surface
Mount Packages
PRODUCT HIGHLIGHTS1. DACs and Amplifiers on CMOS Chip
The single-chip design of four 8-bit DACs and amplifiers al-
lows a dramatic reduction in board space requirements and
offers increased reliability in systems using multiple convert-
ers. Its pinout is aimed at optimizing board layout with all
analog inputs and outputs at one end of the package and all
digital inputs at the other.
2. Single or Dual Supply Operation
The voltage-mode configuration of the AD7225 allows single
supply operation. The part can also be operated with dual
supplies giving enhanced performance for some parameters.
3. Versatile Interface Logic
The AD7225 has a common 8-bit data bus with individual
DAC latches, providing a versatile control architecture for
simple interface to microprocessors. The double-buffered in-
terface allows simultaneous update of the four outputs.
4. Separate Reference Input for Each DAC
The AD7225 offers great flexibility in dealing with input sig-
nals with a separate reference input provided for each DAC
and each reference having variable input voltage capability.
AD7225–SPECIFICATIONS
DUAL SUPPLYNOTES
1Maximum possible reference voltage.
2Temperature ranges are as follows:
K, L Versions: –40°C to +85°C
B, C Versions: –40°C to +85°C
T, U Versions: –55°C to +125°C
3Sample Tested at 25°C to ensure compliance.
4Switching characteristics apply for single and dual supply operation.
Specifications subject to change without notice.
(VDD = 11.4 V to 16.5 V, VSS = –5 V 6 10%; AGND = DGND = O V; VREF = +2 V to (VDD – 4 V)1 unless otherwise noted.
All specifications TMIN to TMAX unless otherwise noted.)
ORDERING GUIDE
AD7225
SINGLE SUPPLYREFERENCE INPUT
DIGITAL INPUTS
DYNAMIC PERFORMANCE
POWER SUPPLIES
NOTESMaximum possible reference voltage.Temperature ranges are as follows:
K, L Versions: –40°C to +85°C
B, C Versions: –40°C to +85°C
T, U Versions: –55°C to +125°C
(VDD = +15 V 6 5%; VSS = AGND = DGND = O V; VREF = +10 V1 unless otherwise noted.
All specifications TMIN to TMAX unless otherwise noted.)3Sample Tested at 25°C to ensure compliance.Switching characteristics apply for single and dual supply operation.
Specifications subject to change without notice.
TA = 258C, VDD = +15 V, VSS = –5 V unless otherwise noted.Figure 1.Channel-to-Channel Matching
Figure 3.Differential Nonlinearity vs. VREF
Figure 5.Zero Code Error vs. Temperature
Figure 2.Relative Accuracy vs. VREF
Figure 4.Power Supply Current vs. Temperature
Figure 6.Broadband Noise
AD7225
CIRCUIT INFORMATION
D/A SECTIONThe AD7225 contains four, identical, 8-bit voltage mode
digital-to-analog converters. Each D/A converter has a separate
reference input. The output voltages from the converters have
the same polarity as the reference voltages, allowing single sup-
ply operation. A novel DAC switch pair arrangement on the
AD7225 allows a reference voltage range from +2 V to +12.5 V
on each reference input.
Each DAC consists of a highly stable, thin-film, R-2R ladder
and eight high speed NMOS, single-pole, double-throw
switches. The simplified circuit diagram for channel A is shown
in Figure 7. Note that AGND (Pin 6) is common to all four
DACs.
Figure 7.D/A Simplified Circuit Diagram
The input impedance at any of the reference inputs is code de-
pendent and can vary from 11 kΩ minimum to infinity. The
lowest input impedance at any reference input occurs when that
DAC is loaded with the digital code 01010101. Therefore, it is
important that the reference presents a low output impedance
under changing load conditions. The nodal capacitance at the
reference terminals is also code dependent and typically varies
from 15 pF to 35 pF.
Each VOUT pin can be considered as a digitally programmable
voltage source with an output voltage of:
VOUTX = DX • VREFX
where DX is fractional representation of the digital input code
and can vary from 0 to 255/256.
The output impedance is that of the output buffer amplifier.
OP-AMP SECTIONEach voltage mode D/A converter output is buffered by a unity
gain noninverting CMOS amplifier. This buffer amplifier is ca-
pable of developing +10 V across a 2 kΩ load and can drive ca-
pacitive loads of 3300 pF.
The AD7225 can be operated single or dual supply; operating
with dual supplies results in enhanced performance in some pa-
rameters which cannot be achieved with single supply operation.
In single supply operation (VSS = 0 V = AGND) the sink capa-
bility of the amplifier, which is normally 400 μA, is reduced as
the output voltage nears AGND. The full sink capability of
400 μA is maintained over the full output voltage range by tying
VSS to –5 V. This is indicated in Figure 8.
Settling-time for negative-going output signals approaching
AGND is similarly affected by VSS. Negative-going settling-time
Figure 8.Variation of ISINK with VOUT
Additionally, the negative VSS gives more headroom to the out-
put amplifiers which results in better zero code performance and
improved slew rate at the output, than can be obtained in the
single supply mode.
DIGITAL SECTIONThe AD7225 digital inputs are compatible with either TTL or
5 V CMOS levels. All logic inputs are static protected MOS
gates with typical input currents of less than 1 nA. Internal in-
put protection is achieved by an on-chip distributed diode be-
tween DGND and each MOS gate. To minimize power supply
currents, it is recommended that the digital input voltages be
driven as close to the supply rails (VDD and DGND) as practi-
cally possible.
INTERFACE LOGIC INFORMATIONThe AD7225 contains two registers per DAC, an input register
and a DAC register. Address lines A0 and A1 select which input
register will accept data from the input port. When the WR sig-
nal is LOW, the input latches of the selected DAC are transpar-
ent. The data is latched into the addressed input register on the
rising edge of WR. Table I shows the addressing for the input
registers on the AD7225.
Table I.AD7225 Addressing
